157 lines
5.2 KiB
C
157 lines
5.2 KiB
C
#ifndef LUA_H
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#define LUA_H
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extern int32 PCX; /* external view of PC */
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extern int32 AF; /* AF register */
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extern int32 BC; /* BC register */
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extern int32 DE; /* DE register */
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extern int32 HL; /* HL register */
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extern int32 IX; /* IX register */
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extern int32 IY; /* IY register */
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extern int32 PC; /* program counter */
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extern int32 SP; /* SP register */
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extern int32 AF1; /* alternate AF register */
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extern int32 BC1; /* alternate BC register */
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extern int32 DE1; /* alternate DE register */
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extern int32 HL1; /* alternate HL register */
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extern int32 IFF; /* Interrupt Flip Flop */
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extern int32 IR; /* Interrupt (upper) / Refresh (lower) register */
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#if BANKS!=1
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extern uint8 _RamRead(uint16 address);
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extern uint16 _RamRead16(uint16 address);
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extern void _RamWrite16(uint16 address, uint16 value);
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#endif
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// Lua "Trampoline" functions
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int luaBdosCall(lua_State* L) {
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uint8 function = (uint8)luaL_checkinteger(L, 1);
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uint16 de = (uint16)luaL_checkinteger(L, 2);
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SET_LOW_REGISTER(BC, function);
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DE = de;
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_Bdos();
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uint16 result = HL & 0xffff;
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lua_pushinteger(L, result);
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return(1);
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}
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int luaRamRead(lua_State* L) {
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uint16 addr = (uint16)luaL_checkinteger(L, 1);
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uint8 result = _RamRead(addr);
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lua_pushinteger(L, result);
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return(1);
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}
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int luaRamWrite(lua_State* L) {
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uint16 addr = (uint16)luaL_checkinteger(L, 1);
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uint8 value = (uint8)luaL_checkinteger(L, 2);
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_RamWrite(addr, value);
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return(0);
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}
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int luaRamRead16(lua_State* L) {
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uint16 addr = (uint16)luaL_checkinteger(L, 1);
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uint16 result = _RamRead16(addr);
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lua_pushinteger(L, result);
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return(1);
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}
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int luaRamWrite16(lua_State* L) {
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uint16 addr = (uint16)luaL_checkinteger(L, 1);
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uint16 value = (uint8)luaL_checkinteger(L, 2);
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_RamWrite16(addr, value);
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return(0);
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}
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int luaReadReg(lua_State* L) {
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uint8 reg = (uint8)luaL_checkinteger(L, 1);
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uint16 result;
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switch (reg) {
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case 0:
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result = PCX & 0xffff; break; /* external view of PC */
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case 1:
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result = AF & 0xffff; break; /* AF register */
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case 2:
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result = BC & 0xffff; break; /* BC register */
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case 3:
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result = DE & 0xffff; break; /* DE register */
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case 4:
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result = HL & 0xffff; break; /* HL register */
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case 5:
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result = IX & 0xffff; break; /* IX register */
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case 6:
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result = IY & 0xffff; break; /* IY register */
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case 7:
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result = PC & 0xffff; break; /* program counter */
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case 8:
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result = SP & 0xffff; break; /* SP register */
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case 9:
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result = AF1 & 0xffff; break; /* alternate AF register */
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case 10:
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result = BC1 & 0xffff; break; /* alternate BC register */
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case 11:
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result = DE1 & 0xffff; break; /* alternate DE register */
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case 12:
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result = HL1 & 0xffff; break; /* alternate HL register */
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case 13:
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result = IFF & 0xffff; break; /* Interrupt Flip Flop */
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case 14:
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result = IR & 0xffff; break; /* Interrupt (upper) / Refresh (lower) register */
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default:
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result = -1; break;
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}
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lua_pushinteger(L, result);
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return(1);
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}
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int luaWriteReg(lua_State* L) {
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uint8 reg = (uint8)luaL_checkinteger(L, 1);
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uint16 value = (uint8)luaL_checkinteger(L, 2);
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switch (reg) {
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case 0:
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PCX = value; break; /* external view of PC */
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case 1:
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AF = value; break; /* AF register */
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case 2:
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BC = value; break; /* BC register */
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case 3:
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DE = value; break; /* DE register */
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case 4:
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HL = value; break; /* HL register */
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case 5:
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IX = value; break; /* IX register */
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case 6:
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IY = value; break; /* IY register */
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case 7:
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PC = value; break; /* program counter */
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case 8:
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SP = value; break; /* SP register */
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case 9:
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AF1 = value; break; /* alternate AF register */
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case 10:
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BC1 = value; break; /* alternate BC register */
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case 11:
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DE1 = value; break; /* alternate DE register */
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case 12:
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HL1 = value; break; /* alternate HL register */
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case 13:
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IFF = value; break; /* Interrupt Flip Flop */
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case 14:
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IR = value; break; /* Interrupt (upper) / Refresh (lower) register */
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default:
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break;
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}
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return(0);
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}
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#endif
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