files used in eagle to make the board

This commit is contained in:
Jeff Epler 2014-09-17 18:29:28 -05:00
parent 02a3c7816a
commit ad1284cb7e
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NOTE: Some of the .lbr files bundled in this repository are offered under
different licenses. See those files for details.
GNU GENERAL PUBLIC LICENSE
Version 2, June 1991

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<?xml version="1.0" encoding="utf-8"?>
<!DOCTYPE eagle SYSTEM "eagle.dtd">
<eagle version="6.6.0">
<drawing>
<settings>
<setting alwaysvectorfont="no"/>
<setting verticaltext="up"/>
</settings>
<grid distance="0.025" unitdist="mm" unit="mm" style="lines" multiple="1" display="yes" altdistance="0.025" altunitdist="inch" altunit="inch"/>
<layers>
<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>
<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>
<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>
<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>
<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>
<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>
<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>
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<layer number="39" name="tKeepout" color="4" fill="11" visible="yes" active="yes"/>
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<layer number="43" name="vRestrict" color="2" fill="10" visible="yes" active="yes"/>
<layer number="44" name="Drills" color="7" fill="1" visible="yes" active="yes"/>
<layer number="45" name="Holes" color="7" fill="1" visible="yes" active="yes"/>
<layer number="46" name="Milling" color="3" fill="1" visible="no" active="yes"/>
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<layer number="110" name="fp0" color="7" fill="1" visible="yes" active="yes"/>
<layer number="111" name="LPC17xx" color="7" fill="1" visible="yes" active="yes"/>
<layer number="112" name="tSilk" color="7" fill="1" visible="yes" active="yes"/>
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<layer number="116" name="Patch_BOT" color="9" fill="4" visible="yes" active="yes"/>
<layer number="121" name="_tsilk" color="7" fill="1" visible="yes" active="yes"/>
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<layer number="155" name="FabDoc3" color="7" fill="1" visible="yes" active="yes"/>
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<layer number="200" name="200bmp" color="1" fill="10" visible="yes" active="yes"/>
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<layer number="254" name="cooling" color="7" fill="1" visible="yes" active="yes"/>
</layers>
<library>
<packages>
<package name="U3V05">
<description>ODROID U3 v0.5 outline and I/O</description>
<wire x1="3" y1="0" x2="80" y2="0" width="0.127" layer="48"/>
<wire x1="80" y1="0" x2="83" y2="3" width="0.127" layer="48" curve="90"/>
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<wire x1="0" y1="3" x2="3" y2="0" width="0.127" layer="48" curve="90"/>
<hole x="79.5" y="3.5" drill="3.5"/>
<hole x="79.5" y="44.5" drill="3.5"/>
<hole x="3.5" y="3.5" drill="3.5"/>
<hole x="3.5" y="44.5" drill="3.5"/>
<pad name="P$1" x="2" y="8.3" drill="0.7" shape="square" rot="R90"/>
<pad name="P$2" x="4" y="8.3" drill="0.7" rot="R90"/>
<pad name="P$3" x="2" y="10.3" drill="0.7" rot="R90"/>
<pad name="P$4" x="4" y="10.3" drill="0.7" rot="R90"/>
<pad name="P$5" x="2" y="34.425" drill="0.7" shape="square" rot="R90"/>
<pad name="P$6" x="4" y="34.425" drill="0.7" rot="R90"/>
<pad name="P$7" x="2" y="36.425" drill="0.7" rot="R90"/>
<pad name="P$8" x="4" y="36.425" drill="0.7" rot="R90"/>
<pad name="P$9" x="2" y="38.425" drill="0.7" rot="R90"/>
<pad name="P$10" x="4" y="38.425" drill="0.7" rot="R90"/>
<pad name="P$11" x="2" y="40.425" drill="0.7" rot="R90"/>
<pad name="P$12" x="4" y="40.425" drill="0.7" rot="R90"/>
<wire x1="3" y1="8.8" x2="3" y2="9.8" width="0.127" layer="21"/>
<wire x1="2.5" y1="9.3" x2="3.5" y2="9.3" width="0.127" layer="21"/>
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<dimension x1="3" y1="37.925" x2="0" y2="42.675" x3="1.5" y3="50.5" textsize="1.27" layer="47" dtype="horizontal" precision="3" visible="yes"/>
<dimension x1="3.5" y1="44.525" x2="0" y2="46.4" x3="1.75" y3="53.125" textsize="1.27" layer="47" dtype="horizontal"/>
<dimension x1="3.5" y1="44.5" x2="14.925" y2="48" x3="-22.475" y3="46.25" textsize="1.27" layer="47" dtype="vertical"/>
</package>
<package name="U3V05H">
<pad name="P$1" x="-1.01" y="-1" drill="0.7" shape="square" rot="R90"/>
<pad name="P$2" x="0.99" y="-1" drill="0.7" rot="R90"/>
<pad name="P$3" x="-1.01" y="1" drill="0.7" rot="R90"/>
<pad name="P$4" x="0.99" y="1" drill="0.7" rot="R90"/>
<pad name="P$5" x="-1.01" y="25.125" drill="0.7" shape="square" rot="R90"/>
<pad name="P$6" x="0.99" y="25.125" drill="0.7" rot="R90"/>
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<pad name="P$11" x="-1.01" y="31.125" drill="0.7" rot="R90"/>
<pad name="P$12" x="0.99" y="31.125" drill="0.7" rot="R90"/>
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<wire x1="-0.01" y1="27.625" x2="-0.01" y2="28.625" width="0.127" layer="21"/>
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</package>
<package name="SOT223">
<description>&lt;b&gt;Smal Outline Transistor&lt;/b&gt;</description>
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<smd name="2" x="0.0254" y="-3.1496" dx="1.4986" dy="2.0066" layer="1"/>
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<text x="-2.54" y="4.318" size="1.27" layer="25" ratio="10">&gt;NAME</text>
<text x="-2.794" y="-5.842" size="1.27" layer="27" ratio="10">&gt;VALUE</text>
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<rectangle x1="-0.381" y1="-3.302" x2="0.381" y2="-1.778" layer="51"/>
</package>
<package name="DD-3">
<description>&lt;b&gt;DPAC&lt;/b&gt;</description>
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<package name="TSSOP14">
<description>&lt;b&gt;Thin Shrink Small Outline Plastic 14&lt;/b&gt;&lt;p&gt;</description>
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<symbols>
<symbol name="ODROID-U3">
<pin name="CLK" x="-5.08" y="20.32" length="middle"/>
<pin name="/CS" x="-5.08" y="17.78" length="middle"/>
<pin name="MOSI" x="-5.08" y="15.24" length="middle" direction="out"/>
<pin name="MISO" x="-5.08" y="12.7" length="middle" direction="in"/>
<pin name="INT8" x="25.4" y="15.24" length="middle" swaplevel="1" rot="R180"/>
<pin name="1.8V" x="17.78" y="30.48" length="middle" direction="sup" rot="R270"/>
<pin name="INT9" x="25.4" y="12.7" length="middle" swaplevel="1" rot="R180"/>
<pin name="RXD" x="-5.08" y="7.62" length="middle"/>
<pin name="INT13" x="25.4" y="10.16" length="middle" swaplevel="2" rot="R180"/>
<pin name="TXD" x="-5.08" y="5.08" length="middle"/>
<pin name="GND" x="15.24" y="-5.08" length="middle" direction="sup" rot="R90"/>
<pin name="5V" x="12.7" y="30.48" length="middle" direction="sup" rot="R270"/>
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<wire x1="0" y1="25.4" x2="0" y2="0" width="0.254" layer="94"/>
</symbol>
<symbol name="ODROID-HEADERS">
</symbol>
<symbol name="REG1117-3.3">
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<pin name="GND" x="0" y="-12.7" length="middle" direction="pwr" rot="R90"/>
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<symbol name="TXB0104PWR">
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</symbol>
</symbols>
<devicesets>
<deviceset name="ODROID-U3">
<gates>
<gate name="G$1" symbol="ODROID-U3" x="-12.7" y="-12.7"/>
</gates>
<devices>
<device name="" package="U3V05">
<connects>
<connect gate="G$1" pin="/CS" pad="P$2"/>
<connect gate="G$1" pin="1.8V" pad="P$6"/>
<connect gate="G$1" pin="5V" pad="P$12"/>
<connect gate="G$1" pin="CLK" pad="P$1"/>
<connect gate="G$1" pin="GND" pad="P$11"/>
<connect gate="G$1" pin="INT13" pad="P$9"/>
<connect gate="G$1" pin="INT8" pad="P$5"/>
<connect gate="G$1" pin="INT9" pad="P$7"/>
<connect gate="G$1" pin="MISO" pad="P$4"/>
<connect gate="G$1" pin="MOSI" pad="P$3"/>
<connect gate="G$1" pin="RXD" pad="P$8"/>
<connect gate="G$1" pin="TXD" pad="P$10"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
<device name="PINSONLY" package="U3V05H">
<connects>
<connect gate="G$1" pin="/CS" pad="P$2"/>
<connect gate="G$1" pin="1.8V" pad="P$6"/>
<connect gate="G$1" pin="5V" pad="P$12"/>
<connect gate="G$1" pin="CLK" pad="P$1"/>
<connect gate="G$1" pin="GND" pad="P$11"/>
<connect gate="G$1" pin="INT13" pad="P$9"/>
<connect gate="G$1" pin="INT8" pad="P$5"/>
<connect gate="G$1" pin="INT9" pad="P$7"/>
<connect gate="G$1" pin="MISO" pad="P$4"/>
<connect gate="G$1" pin="MOSI" pad="P$3"/>
<connect gate="G$1" pin="RXD" pad="P$8"/>
<connect gate="G$1" pin="TXD" pad="P$10"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="REG1117-3.3" prefix="IC">
<description>&lt;b&gt;800mA and 1A Low Dropout (LDO) Positive Regulator&lt;/b&gt;&lt;p&gt;
1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adj</description>
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<gate name="G$1" symbol="REG1117-3.3" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT223">
<connects>
<connect gate="G$1" pin="3.3V" pad="2"/>
<connect gate="G$1" pin="GND" pad="1"/>
<connect gate="G$1" pin="VIN" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MF" value="" constant="no"/>
<attribute name="MPN" value="REG1117" constant="no"/>
<attribute name="OC_FARNELL" value="1097566" constant="no"/>
<attribute name="OC_NEWARK" value="14P6981" constant="no"/>
</technology>
</technologies>
</device>
<device name="F" package="DD-3">
<connects>
<connect gate="G$1" pin="3.3V" pad="2"/>
<connect gate="G$1" pin="GND" pad="1"/>
<connect gate="G$1" pin="VIN" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MF" value="TEXAS INSTRUMENTS" constant="no"/>
<attribute name="MPN" value="REG1117FAKTTT" constant="no"/>
<attribute name="OC_FARNELL" value="1296120" constant="no"/>
<attribute name="OC_NEWARK" value="87H2562" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="TXB0104PWR" prefix="U" uservalue="yes">
<description>&lt;b&gt;4-Bit Bi-Directional Level Shifter&lt;/b&gt;
&lt;ul&gt;
&lt;li&gt;1.2V-3.6V (VCCA) to 1.65V-5.5V (VCCB) bi-directional level shifter with auto direction sensing.&lt;/li&gt;
&lt;li&gt;Max data rate - VCCA 1.8V: 20Mbps (50ns), VCCA 3.3V: 100Mbps (10ns)&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;Digikey: 296-21929-1-ND (TSSOP)&lt;/p&gt;
&lt;p&gt;IC-11329&lt;/p&gt;</description>
<gates>
<gate name="G$1" symbol="TXB0104PWR" x="0" y="0"/>
</gates>
<devices>
<device name="" package="TSSOP14">
<connects>
<connect gate="G$1" pin="A1" pad="2"/>
<connect gate="G$1" pin="A2" pad="3"/>
<connect gate="G$1" pin="A3" pad="4"/>
<connect gate="G$1" pin="A4" pad="5"/>
<connect gate="G$1" pin="B1" pad="13"/>
<connect gate="G$1" pin="B2" pad="12"/>
<connect gate="G$1" pin="B3" pad="11"/>
<connect gate="G$1" pin="B4" pad="10"/>
<connect gate="G$1" pin="GND" pad="7"/>
<connect gate="G$1" pin="OE" pad="8"/>
<connect gate="G$1" pin="VCCA" pad="1"/>
<connect gate="G$1" pin="VCCB" pad="14"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
<device name="SOIC14" package="SO14">
<connects>
<connect gate="G$1" pin="A1" pad="2"/>
<connect gate="G$1" pin="A2" pad="3"/>
<connect gate="G$1" pin="A3" pad="4"/>
<connect gate="G$1" pin="A4" pad="5"/>
<connect gate="G$1" pin="B1" pad="13"/>
<connect gate="G$1" pin="B2" pad="12"/>
<connect gate="G$1" pin="B3" pad="11"/>
<connect gate="G$1" pin="B4" pad="10"/>
<connect gate="G$1" pin="GND" pad="7"/>
<connect gate="G$1" pin="OE" pad="8"/>
<connect gate="G$1" pin="VCCA" pad="1"/>
<connect gate="G$1" pin="VCCB" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="PROD_ID" value="IC-11329"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
</devicesets>
</library>
</drawing>
</eagle>