| CMSIS-Driver Version 2.02 Peripheral Interface for Middleware and Application Code

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Macros
I2C Events
I2C Interface

The I2C driver generates call back events that are notified via the function ARM_I2C_SignalEvent. More...

## Macros

#define | ARM_I2C_EVENT_TRANSFER_DONE (1UL << 0)
| Master/Slave Transmit/Receive finished.
#define | ARM_I2C_EVENT_TRANSFER_INCOMPLETE (1UL << 1)
| Master/Slave Transmit/Receive incomplete transfer.
#define | ARM_I2C_EVENT_SLAVE_TRANSMIT (1UL << 2)
| Slave Transmit operation requested.
#define | ARM_I2C_EVENT_SLAVE_RECEIVE (1UL << 3)
| Slave Receive operation requested.
#define | ARM_I2C_EVENT_GENERAL_CALL (1UL << 5)
| General Call indication.
#define | ARM_I2C_EVENT_ADDRESS_NACK (1UL << 4)
| Address not acknowledged from Slave.
#define | ARM_I2C_EVENT_ARBITRATION_LOST (1UL << 6)
| Master lost arbitration.
#define | ARM_I2C_EVENT_BUS_ERROR (1UL << 7)
| Bus error detected (START/STOP at illegal position)
#define | ARM_I2C_EVENT_BUS_CLEAR (1UL << 8)
| Bus clear finished.

## Description

The I2C driver generates call back events that are notified via the function ARM_I2C_SignalEvent.

This section provides the event values for the ARM_I2C_SignalEvent callback function.

The following call back notification events are generated:

## Macro Definition Documentation

#define ARM_I2C_EVENT_ADDRESS_NACK (1UL << 4)

Address not acknowledged from Slave.

#define ARM_I2C_EVENT_ARBITRATION_LOST (1UL << 6)

Master lost arbitration.

#define ARM_I2C_EVENT_BUS_CLEAR (1UL << 8)

Bus clear finished.

#define ARM_I2C_EVENT_BUS_ERROR (1UL << 7)

Bus error detected (START/STOP at illegal position)

#define ARM_I2C_EVENT_GENERAL_CALL (1UL << 5)

General Call indication.

#define ARM_I2C_EVENT_SLAVE_RECEIVE (1UL << 3)

Slave Receive operation requested.

#define ARM_I2C_EVENT_SLAVE_TRANSMIT (1UL << 2)

Slave Transmit operation requested.

#define ARM_I2C_EVENT_TRANSFER_DONE (1UL << 0)

Master/Slave Transmit/Receive finished.

#define ARM_I2C_EVENT_TRANSFER_INCOMPLETE (1UL << 1)

Master/Slave Transmit/Receive incomplete transfer.