Compare commits
419 commits
| Author | SHA1 | Date | |
|---|---|---|---|
|
|
9d601f43c0 | ||
|
|
907ace489f | ||
|
|
bfe6eb363a | ||
|
|
97f6be6ab6 | ||
|
|
6651f9558c | ||
|
|
6785401969 | ||
|
|
87214f13bd | ||
|
|
66b69dd388 | ||
|
|
7ccb9f2bd6 | ||
|
|
646381978b | ||
|
|
62114694ce | ||
|
|
d00e77dba4 | ||
|
|
bb87d43ba1 | ||
|
|
c05ce500cb | ||
|
|
03e62e7f2d | ||
|
|
6947ffca8b | ||
|
|
b3e13dfbe0 | ||
|
|
acdf9fba4f | ||
|
|
291610433b | ||
|
|
a346c82e2d | ||
|
|
cff6957ca3 | ||
|
|
39d1033f4c | ||
|
|
96ff48dc9b | ||
|
|
a9a42f2af4 | ||
|
|
246e826e91 | ||
|
|
c78cd6f2dd | ||
|
|
32c4433628 | ||
|
|
70b7c881bb | ||
|
|
71dfe62ff6 | ||
|
|
5ebe947a43 | ||
|
|
70bcb3af4d | ||
|
|
d2bb4865ac | ||
|
|
3d1607e782 | ||
|
|
52b1656fa2 | ||
|
|
99b6683a6e | ||
|
|
e50b44a836 | ||
|
|
0ae9e5a7fa | ||
|
|
69afdc9270 | ||
|
|
feb8ed3c25 | ||
|
|
6997c56f2d | ||
|
|
445c3ada36 | ||
|
|
561596b4f0 | ||
|
|
9a019664e2 | ||
|
|
dd4c4ce33c | ||
|
|
aa52a8c29b | ||
|
|
ce8a3923e1 | ||
|
|
5ffa584702 | ||
|
|
82cd95d3c5 | ||
|
|
63b4c6f529 | ||
|
|
5f3168c4da | ||
|
|
06c6126f60 | ||
|
|
2a38099130 | ||
|
|
df1c6c838b | ||
|
|
c50bb52c01 | ||
|
|
c7949999ed | ||
|
|
e2938da1e2 | ||
|
|
2a71824446 | ||
|
|
7c8134edd5 | ||
|
|
af0416c8ec | ||
|
|
b6aa95c6a3 | ||
|
|
82694d12e9 | ||
|
|
c23e123618 | ||
|
|
5729d9c93f | ||
|
|
b7dffef38b | ||
|
|
56ce473c04 | ||
|
|
a0c198afe4 | ||
|
|
fc0acb0c50 | ||
|
|
164ac15919 | ||
|
|
c2bf7622b8 | ||
|
|
c4b557e226 | ||
|
|
a89ceb7f27 | ||
|
|
accf14e78d | ||
|
|
62e7c4b15b | ||
|
|
602b05ab04 | ||
|
|
2030810878 | ||
|
|
401ac6953e | ||
|
|
b3291f4500 | ||
|
|
4260c08e09 | ||
|
|
75c330ed49 | ||
|
|
52424257d9 | ||
|
|
cc71ede119 | ||
|
|
4f513fee2a | ||
|
|
23d5a57653 | ||
|
|
74cc3b30ab | ||
|
|
6a35639103 | ||
|
|
708dd9d5a0 | ||
|
|
1013bc682e | ||
|
|
6ef421ecc4 | ||
|
|
6c33d79e9d | ||
|
|
93da06e93d | ||
|
|
65b220d1dd | ||
|
|
fcae2760be | ||
|
|
96c7aaa40f | ||
|
|
8816ca26c6 | ||
|
|
28ef110f7d | ||
|
|
0358e3735a | ||
|
|
1f86cd3f60 | ||
|
|
a6c2ac3114 | ||
|
|
a796181a24 | ||
|
|
7186df5512 | ||
|
|
9517dd2a36 | ||
|
|
42c41a07c3 | ||
|
|
1eaee86a28 | ||
|
|
a7a454132f | ||
|
|
09c839bacc | ||
|
|
e88dd3a523 | ||
|
|
4fdf0fece2 | ||
|
|
926fb6e726 | ||
|
|
fc07de0ffd | ||
|
|
efdf9b63b1 | ||
|
|
49723b4a25 | ||
|
|
855dbb8f43 | ||
|
|
52bb46c379 | ||
|
|
572caca483 | ||
|
|
fe9b8b4088 | ||
|
|
94cb0fa441 | ||
|
|
1c026815b6 | ||
|
|
fa80209eaf | ||
|
|
e1d727f860 | ||
|
|
f5f7461a0c | ||
|
|
b8e5b80dae | ||
|
|
3e6e7c0ff4 | ||
|
|
545ddacc50 | ||
|
|
f435a9c016 | ||
|
|
6011ff06ed | ||
|
|
3b8f9b6313 | ||
|
|
3caf280e24 | ||
|
|
9d9a8a88e3 | ||
|
|
a4d8af3d4f | ||
|
|
a1bd1a8ba7 | ||
|
|
865da2fd31 | ||
|
|
586d4b3a25 | ||
|
|
885954dc8d | ||
|
|
f1504a316d | ||
|
|
93cbf96cd1 | ||
|
|
565042c513 | ||
|
|
c92c7d5987 | ||
|
|
6e768a4fe4 | ||
|
|
1aa63e6b4f | ||
|
|
44185f98c7 | ||
|
|
18a14fdc56 | ||
|
|
322ffca5cb | ||
|
|
1097814e5e | ||
|
|
fea6552608 | ||
|
|
dc9d022662 | ||
|
|
47b2b9af62 | ||
|
|
b1c616f103 | ||
|
|
c6e4a8e7bc | ||
|
|
6404a45b9e | ||
|
|
33f1e40553 | ||
|
|
edb6eb2a6c | ||
|
|
b7a130b618 | ||
|
|
d8dcad0f98 | ||
|
|
2e5ac4999a | ||
|
|
b9e9e70e98 | ||
|
|
a2fa250358 | ||
|
|
19656ba6a3 | ||
|
|
61b7505c0e | ||
|
|
4c2e73e7a0 | ||
|
|
1e9d3f6d14 | ||
|
|
d05db91def | ||
|
|
c0f3813d77 | ||
|
|
a698ed4ad7 | ||
|
|
34689e380f | ||
|
|
cca088cf06 | ||
|
|
5193a1ab12 | ||
|
|
84a17bf900 | ||
|
|
318ae09410 | ||
|
|
bc732dc087 | ||
|
|
3ebec6bf9c | ||
|
|
25deea9d30 | ||
|
|
17cf5763a9 | ||
|
|
d03ea2cf84 | ||
|
|
1b32e2512e | ||
|
|
aa533190e8 | ||
|
|
54521e1809 | ||
|
|
7678bf03b1 | ||
|
|
328e5da918 | ||
|
|
dec2fb702c | ||
|
|
1e0d5530ad | ||
|
|
84b2ba9aa9 | ||
|
|
fc4760b351 | ||
|
|
5cc2bd2f11 | ||
|
|
43d2e442b1 | ||
|
|
7f6f361e41 | ||
|
|
310e335e60 | ||
|
|
79065b96b0 | ||
|
|
cfdd5baeb1 | ||
|
|
b977d70c04 | ||
|
|
0d0115a644 | ||
|
|
f061870c84 | ||
|
|
5c7bf80cbb | ||
|
|
98c2743a9a | ||
|
|
6098ca498e | ||
|
|
4c9dfd1fd1 | ||
|
|
27f21856e0 | ||
|
|
889385d13d | ||
|
|
9b5d358a32 | ||
|
|
209d795792 | ||
|
|
797305f59b | ||
|
|
b444a0913a | ||
|
|
200da5b71e | ||
|
|
ac223d3852 | ||
|
|
c1df3a53e9 | ||
|
|
0d796e4c5b | ||
|
|
e0dfbe4877 | ||
|
|
201566000b | ||
|
|
4bf0d7b465 | ||
|
|
f65c3238fc | ||
|
|
c44317fb10 | ||
|
|
c9bad99f2c | ||
|
|
9c88421a1a | ||
|
|
f0258fe1fd | ||
|
|
e4478e316b | ||
|
|
cb6ce4a23a | ||
|
|
7d17cf4b9f | ||
|
|
7c2f33d3d1 | ||
|
|
f5fd25e9f7 | ||
|
|
ebe34f660b | ||
|
|
458205cc26 | ||
|
|
56abc28c58 | ||
|
|
ee5bd3c2cd | ||
|
|
32e8aae2be | ||
|
|
16f7be6940 | ||
|
|
4ce22c7c6a | ||
|
|
3f4c7c5d9d | ||
|
|
ebdadb0573 | ||
|
|
2d4ec73596 | ||
|
|
aa3e166332 | ||
|
|
887cc309fc | ||
|
|
f356c879e7 | ||
|
|
d6d3f14659 | ||
|
|
fa9ef5823d | ||
|
|
e9eda4a001 | ||
|
|
a26dd19b30 | ||
|
|
888044a5a7 | ||
|
|
0a2294c8a2 | ||
|
|
e24af36ec5 | ||
|
|
0aa0c6319a | ||
|
|
7429335756 | ||
|
|
3d28a31356 | ||
|
|
c92ac1db1a | ||
|
|
e915f77a18 | ||
|
|
db34342304 | ||
|
|
b29e00cd58 | ||
|
|
9a319c005d | ||
|
|
df9936d8e0 | ||
|
|
349664da9b | ||
|
|
a10516ec1e | ||
|
|
24c994647e | ||
|
|
3178c06507 | ||
|
|
da0c4c5997 | ||
|
|
f966246f38 | ||
|
|
a04c6632df | ||
|
|
c0214879d1 | ||
|
|
07f1c54a97 | ||
|
|
8a798db800 | ||
|
|
c91ce29a48 | ||
|
|
1933b8cf5c | ||
|
|
bdcd5b3f31 | ||
|
|
7e6819e218 | ||
|
|
509d60db6d | ||
|
|
bfc2ca5333 | ||
|
|
8a2bfea981 | ||
|
|
82bda093a6 | ||
|
|
8c98abd6b0 | ||
|
|
2751588508 | ||
|
|
66346bcb15 | ||
|
|
1f706a115c | ||
|
|
414d1eb6e5 | ||
|
|
5abc3553ef | ||
|
|
fd6b9027a4 | ||
|
|
96aa5ea5de | ||
|
|
72e311b790 | ||
|
|
141a585f35 | ||
|
|
a91d7b0288 | ||
|
|
8176ee9529 | ||
|
|
00cb4802a0 | ||
|
|
bcf36983a3 | ||
|
|
15253f13d7 | ||
|
|
279da2a382 | ||
|
|
ae5806e910 | ||
|
|
b1c11d1eee | ||
|
|
ab23185ae6 | ||
|
|
2e78722589 | ||
|
|
a8f76e5059 | ||
|
|
1b336fd45f | ||
|
|
48f97b28bd | ||
|
|
38cb858455 | ||
|
|
99bdc3da0d | ||
|
|
ffbf98a6ec | ||
|
|
20ac5a6535 | ||
|
|
7f654913be | ||
|
|
1ac4a7bac7 | ||
|
|
d427fe5e0e | ||
|
|
86af39acdb | ||
|
|
7390d4942c | ||
|
|
732a8e32e4 | ||
|
|
9afab6abae | ||
|
|
341de07cd1 | ||
|
|
29696af5a7 | ||
|
|
a6203f6d2a | ||
|
|
c389fc18fe | ||
|
|
a9736eb193 | ||
|
|
f50e947976 | ||
|
|
2cfbe6b3b5 | ||
|
|
1705e7a207 | ||
|
|
6d24f147e6 | ||
|
|
3141b9a431 | ||
|
|
5dd64dc0d4 | ||
|
|
7edd0ac200 | ||
|
|
98e0386636 | ||
|
|
2c6069445b | ||
|
|
25769ece1e | ||
|
|
3db91820c3 | ||
|
|
cb0331ba9a | ||
|
|
a89e9fb9ca | ||
|
|
9de0794dc1 | ||
|
|
e3f58060c1 | ||
|
|
ee100b0adc | ||
|
|
436de999e1 | ||
|
|
d92e5bbec8 | ||
|
|
6cac35c955 | ||
|
|
fc5f4d3bf7 | ||
|
|
8f78aa2161 | ||
|
|
08b5cd3b4f | ||
|
|
1a1ec23051 | ||
|
|
f1a9ac1484 | ||
|
|
bffbc23db4 | ||
|
|
675477087e | ||
|
|
e6b89a577c | ||
|
|
c10f670e44 | ||
|
|
cc883a9c0e | ||
|
|
5f42944b80 | ||
|
|
29e72c024b | ||
|
|
c3fe2a8769 | ||
|
|
8a2947519d | ||
|
|
6ad701fd21 | ||
|
|
3ce7f11084 | ||
|
|
ae28b5657e | ||
|
|
a3e7ea5b7d | ||
|
|
e0e8edc6a4 | ||
|
|
addc993daf | ||
|
|
54aa4e0b6d | ||
|
|
5080ffc519 | ||
|
|
feb8370bb8 | ||
|
|
2227f2982d | ||
|
|
44d41529bc | ||
|
|
722e17eb63 | ||
|
|
7f206f3970 | ||
|
|
2915d124a0 | ||
|
|
36d984e485 | ||
|
|
538de97349 | ||
|
|
2a8ad63e8f | ||
|
|
2d07659301 | ||
|
|
a8150c2eee | ||
|
|
e8c4cfc25f | ||
|
|
618d5eb7d9 | ||
|
|
06e065480a | ||
|
|
683bef8154 | ||
|
|
1e816f4a35 | ||
|
|
f664af42fa | ||
|
|
2e0b7f31f6 | ||
|
|
f60061ad6a | ||
|
|
5d82e2868d | ||
|
|
98e982a944 | ||
|
|
ec3ca24a31 | ||
|
|
9bf6e07051 | ||
|
|
f98649e0bc | ||
|
|
ec77f5618e | ||
|
|
caeed1cc5c | ||
|
|
319db9ca05 | ||
|
|
8608d416d5 | ||
|
|
ca7a355027 | ||
|
|
39bcf4b008 | ||
|
|
7f7ac0847f | ||
|
|
5fa044f751 | ||
|
|
5abdd4b630 | ||
|
|
8b16d11125 | ||
|
|
2491efc7c4 | ||
|
|
5c0ea2b6c9 | ||
|
|
d3dcfa7862 | ||
|
|
2f1ce04fbb | ||
|
|
c3d65c0489 | ||
|
|
8dcba8739b | ||
|
|
b1c57a0fc0 | ||
|
|
2e01335202 | ||
|
|
2bb8916ee0 | ||
|
|
f4303e33eb | ||
|
|
a303d70ab4 | ||
|
|
33d698049e | ||
|
|
24923f299c | ||
|
|
81f69b7431 | ||
|
|
b096ecfb92 | ||
|
|
5920297ce6 | ||
|
|
06d222684d | ||
|
|
813caf0333 | ||
|
|
47bab41473 | ||
|
|
d3328d697d | ||
|
|
981303c0b5 | ||
|
|
bbe9e2f864 | ||
|
|
47d6a0bcfb | ||
|
|
7c94d64829 | ||
|
|
0ba3a16c2a | ||
|
|
2828c4169a | ||
|
|
b3209b8cbd | ||
|
|
9e6eaaf05b | ||
|
|
cab34768bd | ||
|
|
45cdce6af4 | ||
|
|
0192f44d92 | ||
|
|
b27d2a9f5e | ||
|
|
ae1277749e | ||
|
|
dc8d298939 | ||
|
|
d4583c73b6 | ||
|
|
1180b56bc3 | ||
|
|
96fbfcad5d | ||
|
|
b901cb401d | ||
|
|
6ceac08068 | ||
|
|
af95eeb883 |
4730 changed files with 2408975 additions and 68899 deletions
|
|
@ -2,3 +2,4 @@ BasedOnStyle: LLVM
|
|||
IndentWidth: 4
|
||||
UseTab: Never
|
||||
ColumnLimit: 100
|
||||
SortIncludes: false
|
||||
|
|
|
|||
4
.gitignore
vendored
4
.gitignore
vendored
|
|
@ -4,3 +4,7 @@ uf2-bootloader.elf
|
|||
tmp
|
||||
*.sw?
|
||||
Makefile.user
|
||||
node_modules
|
||||
scripts/clean-ifaces/*.plist
|
||||
.vscode/c_cpp_properties.json
|
||||
TAGS
|
||||
|
|
|
|||
10
.gitignore.bk
Normal file
10
.gitignore.bk
Normal file
|
|
@ -0,0 +1,10 @@
|
|||
build/
|
||||
.vs/
|
||||
uf2-bootloader.elf
|
||||
tmp
|
||||
*.sw?
|
||||
Makefile.user
|
||||
node_modules
|
||||
scripts/clean-ifaces/*.plist
|
||||
.vscode/c_cpp_properties.json
|
||||
TAGS
|
||||
3
.gitmodules
vendored
Normal file
3
.gitmodules
vendored
Normal file
|
|
@ -0,0 +1,3 @@
|
|||
[submodule "lib/uf2"]
|
||||
path = lib/uf2
|
||||
url = https://github.com/Microsoft/uf2.git
|
||||
28
.travis.yml
Normal file
28
.travis.yml
Normal file
|
|
@ -0,0 +1,28 @@
|
|||
language: node_js
|
||||
sudo: false
|
||||
node_js:
|
||||
- "5.7.0"
|
||||
notifications:
|
||||
email:
|
||||
- yelm-eng@microsoft.com
|
||||
addons:
|
||||
apt:
|
||||
packages:
|
||||
- libc6-i386
|
||||
|
||||
node_js:
|
||||
- "6"
|
||||
|
||||
cache:
|
||||
directories:
|
||||
- $HOME/gcc-arm-none-eabi-9-2019-q4-major
|
||||
|
||||
install:
|
||||
- export GCC_DIR=$HOME/gcc-arm-none-eabi-9-2019-q4-major
|
||||
- export GCC_ARCHIVE=$HOME/gcc-arm-none-eabi-9-2019-q4-major-x86_64-linux.tar.bz2
|
||||
- export GCC_URL=https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2019q4/gcc-arm-none-eabi-9-2019-q4-major-x86_64-linux.tar.bz2
|
||||
- if [ ! -e $GCC_DIR/bin/arm-none-eabi-g++ ]; then wget $GCC_URL -O $GCC_ARCHIVE; tar xfj $GCC_ARCHIVE -C $HOME; fi
|
||||
- export PATH=$PATH:$GCC_DIR/bin
|
||||
|
||||
script:
|
||||
- make all-boards
|
||||
28
.vscode/c_cpp_properties.json
vendored
28
.vscode/c_cpp_properties.json
vendored
|
|
@ -1,28 +0,0 @@
|
|||
{
|
||||
"configurations": [
|
||||
{
|
||||
"name": "Mac",
|
||||
"includePath": ["/usr/include"],
|
||||
"browse" : {
|
||||
"limitSymbolsToIncludedHeaders" : true,
|
||||
"databaseFilename" : ""
|
||||
}
|
||||
},
|
||||
{
|
||||
"name": "Linux",
|
||||
"includePath": ["/usr/include"],
|
||||
"browse" : {
|
||||
"limitSymbolsToIncludedHeaders" : true,
|
||||
"databaseFilename" : ""
|
||||
}
|
||||
},
|
||||
{
|
||||
"name": "Win32",
|
||||
"includePath": ["c:/Program Files (x86)/Microsoft Visual Studio 14.0/VC/include"],
|
||||
"browse" : {
|
||||
"limitSymbolsToIncludedHeaders" : true,
|
||||
"databaseFilename" : ""
|
||||
}
|
||||
}
|
||||
]
|
||||
}
|
||||
3
.vscode/settings.json
vendored
Normal file
3
.vscode/settings.json
vendored
Normal file
|
|
@ -0,0 +1,3 @@
|
|||
{
|
||||
"files.associations": {}
|
||||
}
|
||||
177
Makefile
Normal file → Executable file
177
Makefile
Normal file → Executable file
|
|
@ -1,13 +1,19 @@
|
|||
BOARD=zero
|
||||
-include Makefile.user
|
||||
include boards/$(BOARD)/board.mk
|
||||
CC=arm-none-eabi-gcc
|
||||
COMMON_FLAGS = -mthumb -mcpu=cortex-m0plus -Os -g
|
||||
ifeq ($(CHIP_FAMILY), samd21)
|
||||
COMMON_FLAGS = -mthumb -mcpu=cortex-m0plus -Os -g -DSAMD21
|
||||
endif
|
||||
ifeq ($(CHIP_FAMILY), samd51)
|
||||
COMMON_FLAGS = -mthumb -mcpu=cortex-m4 -O2 -g -DSAMD51
|
||||
endif
|
||||
WFLAGS = \
|
||||
-Wall -Wstrict-prototypes \
|
||||
-Werror -Wall -Wstrict-prototypes \
|
||||
-Werror-implicit-function-declaration -Wpointer-arith -std=gnu99 \
|
||||
-ffunction-sections -fdata-sections -Wchar-subscripts -Wcomment -Wformat=2 \
|
||||
-Wimplicit-int -Wmain -Wparentheses -Wsequence-point -Wreturn-type -Wswitch \
|
||||
-Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wundef \
|
||||
-Wtrigraphs -Wunused -Wuninitialized -Wunknown-pragmas -Wfloat-equal -Wno-undef \
|
||||
-Wbad-function-cast -Wwrite-strings -Waggregate-return \
|
||||
-Wformat -Wmissing-format-attribute \
|
||||
-Wno-deprecated-declarations -Wpacked -Wredundant-decls -Wnested-externs \
|
||||
|
|
@ -16,26 +22,54 @@ WFLAGS = \
|
|||
CFLAGS = $(COMMON_FLAGS) \
|
||||
-x c -c -pipe -nostdlib \
|
||||
--param max-inline-insns-single=500 \
|
||||
-fno-strict-aliasing -fdata-sections -ffunction-sections -mlong-calls \
|
||||
-fno-strict-aliasing -fdata-sections -ffunction-sections \
|
||||
-D__$(CHIP_VARIANT)__ \
|
||||
$(WFLAGS)
|
||||
|
||||
UF2_VERSION_BASE = $(shell git describe --dirty --always --tags)
|
||||
|
||||
ifeq ($(CHIP_FAMILY), samd21)
|
||||
LINKER_SCRIPT=scripts/samd21j18a.ld
|
||||
BOOTLOADER_SIZE=8192
|
||||
SELF_LINKER_SCRIPT=scripts/samd21j18a_self.ld
|
||||
endif
|
||||
|
||||
ifeq ($(CHIP_FAMILY), samd51)
|
||||
LINKER_SCRIPT=scripts/samd51j19a.ld
|
||||
BOOTLOADER_SIZE=16384
|
||||
SELF_LINKER_SCRIPT=scripts/samd51j19a_self.ld
|
||||
endif
|
||||
|
||||
LDFLAGS= $(COMMON_FLAGS) \
|
||||
-Wall -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--unresolved-symbols=report-all -Wl,--warn-common \
|
||||
-Wl,--warn-section-align -Wl,--warn-unresolved-symbols \
|
||||
-save-temps \
|
||||
--specs=nano.specs --specs=nosys.specs
|
||||
-Wl,--warn-section-align \
|
||||
-save-temps -nostartfiles \
|
||||
--specs=nano.specs --specs=nosys.specs
|
||||
BUILD_PATH=build/$(BOARD)
|
||||
INCLUDES = -I./inc -I./inc/preprocessor
|
||||
INCLUDES += -I./asf/sam0/utils/cmsis/samd21/include -I./asf/thirdparty/CMSIS/Include -I./asf/sam0/utils/cmsis/samd21/source
|
||||
INCLUDES += -I./asf/common -I./asf/common/utils -I./asf/sam0/utils/header_files -I./asf/sam0/utils -I./asf/common/utils/interrupt
|
||||
INCLUDES += -I./asf/sam0/drivers/system/interrupt -I./asf/sam0/drivers/system/interrupt/system_interrupt_samd21
|
||||
INCLUDES += -I./boards/$(BOARD)
|
||||
INCLUDES = -I. -I./inc -I./inc/preprocessor
|
||||
INCLUDES += -I./boards/$(BOARD) -Ilib/cmsis/CMSIS/Include -Ilib/usb_msc
|
||||
INCLUDES += -I$(BUILD_PATH)
|
||||
|
||||
|
||||
ifeq ($(CHIP_FAMILY), samd21)
|
||||
INCLUDES += -Ilib/samd21/samd21a/include/
|
||||
endif
|
||||
|
||||
ifeq ($(CHIP_FAMILY), samd51)
|
||||
ifeq ($(findstring SAME54,$(CHIP_VARIANT)),SAME54)
|
||||
INCLUDES += -Ilib/same54/include/
|
||||
else
|
||||
INCLUDES += -Ilib/samd51/include/
|
||||
endif
|
||||
endif
|
||||
|
||||
COMMON_SRC = \
|
||||
src/flash.c \
|
||||
src/init.c \
|
||||
src/startup_samd21.c \
|
||||
src/flash_$(CHIP_FAMILY).c \
|
||||
src/init_$(CHIP_FAMILY).c \
|
||||
src/startup_$(CHIP_FAMILY).c \
|
||||
src/usart_sam_ba.c \
|
||||
src/screen.c \
|
||||
src/images.c \
|
||||
src/utils.c
|
||||
|
||||
SOURCES = $(COMMON_SRC) \
|
||||
|
|
@ -53,21 +87,59 @@ SELF_SOURCES = $(COMMON_SRC) \
|
|||
OBJECTS = $(patsubst src/%.c,$(BUILD_PATH)/%.o,$(SOURCES))
|
||||
SELF_OBJECTS = $(patsubst src/%.c,$(BUILD_PATH)/%.o,$(SELF_SOURCES)) $(BUILD_PATH)/selfdata.o
|
||||
|
||||
NAME=uf2-bootloader
|
||||
NAME=bootloader-$(BOARD)-$(UF2_VERSION_BASE)
|
||||
EXECUTABLE=$(BUILD_PATH)/$(NAME).bin
|
||||
SELF_EXECUTABLE=$(BUILD_PATH)/self-$(NAME).uf2
|
||||
SELF_EXECUTABLE=$(BUILD_PATH)/update-$(NAME).uf2
|
||||
SELF_EXECUTABLE_INO=$(BUILD_PATH)/update-$(NAME).ino
|
||||
|
||||
all: dirs $(EXECUTABLE) $(SELF_EXECUTABLE)
|
||||
SUBMODULES = lib/uf2/README.md
|
||||
|
||||
all: $(SUBMODULES) dirs $(EXECUTABLE) $(SELF_EXECUTABLE)
|
||||
|
||||
r: run
|
||||
b: burn
|
||||
l: logs
|
||||
|
||||
burn: all
|
||||
node scripts/dbgtool.js fuses
|
||||
node scripts/dbgtool.js $(BUILD_PATH)/$(NAME).bin
|
||||
|
||||
run: burn wait logs
|
||||
|
||||
# This currently only works on macOS with a BMP debugger attached.
|
||||
# It's meant to flash the bootloader in a loop.
|
||||
BMP = $(shell ls -1 /dev/cu.usbmodem* | head -1)
|
||||
BMP_ARGS = --nx -ex "set mem inaccessible-by-default off" -ex "set confirm off" -ex "target extended-remote $(BMP)" -ex "mon tpwr enable" -ex "mon swdp_scan" -ex "attach 1"
|
||||
GDB = arm-none-eabi-gdb
|
||||
|
||||
bmp-flash: $(BUILD_PATH)/$(NAME).bin
|
||||
@test "X$(BMP)" != "X"
|
||||
$(GDB) $(BMP_ARGS) -ex "load" -ex "quit" $(BUILD_PATH)/$(NAME).elf | tee build/flash.log
|
||||
@grep -q "Transfer rate" build/flash.log
|
||||
|
||||
bmp-flashone:
|
||||
while : ; do $(MAKE) bmp-flash && exit 0 ; sleep 1 ; done
|
||||
afplay /System/Library/PrivateFrameworks/ScreenReader.framework/Versions/A/Resources/Sounds/Error.aiff
|
||||
|
||||
bmp-loop:
|
||||
while : ; do $(MAKE) bmp-flashone ; sleep 5 ; done
|
||||
|
||||
bmp-gdb: $(BUILD_PATH)/$(NAME).bin
|
||||
$(GDB) $(BMP_ARGS) $(BUILD_PATH)/$(NAME).elf
|
||||
|
||||
$(BUILD_PATH)/flash.jlink: $(BUILD_PATH)/$(NAME).bin
|
||||
echo " \n\
|
||||
r \n\
|
||||
h \n\
|
||||
loadbin \"$(BUILD_PATH)/$(NAME).bin\", 0x0 \n\
|
||||
verifybin \"$(BUILD_PATH)/$(NAME).bin\", 0x0 \n\
|
||||
r \n\
|
||||
qc \n\
|
||||
" > $(BUILD_PATH)/flash.jlink
|
||||
|
||||
jlink-flash: $(BUILD_PATH)/$(NAME).bin $(BUILD_PATH)/flash.jlink
|
||||
jlinkexe -if swd -device AT$(CHIP_VARIANT) -speed 4000 -CommanderScript $(BUILD_PATH)/flash.jlink
|
||||
|
||||
wait:
|
||||
sleep 5
|
||||
|
||||
|
|
@ -75,38 +147,40 @@ logs:
|
|||
node scripts/dbgtool.js $(BUILD_PATH)/$(NAME).map
|
||||
|
||||
selflogs:
|
||||
node scripts/dbgtool.js $(BUILD_PATH)/self-$(NAME).map
|
||||
node scripts/dbgtool.js $(BUILD_PATH)/update-$(NAME).map
|
||||
|
||||
dirs:
|
||||
@echo "Building $(BOARD)"
|
||||
-@mkdir -p $(BUILD_PATH)
|
||||
|
||||
$(EXECUTABLE): $(OBJECTS)
|
||||
$(EXECUTABLE): $(OBJECTS)
|
||||
$(CC) -L$(BUILD_PATH) $(LDFLAGS) \
|
||||
-T./asf/sam0/utils/linker_scripts/samd21/gcc/samd21j18a_flash.ld \
|
||||
-T$(LINKER_SCRIPT) \
|
||||
-Wl,-Map,$(BUILD_PATH)/$(NAME).map -o $(BUILD_PATH)/$(NAME).elf $(OBJECTS)
|
||||
arm-none-eabi-objcopy -O binary $(BUILD_PATH)/$(NAME).elf $@
|
||||
@echo
|
||||
-@arm-none-eabi-size $(BUILD_PATH)/$(NAME).elf | awk '{ s=$$1+$$2; print } END { print ""; print "Space left: " (8192-s) }'
|
||||
-@arm-none-eabi-size $(BUILD_PATH)/$(NAME).elf | awk '{ s=$$1+$$2; print } END { print ""; print "Space left: " ($(BOOTLOADER_SIZE)-s) }'
|
||||
@echo
|
||||
|
||||
$(BUILD_PATH)/uf2_version.h: Makefile
|
||||
echo "#define UF2_VERSION_BASE \"$(UF2_VERSION_BASE)\""> $@
|
||||
|
||||
$(SELF_EXECUTABLE): $(SELF_OBJECTS)
|
||||
$(CC) -L$(BUILD_PATH) $(LDFLAGS) \
|
||||
-T./scripts/samd21j18a_self.ld \
|
||||
-Wl,-Map,$(BUILD_PATH)/self-$(NAME).map -o $(BUILD_PATH)/self-$(NAME).elf $(SELF_OBJECTS)
|
||||
arm-none-eabi-objcopy -O binary $(BUILD_PATH)/self-$(NAME).elf $(BUILD_PATH)/self-$(NAME).bin
|
||||
node scripts/bin2uf2.js $(BUILD_PATH)/self-$(NAME).bin $@
|
||||
-T$(SELF_LINKER_SCRIPT) \
|
||||
-Wl,-Map,$(BUILD_PATH)/update-$(NAME).map -o $(BUILD_PATH)/update-$(NAME).elf $(SELF_OBJECTS)
|
||||
arm-none-eabi-objcopy -O binary $(BUILD_PATH)/update-$(NAME).elf $(BUILD_PATH)/update-$(NAME).bin
|
||||
python3 lib/uf2/utils/uf2conv.py -b $(BOOTLOADER_SIZE) -c -o $@ $(BUILD_PATH)/update-$(NAME).bin
|
||||
|
||||
$(BUILD_PATH)/%.o: src/%.c $(wildcard inc/*.h boards/*/*.h)
|
||||
@echo "$<"
|
||||
@$(CC) $(CFLAGS) $(BLD_EXTA_FLAGS) $(INCLUDES) $< -o $@
|
||||
$(BUILD_PATH)/%.o: src/%.c $(wildcard inc/*.h boards/*/*.h) $(BUILD_PATH)/uf2_version.h
|
||||
echo "$<"
|
||||
$(CC) $(CFLAGS) $(BLD_EXTA_FLAGS) $(INCLUDES) $< -o $@
|
||||
|
||||
$(BUILD_PATH)/%.o: $(BUILD_PATH)/%.c
|
||||
@$(CC) $(CFLAGS) $(BLD_EXTA_FLAGS) $(INCLUDES) $< -o $@
|
||||
$(CC) $(CFLAGS) $(BLD_EXTA_FLAGS) $(INCLUDES) $< -o $@
|
||||
|
||||
$(BUILD_PATH)/selfdata.c: $(EXECUTABLE) scripts/gendata.js
|
||||
node scripts/gendata.js $(BUILD_PATH) $(NAME).bin
|
||||
$(BUILD_PATH)/selfdata.c: $(EXECUTABLE) scripts/gendata.py src/sketch.cpp
|
||||
python3 scripts/gendata.py $(BOOTLOADER_SIZE) $(EXECUTABLE)
|
||||
|
||||
clean:
|
||||
rm -rf build
|
||||
|
|
@ -114,22 +188,41 @@ clean:
|
|||
gdb:
|
||||
arm-none-eabi-gdb $(BUILD_PATH)/$(NAME).elf
|
||||
|
||||
tui:
|
||||
arm-none-eabi-gdb -tui $(BUILD_PATH)/$(NAME).elf
|
||||
|
||||
%.asmdump: %.o
|
||||
arm-none-eabi-objdump -d $< > $@
|
||||
|
||||
applet0: $(BUILD_PATH)/flash.asmdump
|
||||
node scripts/genapplet.js $< flash_write
|
||||
|
||||
applet1: $(BUILD_PATH)/utils.asmdump
|
||||
node scripts/genapplet.js $< resetIntoApp
|
||||
|
||||
drop-board: all
|
||||
@echo "*** Copy files for $(BOARD)"
|
||||
mkdir -p build/drop
|
||||
rm -rf build/drop/$(BOARD)
|
||||
mkdir -p build/drop/$(BOARD)
|
||||
cp $(SELF_EXECUTABLE) build/drop/$(BOARD)/update-bootloader.uf2
|
||||
cp $(EXECUTABLE) build/drop/$(BOARD)/bootloader.bin
|
||||
cp $(BUILD_PATH)/bootloader.ino build/drop/$(BOARD)/bootloader.ino
|
||||
cp boards/$(BOARD)/board_config.h build/drop/$(BOARD)/board_config.h
|
||||
cp $(SELF_EXECUTABLE) build/drop/$(BOARD)/
|
||||
cp $(EXECUTABLE) build/drop/$(BOARD)/
|
||||
# .ino works only for SAMD21 right now; suppress for SAMD51
|
||||
ifeq ($(CHIP_FAMILY),samd21)
|
||||
cp $(SELF_EXECUTABLE_INO) build/drop/$(BOARD)/
|
||||
cp boards/$(BOARD)/board_config.h build/drop/$(BOARD)/
|
||||
endif
|
||||
|
||||
drop-pkg:
|
||||
mv build/drop build/uf2-samd21-$(VERSION)
|
||||
cd build; 7z a uf2-samd21-$(VERSION).zip uf2-samd21-$(VERSION)
|
||||
rm -rf build/uf2-samd21-$(VERSION)
|
||||
mv build/drop build/uf2-samd21-$(UF2_VERSION_BASE)
|
||||
cp bin-README.md build/uf2-samd21-$(UF2_VERSION_BASE)/README.md
|
||||
cd build; 7z a uf2-samd21-$(UF2_VERSION_BASE).zip uf2-samd21-$(UF2_VERSION_BASE)
|
||||
rm -rf build/uf2-samd21-$(UF2_VERSION_BASE)
|
||||
|
||||
drop:
|
||||
for f in `cd boards; ls` ; do $(MAKE) BOARD=$$f drop-board ; done
|
||||
$(MAKE) VERSION=`awk '/define UF2_VERSION_BASE/ { gsub(/"v?/, ""); print $$3 }' inc/uf2.h` drop-pkg
|
||||
all-boards:
|
||||
for f in `cd boards; ls` ; do "$(MAKE)" BOARD=$$f drop-board || break -1; done
|
||||
|
||||
drop: all-boards drop-pkg
|
||||
|
||||
$(SUBMODULES):
|
||||
git submodule update --init --recursive
|
||||
|
|
|
|||
79
README.md
79
README.md
|
|
@ -4,9 +4,11 @@ This repository contains a bootloader, derived from Atmel's SAM-BA,
|
|||
which in addition to the USB CDC (serial) protocol, also supports
|
||||
the USB MSC (mass storage).
|
||||
|
||||
## UF2
|
||||
[](https://travis-ci.org/Microsoft/uf2-samd21)
|
||||
|
||||
UF2 (USB Flashing Format) is a name of a file format, that is particularly
|
||||
## UF2
|
||||
|
||||
**UF2 (USB Flashing Format)** is a name of a file format, developed by Microsoft, that is particularly
|
||||
suitable for flashing devices over MSC devices. The file consists
|
||||
of 512 byte blocks, each of which is self-contained and independent
|
||||
of others.
|
||||
|
|
@ -20,13 +22,12 @@ Each 512 byte block consist of (see `uf2format.h` for details):
|
|||
Thus, it's really easy for the microcontroller to recognize a block of
|
||||
a UF2 file is written and immediately write it to flash.
|
||||
|
||||
In `uf2conv.c` you can find a small converter from `.bin` to `.uf2`.
|
||||
|
||||
* **UF2 specification repo:** https://github.com/Microsoft/uf2
|
||||
* [#DeskOfLadyada UF24U ! LIVE @adafruit #adafruit #programming](https://youtu.be/WxCuB6jxLs0)
|
||||
|
||||
## Features
|
||||
|
||||
* USB CDC (Serial emulation) monitor mode compatible with Arduino
|
||||
* USB CDC (Serial emulation) monitor mode compatible with Arduino
|
||||
(including XYZ commands) and BOSSA flashing tool
|
||||
* USB MSC interface for writing UF2 files
|
||||
* reading of the contests of the flash as an UF2 file via USB MSC
|
||||
|
|
@ -37,7 +38,7 @@ In `uf2conv.c` you can find a small converter from `.bin` to `.uf2`.
|
|||
|
||||
## Board identification
|
||||
|
||||
Configuration files for board `foo` is in `boards/foo/board_config.h`. You can
|
||||
Configuration files for board `foo` are in `boards/foo/board_config.h` and `board.mk`. You can
|
||||
build it with `make BOARD=foo`. You can also create `Makefile.user` file with `BOARD=foo`
|
||||
to change the default.
|
||||
|
||||
|
|
@ -74,24 +75,49 @@ Thus, to update the bootloader, one can ship a user-space program,
|
|||
that contains the new version of the bootloader and copies it to the
|
||||
appropriate place in flash.
|
||||
|
||||
Such a program is generated during build in files `self-uf2-bootloader.bin`
|
||||
and `self-uf2-bootloader.uf2`.
|
||||
Such a program is generated during build in files `update-bootloader*.uf2`.
|
||||
If you're already running UF2 bootloader, the easiest way to update
|
||||
it, is to just copy this file to the exposed MSD drive.
|
||||
|
||||
The build also generates `update-bootloader*.ino` with an equivalent Arduino
|
||||
sketch. You can copy&paste it into Arduino IDE and upload it to the device.
|
||||
|
||||
## Fuses
|
||||
|
||||
The SAMD21 supports a BOOTPROT fuse, which write-protects the flash area of
|
||||
### SAMD21
|
||||
|
||||
The SAMD21 supports a `BOOTPROT` fuse, which write-protects the flash area of
|
||||
the bootloader. Changes to this fuse only take effect after device reset.
|
||||
|
||||
This fuse is currently not utilized by this bootloader. It needs to be investigated.
|
||||
OpenOCD exposes `at91samd bootloader` command to set this fuse. **This command is buggy.**
|
||||
It seems to reset both fuse words to `0xffffffff`, which prevents the device
|
||||
from operating correctly (it seems to reboot very frequently).
|
||||
In `scripts/fuses.tcl` there is an OpenOCD script
|
||||
which correctly sets the fuse. It's invoked by `dbgtool.js fuses`. It can be also
|
||||
used to reset the fuses to sane values - just look at the comment at the top.
|
||||
|
||||
The bootloader update programs (both the `.uf2` file and the Arduino sketch)
|
||||
clear the `BOOTPROT` (i.e., set it to `0x7`) before trying to flash anything.
|
||||
After flashing is done, they set `BOOTPROT` to 8 kilobyte bootloader size (i.e, `0x2`).
|
||||
|
||||
### SAMD51
|
||||
|
||||
The SAMD51s bootloader protection can be temporarily disabled through an NVM
|
||||
command rather than a full erase and write of the AUX page. The boot protection
|
||||
will be checked and set by the self updaters.
|
||||
|
||||
So, if you've used self-updaters but want to load it directly, then you'll need
|
||||
to temporarily turn off the protection. In gdb the command is:
|
||||
|
||||
`set ((Nvmctrl *)0x41004000UL)->CTRLB.reg = (0xA5 << 8) | 0x1a`
|
||||
|
||||
## Build
|
||||
|
||||
### Requirements
|
||||
|
||||
* `make` and an Unix environment
|
||||
* `node`.js in path
|
||||
* `arm-none-eabi-gcc` in the path (the one coming with Yotta will do just fine)
|
||||
* `node`.js in path (optional)
|
||||
* `arm-none-eabi-gcc` in the path (the one coming with Yotta will do just fine). You can get the latest version from ARM: https://developer.arm.com/open-source/gnu-toolchain/gnu-rm/downloads
|
||||
* `openocd` - you can use the one coming with Arduino (after your install the M0 board support)
|
||||
|
||||
Atmel Studio is not supported.
|
||||
|
|
@ -106,7 +132,7 @@ Otherwise, you can use other SAMD21 board and an external `openocd` compatible
|
|||
debugger. IBDAP is cheap and seems to work just fine. Another option is to use
|
||||
Raspberry Pi and native bit-banging.
|
||||
|
||||
`openocd` will flash 16k, meaning the beginning of user program (if any) will
|
||||
`openocd` will flash 16k, meaning that on SAMD21 the beginning of user program (if any) will
|
||||
be overwritten with `0xff`. This also means that after fresh flashing of bootloader
|
||||
no double-tap reset is necessary, as the bootloader will not try to start application
|
||||
at `0xffffffff`.
|
||||
|
|
@ -116,10 +142,10 @@ at `0xffffffff`.
|
|||
The default board is `zero`. You can build a different one using:
|
||||
|
||||
```
|
||||
make BOARD=metro
|
||||
make BOARD=metro_m0
|
||||
```
|
||||
|
||||
If you're working on different board, it's best to create `Makefile.local`
|
||||
If you're working on different board, it's best to create `Makefile.local`
|
||||
with say `BOARD=metro` to change the default.
|
||||
The names `zero` and `metro` refer to subdirectories of `boards/`.
|
||||
|
||||
|
|
@ -140,31 +166,34 @@ make r
|
|||
There is a number of configuration parameters at the top of `uf2.h` file.
|
||||
Adjust them to your liking.
|
||||
|
||||
By default, you cannot enable all the features, as the bootloader would exceed
|
||||
the 8k allocated to it by Arduino etc. It will assert on startup that it's not bigger
|
||||
than 8k. Also, the linker script will not allow it.
|
||||
By default, you cannot enable all the features, as the bootloader would exceed
|
||||
the 8k(SAMD21)/16k(SAMD51) allocated to it by Arduino etc. It will assert on startup that it's not bigger
|
||||
than 8k(SAMD21)/16k(SAMD51). Also, the linker script will not allow it.
|
||||
|
||||
Three typical configurations are:
|
||||
|
||||
* HID, WebUSB, MSC, plus flash reading via FAT; UART and CDC disabled;
|
||||
* HID, WebUSB, MSC, plus flash reading via FAT; UART and CDC disabled;
|
||||
logging optional; **recommended**
|
||||
* USB CDC and MSC, plus flash reading via FAT; UART disabled;
|
||||
* USB CDC and MSC, plus flash reading via FAT; UART disabled;
|
||||
logging optional; this may have Windows driver problems
|
||||
* USB CDC and MSC, no flash reading via FAT; UART enabled;
|
||||
logging disabled;
|
||||
* USB CDC and MSC, no flash reading via FAT (or at least `index.htm` disabled); UART enabled;
|
||||
logging disabled; no handover; no HID;
|
||||
only this one if you need the UART support in bootloader for whatever reason
|
||||
|
||||
CDC and MSC together will work on Linux and Mac with no drivers.
|
||||
On Windows, if you have drivers installed for the USB ID chosen,
|
||||
On Windows, if you have drivers installed for the USB ID chosen,
|
||||
then CDC might work and MSC will not work;
|
||||
otherwise, if you have no drivers, MSC will work, and CDC will work on Windows 10 only.
|
||||
Thus, it's best to set the USB ID to one for which there are no drivers.
|
||||
|
||||
The bootloader sits at 0x00000000, and the application starts at 0x00002000.
|
||||
The bootloader sits at 0x00000000, and the application starts at 0x00002000 (SAMD21) or 0x00004000 (SAMD51).
|
||||
|
||||
## Code of Conduct
|
||||
|
||||
This project has adopted the [Microsoft Open Source Code of Conduct](https://opensource.microsoft.com/codeofconduct/). For more information see the [Code of Conduct FAQ](https://opensource.microsoft.com/codeofconduct/faq/) or contact [opencode@microsoft.com](mailto:opencode@microsoft.com) with any additional questions or comments.
|
||||
|
||||
## License
|
||||
|
||||
The original SAM-BA bootloader is licensed under BSD-like license from Atmel.
|
||||
See THIRD-PARTY-NOTICES.txt for the original SAM-BA bootloader license from Atmel.
|
||||
|
||||
The new code is licensed under MIT.
|
||||
|
|
|
|||
161
THIRD-PARTY-NOTICES.txt
Normal file
161
THIRD-PARTY-NOTICES.txt
Normal file
|
|
@ -0,0 +1,161 @@
|
|||
/*!----------------- UF2-SAMD21 ThirdPartyNotices -------------------------------------------------------
|
||||
|
||||
|
||||
|
||||
UF2-SAMD21 uses third party material from the projects listed below.
|
||||
|
||||
The original copyright notice and the license under which Microsoft
|
||||
|
||||
received such third party material are set forth below. Microsoft
|
||||
|
||||
reserves all other rights not expressly granted, whether by
|
||||
|
||||
implication, estoppel or otherwise.
|
||||
|
||||
|
||||
|
||||
In the event that we accidentally failed to list a required notice, please
|
||||
|
||||
bring it to our attention. Post an issue or email us:
|
||||
|
||||
|
||||
|
||||
yelmteam@microsoft.com
|
||||
|
||||
|
||||
|
||||
---------------------------------------------
|
||||
|
||||
Third Party Code Components
|
||||
|
||||
---------------------------------------------
|
||||
|
||||
----------------- SAM Software Package License -------------------
|
||||
|
||||
Copyright (c) 2011-2014, Atmel Corporation
|
||||
|
||||
All rights reserved.
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following condition is met:
|
||||
|
||||
Redistributions of source code must retain the above copyright notice,
|
||||
this list of conditions and the disclaimer below.
|
||||
|
||||
Atmel's name may not be used to endorse or promote products derived from
|
||||
this software without specific prior written permission.
|
||||
|
||||
DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
||||
IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
||||
OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
||||
LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
||||
NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
||||
EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
----------------------------------------------------------------------------
|
||||
|
||||
----------------- Atmel Software Framework (ASF)--------------------------------------
|
||||
|
||||
Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
|
||||
|
||||
\asf_license_start
|
||||
|
||||
\page License
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
|
||||
1. Redistributions of source code must retain the above copyright notice,
|
||||
this list of conditions and the following disclaimer.
|
||||
|
||||
2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
this list of conditions and the following disclaimer in the documentation
|
||||
and/or other materials provided with the distribution.
|
||||
|
||||
3. The name of Atmel may not be used to endorse or promote products derived
|
||||
from this software without specific prior written permission.
|
||||
|
||||
4. This software may only be redistributed and used in connection with an
|
||||
Atmel microcontroller product.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
\asf_license_stop
|
||||
----------------------------------------------------------------------------
|
||||
|
||||
----------------- Atmel Software Framework (ASF)--------------------------------------
|
||||
Copyright (c) 2016 Atmel Corporation. All rights reserved.
|
||||
|
||||
\asf_license_start
|
||||
|
||||
\page License
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
|
||||
1. Redistributions of source code must retain the above copyright notice,
|
||||
this list of conditions and the following disclaimer.
|
||||
|
||||
2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
this list of conditions and the following disclaimer in the documentation
|
||||
and/or other materials provided with the distribution.
|
||||
|
||||
3. The name of Atmel may not be used to endorse or promote products derived
|
||||
from this software without specific prior written permission.
|
||||
|
||||
4. This software may only be redistributed and used in connection with an
|
||||
Atmel microcontroller product.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
-------------------------------------------------------
|
||||
|
||||
---------------------------ARM-------------------------------------------------
|
||||
|
||||
Copyright (c) 2009 - 2014 ARM LIMITED
|
||||
|
||||
All rights reserved.
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
- Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
- Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
- Neither the name of ARM nor the names of its contributors may be used
|
||||
to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
---------------------------------------------------------------------------
|
||||
24
TODO.md
24
TODO.md
|
|
@ -1,24 +0,0 @@
|
|||
## Current
|
||||
* [x] separate logs out
|
||||
* [x] no volume label shows under Windows
|
||||
* [x] extend magic with "UF2\n" string
|
||||
* [x] align data in block to 32 bytes (for hex viewer)
|
||||
* [x] show board serial number and name in info file
|
||||
* [x] organize board configs in directories
|
||||
* [x] if `!USE_CDC && !USE_UART` - don't compile monitor
|
||||
* [x] if `!USE_CDC` don't compile the CDC code (not only exclude descriptors)
|
||||
* [x] write user program for updating bootloader
|
||||
* [ ] document self-updater
|
||||
* [ ] write u2fconv in .js
|
||||
* [x] investigate some blinking; also RX/TX leds
|
||||
* [ ] add optional logic to self-updater to check if existing bootloader has the same board-id
|
||||
* [x] detect end of transmission by block numbers
|
||||
* [ ] add UF2 write support to PXT
|
||||
* [ ] add UF2 read support to PXT
|
||||
|
||||
## Bigger
|
||||
* [ ] look into reset into bootloader from host to continue flashing
|
||||
* [ ] use BOOTPROT bits - requires device reset to set
|
||||
* [ ] investigate no-reset on the MSD device
|
||||
* [ ] investigate webusb
|
||||
|
||||
|
|
@ -1,445 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Standard board header file.
|
||||
*
|
||||
* This file includes the appropriate board header file according to the
|
||||
* defined board (parameter BOARD).
|
||||
*
|
||||
* Copyright (c) 2009-2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef _BOARD_H_
|
||||
#define _BOARD_H_
|
||||
|
||||
/**
|
||||
* \defgroup group_common_boards Generic board support
|
||||
*
|
||||
* The generic board support module includes board-specific definitions
|
||||
* and function prototypes, such as the board initialization function.
|
||||
*
|
||||
* \{
|
||||
*/
|
||||
|
||||
#include "compiler.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
/*! \name Base Boards
|
||||
*/
|
||||
//! @{
|
||||
#define EVK1100 1 //!< AT32UC3A EVK1100 board.
|
||||
#define EVK1101 2 //!< AT32UC3B EVK1101 board.
|
||||
#define UC3C_EK 3 //!< AT32UC3C UC3C-EK board.
|
||||
#define EVK1104 4 //!< AT32UC3A3 EVK1104 board.
|
||||
#define EVK1105 5 //!< AT32UC3A EVK1105 board.
|
||||
#define STK600_RCUC3L0 6 //!< STK600 RCUC3L0 board.
|
||||
#define UC3L_EK 7 //!< AT32UC3L-EK board.
|
||||
#define XPLAIN 8 //!< ATxmega128A1 Xplain board.
|
||||
#define STK600_RC064X 10 //!< ATxmega256A3 STK600 board.
|
||||
#define STK600_RC100X 11 //!< ATxmega128A1 STK600 board.
|
||||
#define UC3_A3_XPLAINED 13 //!< ATUC3A3 UC3-A3 Xplained board.
|
||||
#define UC3_L0_XPLAINED 15 //!< ATUC3L0 UC3-L0 Xplained board.
|
||||
#define STK600_RCUC3D 16 //!< STK600 RCUC3D board.
|
||||
#define STK600_RCUC3C0 17 //!< STK600 RCUC3C board.
|
||||
#define XMEGA_B1_XPLAINED 18 //!< ATxmega128B1 Xplained board.
|
||||
#define XMEGA_A1_XPLAINED 19 //!< ATxmega128A1 Xplain-A1 board.
|
||||
#define XMEGA_A1U_XPLAINED_PRO 20 //!< ATxmega128A1U XMEGA-A1U Xplained Pro board.
|
||||
#define STK600_RCUC3L4 21 //!< ATUCL4 STK600 board.
|
||||
#define UC3_L0_XPLAINED_BC 22 //!< ATUC3L0 UC3-L0 Xplained board controller board.
|
||||
#define MEGA1284P_XPLAINED_BC 23 //!< ATmega1284P-Xplained board controller board.
|
||||
#define STK600_RC044X 24 //!< STK600 with RC044X routing card board.
|
||||
#define STK600_RCUC3B0 25 //!< STK600 RCUC3B0 board.
|
||||
#define UC3_L0_QT600 26 //!< QT600 UC3L0 MCU board.
|
||||
#define XMEGA_A3BU_XPLAINED 27 //!< ATxmega256A3BU Xplained board.
|
||||
#define STK600_RC064X_LCDX 28 //!< XMEGAB3 STK600 RC064X LCDX board.
|
||||
#define STK600_RC100X_LCDX 29 //!< XMEGAB1 STK600 RC100X LCDX board.
|
||||
#define UC3B_BOARD_CONTROLLER 30 //!< AT32UC3B1 board controller for Atmel boards.
|
||||
#define RZ600 31 //!< AT32UC3A RZ600 MCU board.
|
||||
#define SAM3S_EK 32 //!< SAM3S-EK board.
|
||||
#define SAM3U_EK 33 //!< SAM3U-EK board.
|
||||
#define SAM3X_EK 34 //!< SAM3X-EK board.
|
||||
#define SAM3N_EK 35 //!< SAM3N-EK board.
|
||||
#define SAM3S_EK2 36 //!< SAM3S-EK2 board.
|
||||
#define SAM4S_EK 37 //!< SAM4S-EK board.
|
||||
#define STK600_RCUC3A0 38 //!< STK600 RCUC3A0 board.
|
||||
#define STK600_MEGA 39 //!< STK600 MEGA board.
|
||||
#define MEGA_1284P_XPLAINED 40 //!< ATmega1284P Xplained board.
|
||||
#define SAM4S_XPLAINED 41 //!< SAM4S Xplained board.
|
||||
#define ATXMEGA128A1_QT600 42 //!< QT600 ATXMEGA128A1 MCU board.
|
||||
#define ARDUINO_DUE_X 43 //!< Arduino Due/X board.
|
||||
#define STK600_RCUC3L3 44 //!< ATUCL3 STK600 board.
|
||||
#define SAM4L_EK 45 //!< SAM4L-EK board.
|
||||
#define STK600_MEGA_RF 46 //!< STK600 MEGA RF EVK board.
|
||||
#define XMEGA_C3_XPLAINED 47 //!< ATxmega384C3 Xplained board.
|
||||
#define STK600_RC032X 48 //!< STK600 with RC032X routing card board.
|
||||
#define SAM4S_EK2 49 //!< SAM4S-EK2 board.
|
||||
#define XMEGA_E5_XPLAINED 50 //!< ATxmega32E5 Xplained board.
|
||||
#define SAM4E_EK 51 //!< SAM4E-EK board.
|
||||
#define ATMEGA256RFR2_XPLAINED_PRO 52 //!< ATmega256RFR2 Xplained Pro board.
|
||||
#define SAM4S_XPLAINED_PRO 53 //!< SAM4S Xplained Pro board.
|
||||
#define SAM4L_XPLAINED_PRO 54 //!< SAM4L Xplained Pro board.
|
||||
#define ATMEGA256RFR2_ZIGBIT 55 //!< ATmega256RFR2 zigbit.
|
||||
#define XMEGA_RF233_ZIGBIT 56 //!< ATxmega256A3U with AT86RF233 Zigbit.
|
||||
#define XMEGA_RF212B_ZIGBIT 57 //!< ATxmega256A3U with AT86RF212B Zigbit.
|
||||
#define SAM4S_WPIR_RD 58 //!< SAM4S-WPIR-RD board.
|
||||
#define SAMD20_XPLAINED_PRO 59 //!< SAM D20 Xplained Pro board.
|
||||
#define SAM4L8_XPLAINED_PRO 60 //!< SAM4L8 Xplained Pro board.
|
||||
#define SAM4N_XPLAINED_PRO 61 //!< SAM4N Xplained Pro board.
|
||||
#define XMEGA_A3_REB_CBB 62 //!< XMEGA REB Controller Base board.
|
||||
#define ATMEGARFX_RCB 63 //!< RFR2 & RFA1 RCB.
|
||||
#define SAM4C_EK 64 //!< SAM4C-EK board.
|
||||
#define RCB256RFR2_XPRO 65 //!< RFR2 RCB Xplained Pro board.
|
||||
#define SAMG53_XPLAINED_PRO 66 //!< SAMG53 Xplained Pro board.
|
||||
#define SAM4CP16BMB 67 //!< SAM4CP16BMB board.
|
||||
#define SAM4E_XPLAINED_PRO 68 //!< SAM4E Xplained Pro board.
|
||||
#define SAMD21_XPLAINED_PRO 69 //!< SAM D21 Xplained Pro board.
|
||||
#define SAMR21_XPLAINED_PRO 70 //!< SAM R21 Xplained Pro board.
|
||||
#define SAM4CMP_DB 71 //!< SAM4CMP demo board.
|
||||
#define SAM4CMS_DB 72 //!< SAM4CMS demo board.
|
||||
#define ATPL230AMB 73 //!< ATPL230AMB board.
|
||||
#define SAMD11_XPLAINED_PRO 74 //!< SAM D11 Xplained Pro board.
|
||||
#define SAMG55_XPLAINED_PRO 75 //!< SAMG55 Xplained Pro board.
|
||||
#define SAML21_XPLAINED_PRO 76 //!< SAM L21 Xplained Pro board.
|
||||
#define SAMD10_XPLAINED_MINI 77 //!< SAM D10 Xplained Mini board.
|
||||
#define SAMDA1_XPLAINED_PRO 78 //!< SAM DA1 Xplained Pro board.
|
||||
#define SAMW25_XPLAINED_PRO 79 //!< SAMW25 Xplained Pro board.
|
||||
#define SAMC21_XPLAINED_PRO 80 //!< SAM C21 Xplained Pro board.
|
||||
#define SAMV71_XPLAINED_ULTRA 81 //!< SAMV71 Xplained Ultra board.
|
||||
#define ATMEGA328P_XPLAINED_MINI 82 //!< ATMEGA328P Xplained MINI board.
|
||||
#define ATMEGA328PB_XPLAINED_MINI 83 //!< ATMEGA328PB Xplained MINI board.
|
||||
#define SAMB11_XPLAINED_PRO 84 //!< SAM B11 Xplained Pro board.
|
||||
#define SAME70_XPLAINED 85 //!< SAME70 Xplained board.
|
||||
#define SAML22_XPLAINED_PRO 86 //!< SAM L22 Xplained Pro board.
|
||||
#define SAML22_XPLAINED_PRO_B 87 //!< SAM L22 Xplained Pro board.
|
||||
#define SAMR21ZLL_EK 88 //!< SAMR21ZLL-EK board.
|
||||
#define ATMEGA168PB_XPLAINED_MINI 89 //!< ATMEGA168PB Xplained MINI board.
|
||||
#define ATMEGA324PB_XPLAINED_PRO 90 //!< ATMEGA324PB Xplained Pro board.
|
||||
#define SAMB11CSP_XPLAINED_PRO 91 //!< SAM B11 CSP Xplained Pro board.
|
||||
#define SAMB11ZR_XPLAINED_PRO 92 //!< SAM B11 ZR Xplained Pro board.
|
||||
#define SAMR30_XPLAINED_PRO 93 //!< SAM R30 Xplained Pro board.
|
||||
#define SIMULATOR_XMEGA_A1 97 //!< Simulator for XMEGA A1 devices.
|
||||
#define AVR_SIMULATOR_UC3 98 //!< Simulator for the AVR UC3 device family.
|
||||
#define USER_BOARD 99 //!< User-reserved board (if any).
|
||||
#define DUMMY_BOARD 100 //!< Dummy board to support board-independent applications (e.g. bootloader).
|
||||
//! @}
|
||||
|
||||
/*! \name Extension Boards
|
||||
*/
|
||||
//! @{
|
||||
#define EXT1102 1 //!< AT32UC3B EXT1102 board
|
||||
#define MC300 2 //!< AT32UC3 MC300 board
|
||||
#define SENSORS_XPLAINED_INERTIAL_1 3 //!< Xplained inertial sensor board 1
|
||||
#define SENSORS_XPLAINED_INERTIAL_2 4 //!< Xplained inertial sensor board 2
|
||||
#define SENSORS_XPLAINED_PRESSURE_1 5 //!< Xplained pressure sensor board
|
||||
#define SENSORS_XPLAINED_LIGHTPROX_1 6 //!< Xplained light & proximity sensor board
|
||||
#define SENSORS_XPLAINED_INERTIAL_A1 7 //!< Xplained inertial sensor board "A"
|
||||
#define RZ600_AT86RF231 8 //!< AT86RF231 RF board in RZ600
|
||||
#define RZ600_AT86RF230B 9 //!< AT86RF230B RF board in RZ600
|
||||
#define RZ600_AT86RF212 10 //!< AT86RF212 RF board in RZ600
|
||||
#define SENSORS_XPLAINED_BREADBOARD 11 //!< Xplained sensor development breadboard
|
||||
#define SECURITY_XPLAINED 12 //!< Xplained ATSHA204 board
|
||||
#define USER_EXT_BOARD 99 //!< User-reserved extension board (if any).
|
||||
//! @}
|
||||
|
||||
#if BOARD == EVK1100
|
||||
# include "evk1100/evk1100.h"
|
||||
#elif BOARD == EVK1101
|
||||
# include "evk1101/evk1101.h"
|
||||
#elif BOARD == UC3C_EK
|
||||
# include "uc3c_ek/uc3c_ek.h"
|
||||
#elif BOARD == EVK1104
|
||||
# include "evk1104/evk1104.h"
|
||||
#elif BOARD == EVK1105
|
||||
# include "evk1105/evk1105.h"
|
||||
#elif BOARD == STK600_RCUC3L0
|
||||
# include "stk600/rcuc3l0/stk600_rcuc3l0.h"
|
||||
#elif BOARD == UC3L_EK
|
||||
# include "uc3l_ek/uc3l_ek.h"
|
||||
#elif BOARD == STK600_RCUC3L4
|
||||
# include "stk600/rcuc3l4/stk600_rcuc3l4.h"
|
||||
#elif BOARD == XPLAIN
|
||||
# include "xplain/xplain.h"
|
||||
#elif BOARD == STK600_MEGA
|
||||
/*No header-file to include*/
|
||||
#elif BOARD == STK600_MEGA_RF
|
||||
# include "stk600.h"
|
||||
#elif BOARD == ATMEGA256RFR2_XPLAINED_PRO
|
||||
# include "atmega256rfr2_xplained_pro/atmega256rfr2_xplained_pro.h"
|
||||
#elif BOARD == ATMEGA256RFR2_ZIGBIT
|
||||
# include "atmega256rfr2_zigbit/atmega256rfr2_zigbit.h"
|
||||
#elif BOARD == STK600_RC032X
|
||||
# include "stk600/rc032x/stk600_rc032x.h"
|
||||
#elif BOARD == STK600_RC044X
|
||||
# include "stk600/rc044x/stk600_rc044x.h"
|
||||
#elif BOARD == STK600_RC064X
|
||||
# include "stk600/rc064x/stk600_rc064x.h"
|
||||
#elif BOARD == STK600_RC100X
|
||||
# include "stk600/rc100x/stk600_rc100x.h"
|
||||
#elif BOARD == UC3_A3_XPLAINED
|
||||
# include "uc3_a3_xplained/uc3_a3_xplained.h"
|
||||
#elif BOARD == UC3_L0_XPLAINED
|
||||
# include "uc3_l0_xplained/uc3_l0_xplained.h"
|
||||
#elif BOARD == STK600_RCUC3B0
|
||||
# include "stk600/rcuc3b0/stk600_rcuc3b0.h"
|
||||
#elif BOARD == STK600_RCUC3D
|
||||
# include "stk600/rcuc3d/stk600_rcuc3d.h"
|
||||
#elif BOARD == STK600_RCUC3C0
|
||||
# include "stk600/rcuc3c0/stk600_rcuc3c0.h"
|
||||
#elif BOARD == SAMG53_XPLAINED_PRO
|
||||
# include "samg53_xplained_pro/samg53_xplained_pro.h"
|
||||
#elif BOARD == SAMG55_XPLAINED_PRO
|
||||
# include "samg55_xplained_pro/samg55_xplained_pro.h"
|
||||
#elif BOARD == XMEGA_B1_XPLAINED
|
||||
# include "xmega_b1_xplained/xmega_b1_xplained.h"
|
||||
#elif BOARD == STK600_RC064X_LCDX
|
||||
# include "stk600/rc064x_lcdx/stk600_rc064x_lcdx.h"
|
||||
#elif BOARD == STK600_RC100X_LCDX
|
||||
# include "stk600/rc100x_lcdx/stk600_rc100x_lcdx.h"
|
||||
#elif BOARD == XMEGA_A1_XPLAINED
|
||||
# include "xmega_a1_xplained/xmega_a1_xplained.h"
|
||||
#elif BOARD == XMEGA_A1U_XPLAINED_PRO
|
||||
# include "xmega_a1u_xplained_pro/xmega_a1u_xplained_pro.h"
|
||||
#elif BOARD == UC3_L0_XPLAINED_BC
|
||||
# include "uc3_l0_xplained_bc/uc3_l0_xplained_bc.h"
|
||||
#elif BOARD == SAM3S_EK
|
||||
# include "sam3s_ek/sam3s_ek.h"
|
||||
# include "system_sam3s.h"
|
||||
#elif BOARD == SAM3S_EK2
|
||||
# include "sam3s_ek2/sam3s_ek2.h"
|
||||
# include "system_sam3sd8.h"
|
||||
#elif BOARD == SAM3U_EK
|
||||
# include "sam3u_ek/sam3u_ek.h"
|
||||
# include "system_sam3u.h"
|
||||
#elif BOARD == SAM3X_EK
|
||||
# include "sam3x_ek/sam3x_ek.h"
|
||||
# include "system_sam3x.h"
|
||||
#elif BOARD == SAM3N_EK
|
||||
# include "sam3n_ek/sam3n_ek.h"
|
||||
# include "system_sam3n.h"
|
||||
#elif BOARD == SAM4S_EK
|
||||
# include "sam4s_ek/sam4s_ek.h"
|
||||
# include "system_sam4s.h"
|
||||
#elif BOARD == SAM4S_WPIR_RD
|
||||
# include "sam4s_wpir_rd/sam4s_wpir_rd.h"
|
||||
# include "system_sam4s.h"
|
||||
#elif BOARD == SAM4S_XPLAINED
|
||||
# include "sam4s_xplained/sam4s_xplained.h"
|
||||
# include "system_sam4s.h"
|
||||
#elif BOARD == SAM4S_EK2
|
||||
# include "sam4s_ek2/sam4s_ek2.h"
|
||||
# include "system_sam4s.h"
|
||||
#elif BOARD == MEGA_1284P_XPLAINED
|
||||
/*No header-file to include*/
|
||||
#elif BOARD == ARDUINO_DUE_X
|
||||
# include "arduino_due_x/arduino_due_x.h"
|
||||
# include "system_sam3x.h"
|
||||
#elif BOARD == SAM4L_EK
|
||||
# include "sam4l_ek/sam4l_ek.h"
|
||||
#elif BOARD == SAM4E_EK
|
||||
# include "sam4e_ek/sam4e_ek.h"
|
||||
#elif BOARD == SAMD20_XPLAINED_PRO
|
||||
# include "samd20_xplained_pro/samd20_xplained_pro.h"
|
||||
#elif BOARD == SAMD21_XPLAINED_PRO
|
||||
# include "samd21_xplained_pro/samd21_xplained_pro.h"
|
||||
#elif BOARD == SAMR21_XPLAINED_PRO
|
||||
# include "samr21_xplained_pro/samr21_xplained_pro.h"
|
||||
#elif BOARD == SAMR30_XPLAINED_PRO
|
||||
# include "samr30_xplained_pro/samr30_xplained_pro.h"
|
||||
#elif BOARD == SAMR21ZLL_EK
|
||||
# include "samr21zll_ek/samr21zll_ek.h"
|
||||
#elif BOARD == SAMD11_XPLAINED_PRO
|
||||
# include "samd11_xplained_pro/samd11_xplained_pro.h"
|
||||
#elif BOARD == SAML21_XPLAINED_PRO && defined(__SAML21J18A__)
|
||||
# include "saml21_xplained_pro/saml21_xplained_pro.h"
|
||||
#elif BOARD == SAML22_XPLAINED_PRO
|
||||
# include "saml22_xplained_pro/saml22_xplained_pro.h"
|
||||
#elif BOARD == SAML22_XPLAINED_PRO_B
|
||||
# include "saml22_xplained_pro_b/saml22_xplained_pro_b.h"
|
||||
#elif BOARD == SAML21_XPLAINED_PRO && defined(__SAML21J18B__)
|
||||
# include "saml21_xplained_pro_b/saml21_xplained_pro.h"
|
||||
#elif BOARD == SAMD10_XPLAINED_MINI
|
||||
# include "samd10_xplained_mini/samd10_xplained_mini.h"
|
||||
#elif BOARD == SAMDA1_XPLAINED_PRO
|
||||
# include "samda1_xplained_pro/samda1_xplained_pro.h"
|
||||
#elif BOARD == SAMC21_XPLAINED_PRO
|
||||
# include "samc21_xplained_pro/samc21_xplained_pro.h"
|
||||
#elif BOARD == SAM4N_XPLAINED_PRO
|
||||
# include "sam4n_xplained_pro/sam4n_xplained_pro.h"
|
||||
#elif BOARD == SAMW25_XPLAINED_PRO
|
||||
# include "samw25_xplained_pro/samw25_xplained_pro.h"
|
||||
#elif BOARD == SAMV71_XPLAINED_ULTRA
|
||||
# include "samv71_xplained_ultra/samv71_xplained_ultra.h"
|
||||
#elif BOARD == MEGA1284P_XPLAINED_BC
|
||||
# include "mega1284p_xplained_bc/mega1284p_xplained_bc.h"
|
||||
#elif BOARD == UC3_L0_QT600
|
||||
# include "uc3_l0_qt600/uc3_l0_qt600.h"
|
||||
#elif BOARD == XMEGA_A3BU_XPLAINED
|
||||
# include "xmega_a3bu_xplained/xmega_a3bu_xplained.h"
|
||||
#elif BOARD == XMEGA_E5_XPLAINED
|
||||
# include "xmega_e5_xplained/xmega_e5_xplained.h"
|
||||
#elif BOARD == UC3B_BOARD_CONTROLLER
|
||||
# include "uc3b_board_controller/uc3b_board_controller.h"
|
||||
#elif BOARD == RZ600
|
||||
# include "rz600/rz600.h"
|
||||
#elif BOARD == STK600_RCUC3A0
|
||||
# include "stk600/rcuc3a0/stk600_rcuc3a0.h"
|
||||
#elif BOARD == ATXMEGA128A1_QT600
|
||||
# include "atxmega128a1_qt600/atxmega128a1_qt600.h"
|
||||
#elif BOARD == STK600_RCUC3L3
|
||||
# include "stk600/rcuc3l3/stk600_rcuc3l3.h"
|
||||
#elif BOARD == SAM4S_XPLAINED_PRO
|
||||
# include "sam4s_xplained_pro/sam4s_xplained_pro.h"
|
||||
#elif BOARD == SAM4L_XPLAINED_PRO
|
||||
# include "sam4l_xplained_pro/sam4l_xplained_pro.h"
|
||||
#elif BOARD == SAM4L8_XPLAINED_PRO
|
||||
# include "sam4l8_xplained_pro/sam4l8_xplained_pro.h"
|
||||
#elif BOARD == SAM4C_EK
|
||||
# include "sam4c_ek/sam4c_ek.h"
|
||||
#elif BOARD == SAM4CMP_DB
|
||||
# include "sam4cmp_db/sam4cmp_db.h"
|
||||
#elif BOARD == SAM4CMS_DB
|
||||
# include "sam4cms_db/sam4cms_db.h"
|
||||
#elif BOARD == SAM4CP16BMB
|
||||
# include "sam4cp16bmb/sam4cp16bmb.h"
|
||||
#elif BOARD == ATPL230AMB
|
||||
# include "atpl230amb/atpl230amb.h"
|
||||
#elif BOARD == XMEGA_C3_XPLAINED
|
||||
# include "xmega_c3_xplained/xmega_c3_xplained.h"
|
||||
#elif BOARD == XMEGA_RF233_ZIGBIT
|
||||
# include "xmega_rf233_zigbit/xmega_rf233_zigbit.h"
|
||||
#elif BOARD == XMEGA_A3_REB_CBB
|
||||
# include "xmega_a3_reb_cbb/xmega_a3_reb_cbb.h"
|
||||
#elif BOARD == ATMEGARFX_RCB
|
||||
# include "atmegarfx_rcb/atmegarfx_rcb.h"
|
||||
#elif BOARD == RCB256RFR2_XPRO
|
||||
# include "atmega256rfr2_rcb_xpro/atmega256rfr2_rcb_xpro.h"
|
||||
#elif BOARD == XMEGA_RF212B_ZIGBIT
|
||||
# include "xmega_rf212b_zigbit/xmega_rf212b_zigbit.h"
|
||||
#elif BOARD == SAM4E_XPLAINED_PRO
|
||||
# include "sam4e_xplained_pro/sam4e_xplained_pro.h"
|
||||
#elif BOARD == ATMEGA328P_XPLAINED_MINI
|
||||
# include "atmega328p_xplained_mini/atmega328p_xplained_mini.h"
|
||||
#elif BOARD == ATMEGA328PB_XPLAINED_MINI
|
||||
# include "atmega328pb_xplained_mini/atmega328pb_xplained_mini.h"
|
||||
#elif BOARD == SAMB11_XPLAINED_PRO
|
||||
# include "samb11_xplained_pro/samb11_xplained_pro.h"
|
||||
#elif BOARD == SAME70_XPLAINED
|
||||
# include "same70_xplained/same70_xplained.h"
|
||||
#elif BOARD == ATMEGA168PB_XPLAINED_MINI
|
||||
# include "atmega168pb_xplained_mini/atmega168pb_xplained_mini.h"
|
||||
#elif BOARD == ATMEGA324PB_XPLAINED_PRO
|
||||
# include "atmega324pb_xplained_pro/atmega324pb_xplained_pro.h"
|
||||
#elif BOARD == SAMB11CSP_XPLAINED_PRO
|
||||
# include "samb11csp_xplained_pro/samb11csp_xplained_pro.h"
|
||||
#elif BOARD == SAMB11ZR_XPLAINED_PRO
|
||||
# include "samb11zr_xplained_pro/samb11zr_xplained_pro.h"
|
||||
#elif BOARD == SIMULATOR_XMEGA_A1
|
||||
# include "simulator/xmega_a1/simulator_xmega_a1.h"
|
||||
#elif BOARD == AVR_SIMULATOR_UC3
|
||||
# include "avr_simulator_uc3/avr_simulator_uc3.h"
|
||||
#elif BOARD == USER_BOARD
|
||||
// User-reserved area: #include the header file of your board here (if any).
|
||||
# include "user_board.h"
|
||||
#elif BOARD == DUMMY_BOARD
|
||||
# include "dummy/dummy_board.h"
|
||||
#else
|
||||
# error No known Atmel board defined
|
||||
#endif
|
||||
|
||||
#if (defined EXT_BOARD)
|
||||
# if EXT_BOARD == MC300
|
||||
# include "mc300/mc300.h"
|
||||
# elif (EXT_BOARD == SENSORS_XPLAINED_INERTIAL_1) || \
|
||||
(EXT_BOARD == SENSORS_XPLAINED_INERTIAL_2) || \
|
||||
(EXT_BOARD == SENSORS_XPLAINED_INERTIAL_A1) || \
|
||||
(EXT_BOARD == SENSORS_XPLAINED_PRESSURE_1) || \
|
||||
(EXT_BOARD == SENSORS_XPLAINED_LIGHTPROX_1) || \
|
||||
(EXT_BOARD == SENSORS_XPLAINED_BREADBOARD)
|
||||
# include "sensors_xplained/sensors_xplained.h"
|
||||
# elif EXT_BOARD == RZ600_AT86RF231
|
||||
# include "at86rf231/at86rf231.h"
|
||||
# elif EXT_BOARD == RZ600_AT86RF230B
|
||||
# include "at86rf230b/at86rf230b.h"
|
||||
# elif EXT_BOARD == RZ600_AT86RF212
|
||||
# include "at86rf212/at86rf212.h"
|
||||
# elif EXT_BOARD == SECURITY_XPLAINED
|
||||
# include "security_xplained.h"
|
||||
# elif EXT_BOARD == USER_EXT_BOARD
|
||||
// User-reserved area: #include the header file of your extension board here
|
||||
// (if any).
|
||||
# endif
|
||||
#endif
|
||||
|
||||
|
||||
#if (defined(__GNUC__) && defined(__AVR32__)) || (defined(__ICCAVR32__) || defined(__AAVR32__))
|
||||
#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
|
||||
|
||||
/*! \brief This function initializes the board target resources
|
||||
*
|
||||
* This function should be called to ensure proper initialization of the target
|
||||
* board hardware connected to the part.
|
||||
*/
|
||||
extern void board_init(void);
|
||||
|
||||
#endif // #ifdef __AVR32_ABI_COMPILER__
|
||||
#else
|
||||
/*! \brief This function initializes the board target resources
|
||||
*
|
||||
* This function should be called to ensure proper initialization of the target
|
||||
* board hardware connected to the part.
|
||||
*/
|
||||
extern void board_init(void);
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \}
|
||||
*/
|
||||
|
||||
#endif // _BOARD_H_
|
||||
|
|
@ -1,339 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Management of the virtual memory.
|
||||
*
|
||||
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* \defgroup group_common_components_memory_virtual_mem Virtual Memory in RAM
|
||||
*
|
||||
* The component manages a disk on a volatile memory (internal RAM).
|
||||
* This can be connected to a File System management or a USB Device
|
||||
* Mass Storage Interface via the service Memory Control Access.
|
||||
*
|
||||
* \{
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
//_____ I N C L U D E S ___________________________________________________
|
||||
|
||||
#include "conf_access.h"
|
||||
#include "conf_virtual_mem.h"
|
||||
|
||||
|
||||
#if VIRTUAL_MEM == ENABLE
|
||||
|
||||
#include "virtual_mem.h"
|
||||
#include <string.h>
|
||||
|
||||
|
||||
#ifndef VMEM_NB_SECTOR
|
||||
# error Define VMEM_NB_SECTOR in conf_virtual_mem.h file
|
||||
#endif
|
||||
|
||||
//_____ M A C R O S ________________________________________________________
|
||||
|
||||
//_____ P R I V A T E D E C L A R A T I O N S ____________________________
|
||||
|
||||
|
||||
//_____ D E F I N I T I O N S ______________________________________________
|
||||
|
||||
#ifdef VMEM_ADDRESS
|
||||
// Virtual disk memory start address is defined in conf_virtual_mem.h
|
||||
# if (0 != (VMEM_ADDRESS & 0x3))
|
||||
# error VMEM_ADDRESS defined in conf_virtual_mem.h must be a WORD address
|
||||
# endif
|
||||
# if (VMEM_ADDRESS + (VMEM_NB_SECTOR * VMEM_SECTOR_SIZE) - 1) > UINTPTR_MAX
|
||||
# include <hugemem.h>
|
||||
static hugemem_ptr_t vmem_data = (hugemem_ptr_t)VMEM_ADDRESS;
|
||||
# else
|
||||
static uint8_t* vmem_data = (uint8_t*)VMEM_ADDRESS;
|
||||
# endif
|
||||
#else
|
||||
COMPILER_WORD_ALIGNED
|
||||
static uint8_t vmem_data[VMEM_NB_SECTOR * VMEM_SECTOR_SIZE];
|
||||
#endif
|
||||
|
||||
static bool b_vmem_unloaded = false;
|
||||
|
||||
//_____ D E C L A R A T I O N S ____________________________________________
|
||||
|
||||
//! This function tests memory state, and starts memory initialization
|
||||
//! @return Ctrl_status
|
||||
//! It is ready -> CTRL_GOOD
|
||||
//! Memory unplug -> CTRL_NO_PRESENT
|
||||
//! Not initialized or changed -> CTRL_BUSY
|
||||
//! An error occurred -> CTRL_FAIL
|
||||
Ctrl_status virtual_test_unit_ready(void)
|
||||
{
|
||||
return b_vmem_unloaded ? CTRL_NO_PRESENT : CTRL_GOOD;
|
||||
}
|
||||
|
||||
|
||||
//! This function returns the address of the last valid sector
|
||||
//! @param uint32_t_nb_sector Pointer to number of sectors (sector=512 bytes)
|
||||
//! @return Ctrl_status
|
||||
//! It is ready -> CTRL_GOOD
|
||||
//! Memory unplug -> CTRL_NO_PRESENT
|
||||
//! Not initialized or changed -> CTRL_BUSY
|
||||
//! An error occurred -> CTRL_FAIL
|
||||
Ctrl_status virtual_read_capacity(uint32_t *uint32_t_nb_sector)
|
||||
{
|
||||
if (b_vmem_unloaded) {
|
||||
return CTRL_NO_PRESENT;
|
||||
}
|
||||
|
||||
if (VMEM_NB_SECTOR<8) {
|
||||
*uint32_t_nb_sector = 8-1;
|
||||
} else {
|
||||
*uint32_t_nb_sector = VMEM_NB_SECTOR- 1;
|
||||
}
|
||||
return CTRL_GOOD;
|
||||
}
|
||||
|
||||
|
||||
//! This function returns the write-protected mode
|
||||
//!
|
||||
//! @return true if the memory is protected
|
||||
//!
|
||||
bool virtual_wr_protect(void)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
|
||||
//! This function informs about the memory type
|
||||
//!
|
||||
//! @return true if the memory is removable
|
||||
//!
|
||||
bool virtual_removal(void)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
//! This function unloads/loads the memory
|
||||
//!
|
||||
//! @return true if the memory is unloaded
|
||||
//!
|
||||
bool virtual_unload(bool unload)
|
||||
{
|
||||
b_vmem_unloaded = unload;
|
||||
return true;
|
||||
}
|
||||
|
||||
//------------ SPECIFIC FUNCTIONS FOR TRANSFER BY USB -------------------------
|
||||
|
||||
#if ACCESS_USB == true
|
||||
|
||||
#include "udi_msc.h"
|
||||
|
||||
//! This function transfers the data between memory and USB MSC interface
|
||||
//!
|
||||
//! @param addr Sector address to start read
|
||||
//! @param nb_sector Number of sectors to transfer (sector=512 bytes)
|
||||
//! @param b_read Memory to USB, if true
|
||||
//!
|
||||
//! @return Ctrl_status
|
||||
//! It is ready -> CTRL_GOOD
|
||||
//! Memory unplug -> CTRL_NO_PRESENT
|
||||
//! Not initialized or changed -> CTRL_BUSY
|
||||
//! An error occurred -> CTRL_FAIL
|
||||
//!
|
||||
static Ctrl_status virtual_usb_trans(uint32_t addr, uint16_t nb_sector,
|
||||
bool b_read)
|
||||
{
|
||||
/* USB DMA for XMEGA only works on internal RAM, so use a temporal buffer if
|
||||
* it's outside this.
|
||||
*/
|
||||
#if defined(VMEM_ADDRESS) && ((VMEM_ADDRESS + (VMEM_NB_SECTOR * VMEM_SECTOR_SIZE) - 1) > UINTPTR_MAX)
|
||||
uint8_t buffer[VMEM_SECTOR_SIZE];
|
||||
hugemem_ptr_t ptr_cram;
|
||||
|
||||
if ((addr > VMEM_NB_SECTOR) || (addr + nb_sector > VMEM_NB_SECTOR)) {
|
||||
return CTRL_FAIL;
|
||||
}
|
||||
|
||||
while (nb_sector) {
|
||||
ptr_cram = (hugemem_ptr_t)((uint32_t)vmem_data
|
||||
+ (addr++ * VMEM_SECTOR_SIZE));
|
||||
if (b_read) {
|
||||
hugemem_read_block(buffer, ptr_cram, VMEM_SECTOR_SIZE);
|
||||
if (!udi_msc_trans_block(b_read, buffer,
|
||||
VMEM_SECTOR_SIZE, NULL)) {
|
||||
return CTRL_FAIL; // transfer aborted
|
||||
}
|
||||
} else {
|
||||
if (!udi_msc_trans_block(b_read, buffer,
|
||||
VMEM_SECTOR_SIZE, NULL)) {
|
||||
return CTRL_FAIL; // transfer aborted
|
||||
}
|
||||
hugemem_write_block(ptr_cram, buffer,
|
||||
VMEM_SECTOR_SIZE);
|
||||
}
|
||||
nb_sector -= 1;
|
||||
}
|
||||
#else
|
||||
uint8_t *ptr_cram;
|
||||
uint8_t nb_sector_trans;
|
||||
|
||||
if ((addr > VMEM_NB_SECTOR) || (addr + nb_sector > VMEM_NB_SECTOR)) {
|
||||
return CTRL_FAIL;
|
||||
}
|
||||
|
||||
while (nb_sector) {
|
||||
// udi_msc_trans_block() is limited to 64KB
|
||||
nb_sector_trans = min(nb_sector, 64*(1024/VMEM_SECTOR_SIZE));
|
||||
ptr_cram = &vmem_data[addr++ * VMEM_SECTOR_SIZE];
|
||||
if (!udi_msc_trans_block( b_read, ptr_cram,
|
||||
nb_sector_trans*VMEM_SECTOR_SIZE, NULL)) {
|
||||
return CTRL_FAIL; // transfer aborted
|
||||
}
|
||||
nb_sector -= nb_sector_trans;
|
||||
}
|
||||
#endif
|
||||
|
||||
return CTRL_GOOD;
|
||||
}
|
||||
|
||||
//! This function transfers the memory data to the USB MSC interface
|
||||
//!
|
||||
//! @param addr Sector address to start read
|
||||
//! @param nb_sector Number of sectors to transfer (sector=512 bytes)
|
||||
//!
|
||||
//! @return Ctrl_status
|
||||
//! It is ready -> CTRL_GOOD
|
||||
//! Memory unplug -> CTRL_NO_PRESENT
|
||||
//! Not initialized or changed -> CTRL_BUSY
|
||||
//! An error occurred -> CTRL_FAIL
|
||||
//!
|
||||
Ctrl_status virtual_usb_read_10(uint32_t addr, uint16_t nb_sector)
|
||||
{
|
||||
return virtual_usb_trans(addr, nb_sector, true);
|
||||
}
|
||||
|
||||
|
||||
//! This function transfers the USB MSC data to the memory
|
||||
//!
|
||||
//! @param addr Sector address to start write
|
||||
//! @param nb_sector Number of sectors to transfer (sector=512 bytes)
|
||||
//!
|
||||
//! @return Ctrl_status
|
||||
//! It is ready -> CTRL_GOOD
|
||||
//! Memory unplug -> CTRL_NO_PRESENT
|
||||
//! Not initialized or changed -> CTRL_BUSY
|
||||
//! An error occurred -> CTRL_FAIL
|
||||
//!
|
||||
Ctrl_status virtual_usb_write_10(uint32_t addr, uint16_t nb_sector)
|
||||
{
|
||||
return virtual_usb_trans(addr, nb_sector, false);
|
||||
}
|
||||
|
||||
#endif // ACCESS_USB == true
|
||||
|
||||
|
||||
//------------ SPECIFIC FUNCTIONS FOR TRANSFER BY RAM --------------------------
|
||||
|
||||
#if ACCESS_MEM_TO_RAM == true
|
||||
|
||||
#include <string.h>
|
||||
|
||||
//! This function transfers 1 data sector from memory to RAM
|
||||
//! sector = 512 bytes
|
||||
//! @param addr Sector address to start read
|
||||
//! @param ram Address of RAM buffer
|
||||
//! @return Ctrl_status
|
||||
//! It is ready -> CTRL_GOOD
|
||||
//! Memory unplug -> CTRL_NO_PRESENT
|
||||
//! Not initialized or changed -> CTRL_BUSY
|
||||
//! An error occurred -> CTRL_FAIL
|
||||
Ctrl_status virtual_mem_2_ram(uint32_t addr, void *ram)
|
||||
{
|
||||
if (addr + 1 > Max(VMEM_NB_SECTOR, 8)) {
|
||||
return CTRL_FAIL;
|
||||
}
|
||||
|
||||
// If overflow (possible with size virtual mem < 8 sectors) then read the last sector
|
||||
addr = min(addr, VMEM_NB_SECTOR - 1);
|
||||
#if defined(VMEM_ADDRESS) && ((VMEM_ADDRESS + (VMEM_NB_SECTOR * VMEM_SECTOR_SIZE) - 1) > UINTPTR_MAX)
|
||||
hugemem_read_block(ram, (hugemem_ptr_t)((uint32_t)vmem_data + addr
|
||||
* VMEM_SECTOR_SIZE), VMEM_SECTOR_SIZE);
|
||||
#else
|
||||
memcpy(ram, &vmem_data[addr * VMEM_SECTOR_SIZE], VMEM_SECTOR_SIZE);
|
||||
#endif
|
||||
|
||||
return CTRL_GOOD;
|
||||
}
|
||||
|
||||
|
||||
//! This function transfers 1 data sector from memory to RAM
|
||||
//! sector = 512 bytes
|
||||
//! @param addr Sector address to start write
|
||||
//! @param ram Address of RAM buffer
|
||||
//! @return Ctrl_status
|
||||
//! It is ready -> CTRL_GOOD
|
||||
//! Memory unplug -> CTRL_NO_PRESENT
|
||||
//! Not initialized or changed -> CTRL_BUSY
|
||||
//! An error occurred -> CTRL_FAIL
|
||||
Ctrl_status virtual_ram_2_mem(uint32_t addr, const void *ram)
|
||||
{
|
||||
if (addr + 1 > VMEM_NB_SECTOR) {
|
||||
return CTRL_FAIL;
|
||||
}
|
||||
|
||||
#if defined(VMEM_ADDRESS) && ((VMEM_ADDRESS + (VMEM_NB_SECTOR * VMEM_SECTOR_SIZE) - 1) > UINTPTR_MAX)
|
||||
hugemem_write_block((hugemem_ptr_t)((uint32_t)vmem_data + addr
|
||||
* VMEM_SECTOR_SIZE), ram, VMEM_SECTOR_SIZE);
|
||||
#else
|
||||
memcpy(&vmem_data[addr * VMEM_SECTOR_SIZE], ram, VMEM_SECTOR_SIZE);
|
||||
#endif
|
||||
return CTRL_GOOD;
|
||||
}
|
||||
|
||||
#endif // ACCESS_MEM_TO_RAM == true
|
||||
|
||||
|
||||
#endif // VIRTUAL_MEM == ENABLE
|
||||
|
||||
/**
|
||||
* \}
|
||||
*/
|
||||
|
|
@ -1,97 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Management of the virtual memory.
|
||||
*
|
||||
* This file manages the virtual memory.
|
||||
*
|
||||
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef _VIRTUAL_MEM_H_
|
||||
#define _VIRTUAL_MEM_H_
|
||||
|
||||
|
||||
#include "conf_access.h"
|
||||
|
||||
#if VIRTUAL_MEM == ENABLE
|
||||
|
||||
#include "ctrl_access.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
//_____ D E F I N I T I O N S ______________________________________________
|
||||
|
||||
#define VMEM_SECTOR_SIZE 512
|
||||
|
||||
|
||||
//---- CONTROL FUNCTIONS ----
|
||||
|
||||
extern Ctrl_status virtual_test_unit_ready(void);
|
||||
extern Ctrl_status virtual_read_capacity(uint32_t *u32_nb_sector);
|
||||
extern bool virtual_wr_protect(void);
|
||||
extern bool virtual_removal(void);
|
||||
extern bool virtual_unload(bool unload);
|
||||
|
||||
|
||||
//---- ACCESS DATA FUNCTIONS ----
|
||||
|
||||
// USB interface
|
||||
#if ACCESS_USB == true
|
||||
extern Ctrl_status virtual_usb_read_10 (uint32_t addr, uint16_t nb_sector);
|
||||
extern Ctrl_status virtual_usb_write_10(uint32_t addr, uint16_t nb_sector);
|
||||
#endif
|
||||
|
||||
// RAM interface
|
||||
#if ACCESS_MEM_TO_RAM == true
|
||||
extern Ctrl_status virtual_mem_2_ram(uint32_t addr, void *ram);
|
||||
extern Ctrl_status virtual_ram_2_mem(uint32_t addr, const void *ram);
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#endif // _VIRTUAL_MEM_H_
|
||||
|
|
@ -1,128 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Chip-specific sleep manager configuration
|
||||
*
|
||||
* Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef SAM_SLEEPMGR_INCLUDED
|
||||
#define SAM_SLEEPMGR_INCLUDED
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <compiler.h>
|
||||
#include <conf_sleepmgr.h>
|
||||
#include <interrupt.h>
|
||||
#include "system.h"
|
||||
|
||||
/**
|
||||
* \weakgroup sleepmgr_group
|
||||
* @{
|
||||
*/
|
||||
|
||||
enum sleepmgr_mode {
|
||||
/** Active mode. */
|
||||
SLEEPMGR_ACTIVE = 0,
|
||||
|
||||
/**
|
||||
* Idle 0 mode.
|
||||
* Potential Wake Up sources: Synchronous(APB, AHB), asynchronous.
|
||||
*/
|
||||
SLEEPMGR_IDLE_0,
|
||||
|
||||
/**
|
||||
* Idle 1 mode.
|
||||
* Potential Wake Up sources: Synchronous (APB), asynchronous
|
||||
*/
|
||||
SLEEPMGR_IDLE_1,
|
||||
|
||||
/**
|
||||
* Idle 2 mode.
|
||||
* Potential Wake Up sources: Asynchronous
|
||||
*/
|
||||
SLEEPMGR_IDLE_2,
|
||||
|
||||
/**
|
||||
* Standby mode.
|
||||
* Potential Wake Up sources: Asynchronous
|
||||
*/
|
||||
SLEEPMGR_STANDBY,
|
||||
|
||||
SLEEPMGR_NR_OF_MODES,
|
||||
};
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \name Internal arrays
|
||||
* @{
|
||||
*/
|
||||
#if defined(CONFIG_SLEEPMGR_ENABLE) || defined(__DOXYGEN__)
|
||||
/** Sleep mode lock counters */
|
||||
extern uint8_t sleepmgr_locks[];
|
||||
#endif /* CONFIG_SLEEPMGR_ENABLE */
|
||||
/** @} */
|
||||
|
||||
static inline void sleepmgr_sleep(const enum sleepmgr_mode sleep_mode)
|
||||
{
|
||||
Assert(sleep_mode != SLEEPMGR_ACTIVE);
|
||||
#ifdef CONFIG_SLEEPMGR_ENABLE
|
||||
cpu_irq_disable();
|
||||
|
||||
/* Enter the sleep mode. */
|
||||
system_set_sleepmode((enum system_sleepmode)(sleep_mode - 1));
|
||||
cpu_irq_enable();
|
||||
system_sleep();
|
||||
#else
|
||||
UNUSED(sleep_mode);
|
||||
cpu_irq_enable();
|
||||
#endif /* CONFIG_SLEEPMGR_ENABLE */
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* SAM_SLEEPMGR_INCLUDED */
|
||||
|
|
@ -1,273 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Sleep manager
|
||||
*
|
||||
* Copyright (c) 2010-2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#ifndef SLEEPMGR_H
|
||||
#define SLEEPMGR_H
|
||||
|
||||
#include <compiler.h>
|
||||
#include <parts.h>
|
||||
|
||||
#if (SAM3S || SAM3U || SAM3N || SAM3XA || SAM4S || SAM4E || SAM4N || SAM4C || SAMG || SAM4CP || SAM4CM || SAMV71 || SAMV70 || SAMS70 || SAME70)
|
||||
# include "sam/sleepmgr.h"
|
||||
#elif XMEGA
|
||||
# include "xmega/sleepmgr.h"
|
||||
#elif UC3
|
||||
# include "uc3/sleepmgr.h"
|
||||
#elif SAM4L
|
||||
# include "sam4l/sleepmgr.h"
|
||||
#elif MEGA
|
||||
# include "mega/sleepmgr.h"
|
||||
#elif (SAMD20 || SAMD21 || SAMR21 || SAMD11 || SAMDA1)
|
||||
# include "samd/sleepmgr.h"
|
||||
#elif (SAML21 || SAML22 || SAMR30)
|
||||
# include "saml/sleepmgr.h"
|
||||
#elif (SAMC21)
|
||||
# include "samc/sleepmgr.h"
|
||||
#else
|
||||
# error Unsupported device.
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \defgroup sleepmgr_group Sleep manager
|
||||
*
|
||||
* The sleep manager is a service for ensuring that the device is not put to
|
||||
* sleep in deeper sleep modes than the system (e.g., peripheral drivers,
|
||||
* services or the application) allows at any given time.
|
||||
*
|
||||
* It is based on the use of lock counting for the individual sleep modes, and
|
||||
* will put the device to sleep in the shallowest sleep mode that has a non-zero
|
||||
* lock count. The drivers/services/application can change these counts by use
|
||||
* of \ref sleepmgr_lock_mode and \ref sleepmgr_unlock_mode.
|
||||
* Refer to \ref sleepmgr_mode for a list of the sleep modes available for
|
||||
* locking, and the device datasheet for information on their effect.
|
||||
*
|
||||
* The application must supply the file \ref conf_sleepmgr.h.
|
||||
*
|
||||
* For the sleep manager to be enabled, the symbol \ref CONFIG_SLEEPMGR_ENABLE
|
||||
* must be defined, e.g., in \ref conf_sleepmgr.h. If this symbol is not
|
||||
* defined, the functions are replaced with dummy functions and no RAM is used.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \def CONFIG_SLEEPMGR_ENABLE
|
||||
* \brief Configuration symbol for enabling the sleep manager
|
||||
*
|
||||
* If this symbol is not defined, the functions of this service are replaced
|
||||
* with dummy functions. This is useful for reducing code size and execution
|
||||
* time if the sleep manager is not needed in the application.
|
||||
*
|
||||
* This symbol may be defined in \ref conf_sleepmgr.h.
|
||||
*/
|
||||
#if defined(__DOXYGEN__) && !defined(CONFIG_SLEEPMGR_ENABLE)
|
||||
# define CONFIG_SLEEPMGR_ENABLE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \enum sleepmgr_mode
|
||||
* \brief Sleep mode locks
|
||||
*
|
||||
* Identifiers for the different sleep mode locks.
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Initialize the lock counts
|
||||
*
|
||||
* Sets all lock counts to 0, except the very last one, which is set to 1. This
|
||||
* is done to simplify the algorithm for finding the deepest allowable sleep
|
||||
* mode in \ref sleepmgr_enter_sleep.
|
||||
*/
|
||||
static inline void sleepmgr_init(void)
|
||||
{
|
||||
#ifdef CONFIG_SLEEPMGR_ENABLE
|
||||
uint8_t i;
|
||||
|
||||
for (i = 0; i < SLEEPMGR_NR_OF_MODES - 1; i++) {
|
||||
sleepmgr_locks[i] = 0;
|
||||
}
|
||||
sleepmgr_locks[SLEEPMGR_NR_OF_MODES - 1] = 1;
|
||||
#endif /* CONFIG_SLEEPMGR_ENABLE */
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Increase lock count for a sleep mode
|
||||
*
|
||||
* Increases the lock count for \a mode to ensure that the sleep manager does
|
||||
* not put the device to sleep in the deeper sleep modes.
|
||||
*
|
||||
* \param mode Sleep mode to lock.
|
||||
*/
|
||||
static inline void sleepmgr_lock_mode(enum sleepmgr_mode mode)
|
||||
{
|
||||
#ifdef CONFIG_SLEEPMGR_ENABLE
|
||||
irqflags_t flags;
|
||||
|
||||
if(sleepmgr_locks[mode] >= 0xff) {
|
||||
while (true) {
|
||||
// Warning: maximum value of sleepmgr_locks buffer is no more than 255.
|
||||
// Check APP or change the data type to uint16_t.
|
||||
}
|
||||
}
|
||||
|
||||
// Enter a critical section
|
||||
flags = cpu_irq_save();
|
||||
|
||||
++sleepmgr_locks[mode];
|
||||
|
||||
// Leave the critical section
|
||||
cpu_irq_restore(flags);
|
||||
#else
|
||||
UNUSED(mode);
|
||||
#endif /* CONFIG_SLEEPMGR_ENABLE */
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Decrease lock count for a sleep mode
|
||||
*
|
||||
* Decreases the lock count for \a mode. If the lock count reaches 0, the sleep
|
||||
* manager can put the device to sleep in the deeper sleep modes.
|
||||
*
|
||||
* \param mode Sleep mode to unlock.
|
||||
*/
|
||||
static inline void sleepmgr_unlock_mode(enum sleepmgr_mode mode)
|
||||
{
|
||||
#ifdef CONFIG_SLEEPMGR_ENABLE
|
||||
irqflags_t flags;
|
||||
|
||||
if(sleepmgr_locks[mode] == 0) {
|
||||
while (true) {
|
||||
// Warning: minimum value of sleepmgr_locks buffer is no less than 0.
|
||||
// Check APP.
|
||||
}
|
||||
}
|
||||
|
||||
// Enter a critical section
|
||||
flags = cpu_irq_save();
|
||||
|
||||
--sleepmgr_locks[mode];
|
||||
|
||||
// Leave the critical section
|
||||
cpu_irq_restore(flags);
|
||||
#else
|
||||
UNUSED(mode);
|
||||
#endif /* CONFIG_SLEEPMGR_ENABLE */
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Retrieves the deepest allowable sleep mode
|
||||
*
|
||||
* Searches through the sleep mode lock counts, starting at the shallowest sleep
|
||||
* mode, until the first non-zero lock count is found. The deepest allowable
|
||||
* sleep mode is then returned.
|
||||
*/
|
||||
static inline enum sleepmgr_mode sleepmgr_get_sleep_mode(void)
|
||||
{
|
||||
enum sleepmgr_mode sleep_mode = SLEEPMGR_ACTIVE;
|
||||
|
||||
#ifdef CONFIG_SLEEPMGR_ENABLE
|
||||
uint8_t *lock_ptr = sleepmgr_locks;
|
||||
|
||||
// Find first non-zero lock count, starting with the shallowest modes.
|
||||
while (!(*lock_ptr)) {
|
||||
lock_ptr++;
|
||||
sleep_mode = (enum sleepmgr_mode)(sleep_mode + 1);
|
||||
}
|
||||
|
||||
// Catch the case where one too many sleepmgr_unlock_mode() call has been
|
||||
// performed on the deepest sleep mode.
|
||||
Assert((uintptr_t)(lock_ptr - sleepmgr_locks) < SLEEPMGR_NR_OF_MODES);
|
||||
|
||||
#endif /* CONFIG_SLEEPMGR_ENABLE */
|
||||
|
||||
return sleep_mode;
|
||||
}
|
||||
|
||||
/**
|
||||
* \fn sleepmgr_enter_sleep
|
||||
* \brief Go to sleep in the deepest allowed mode
|
||||
*
|
||||
* Searches through the sleep mode lock counts, starting at the shallowest sleep
|
||||
* mode, until the first non-zero lock count is found. The device is then put to
|
||||
* sleep in the sleep mode that corresponds to the lock.
|
||||
*
|
||||
* \note This function enables interrupts before going to sleep, and will leave
|
||||
* them enabled upon return. This also applies if sleep is skipped due to ACTIVE
|
||||
* mode being locked.
|
||||
*/
|
||||
|
||||
static inline void sleepmgr_enter_sleep(void)
|
||||
{
|
||||
#ifdef CONFIG_SLEEPMGR_ENABLE
|
||||
enum sleepmgr_mode sleep_mode;
|
||||
|
||||
cpu_irq_disable();
|
||||
|
||||
// Find the deepest allowable sleep mode
|
||||
sleep_mode = sleepmgr_get_sleep_mode();
|
||||
// Return right away if first mode (ACTIVE) is locked.
|
||||
if (sleep_mode==SLEEPMGR_ACTIVE) {
|
||||
cpu_irq_enable();
|
||||
return;
|
||||
}
|
||||
// Enter the deepest allowable sleep mode with interrupts enabled
|
||||
sleepmgr_sleep(sleep_mode);
|
||||
#else
|
||||
cpu_irq_enable();
|
||||
#endif /* CONFIG_SLEEPMGR_ENABLE */
|
||||
}
|
||||
|
||||
|
||||
//! @}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* SLEEPMGR_H */
|
||||
|
|
@ -1,644 +0,0 @@
|
|||
/*****************************************************************************
|
||||
*
|
||||
* \file
|
||||
*
|
||||
* \brief Abstraction layer for memory interfaces.
|
||||
*
|
||||
* This module contains the interfaces:
|
||||
* - MEM <-> USB;
|
||||
* - MEM <-> RAM;
|
||||
* - MEM <-> MEM.
|
||||
*
|
||||
* This module may be configured and expanded to support the following features:
|
||||
* - write-protected globals;
|
||||
* - password-protected data;
|
||||
* - specific features;
|
||||
* - etc.
|
||||
*
|
||||
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
|
||||
//_____ I N C L U D E S ____________________________________________________
|
||||
|
||||
#include "compiler.h"
|
||||
#include "preprocessor.h"
|
||||
#ifdef FREERTOS_USED
|
||||
#include "FreeRTOS.h"
|
||||
#include "semphr.h"
|
||||
#endif
|
||||
#include "ctrl_access.h"
|
||||
|
||||
|
||||
//_____ D E F I N I T I O N S ______________________________________________
|
||||
|
||||
#ifdef FREERTOS_USED
|
||||
|
||||
/*! \name LUN Access Protection Macros
|
||||
*/
|
||||
//! @{
|
||||
|
||||
/*! \brief Locks accesses to LUNs.
|
||||
*
|
||||
* \return \c true if the access was successfully locked, else \c false.
|
||||
*/
|
||||
#define Ctrl_access_lock() ctrl_access_lock()
|
||||
|
||||
/*! \brief Unlocks accesses to LUNs.
|
||||
*/
|
||||
#define Ctrl_access_unlock() xSemaphoreGive(ctrl_access_semphr)
|
||||
|
||||
//! @}
|
||||
|
||||
//! Handle to the semaphore protecting accesses to LUNs.
|
||||
static xSemaphoreHandle ctrl_access_semphr = NULL;
|
||||
|
||||
#else
|
||||
|
||||
/*! \name LUN Access Protection Macros
|
||||
*/
|
||||
//! @{
|
||||
|
||||
/*! \brief Locks accesses to LUNs.
|
||||
*
|
||||
* \return \c true if the access was successfully locked, else \c false.
|
||||
*/
|
||||
#define Ctrl_access_lock() true
|
||||
|
||||
/*! \brief Unlocks accesses to LUNs.
|
||||
*/
|
||||
#define Ctrl_access_unlock()
|
||||
|
||||
//! @}
|
||||
|
||||
#endif // FREERTOS_USED
|
||||
|
||||
|
||||
#if MAX_LUN
|
||||
|
||||
/*! \brief Initializes an entry of the LUN descriptor table.
|
||||
*
|
||||
* \param lun Logical Unit Number.
|
||||
*
|
||||
* \return LUN descriptor table entry initializer.
|
||||
*/
|
||||
#if ACCESS_USB == true && ACCESS_MEM_TO_RAM == true
|
||||
#define Lun_desc_entry(lun) \
|
||||
{\
|
||||
TPASTE3(Lun_, lun, _test_unit_ready),\
|
||||
TPASTE3(Lun_, lun, _read_capacity),\
|
||||
TPASTE3(Lun_, lun, _unload),\
|
||||
TPASTE3(Lun_, lun, _wr_protect),\
|
||||
TPASTE3(Lun_, lun, _removal),\
|
||||
TPASTE3(Lun_, lun, _usb_read_10),\
|
||||
TPASTE3(Lun_, lun, _usb_write_10),\
|
||||
TPASTE3(Lun_, lun, _mem_2_ram),\
|
||||
TPASTE3(Lun_, lun, _ram_2_mem),\
|
||||
TPASTE3(LUN_, lun, _NAME)\
|
||||
}
|
||||
#elif ACCESS_USB == true
|
||||
#define Lun_desc_entry(lun) \
|
||||
{\
|
||||
TPASTE3(Lun_, lun, _test_unit_ready),\
|
||||
TPASTE3(Lun_, lun, _read_capacity),\
|
||||
TPASTE3(Lun_, lun, _unload),\
|
||||
TPASTE3(Lun_, lun, _wr_protect),\
|
||||
TPASTE3(Lun_, lun, _removal),\
|
||||
TPASTE3(Lun_, lun, _usb_read_10),\
|
||||
TPASTE3(Lun_, lun, _usb_write_10),\
|
||||
TPASTE3(LUN_, lun, _NAME)\
|
||||
}
|
||||
#elif ACCESS_MEM_TO_RAM == true
|
||||
#define Lun_desc_entry(lun) \
|
||||
{\
|
||||
TPASTE3(Lun_, lun, _test_unit_ready),\
|
||||
TPASTE3(Lun_, lun, _read_capacity),\
|
||||
TPASTE3(Lun_, lun, _unload),\
|
||||
TPASTE3(Lun_, lun, _wr_protect),\
|
||||
TPASTE3(Lun_, lun, _removal),\
|
||||
TPASTE3(Lun_, lun, _mem_2_ram),\
|
||||
TPASTE3(Lun_, lun, _ram_2_mem),\
|
||||
TPASTE3(LUN_, lun, _NAME)\
|
||||
}
|
||||
#else
|
||||
#define Lun_desc_entry(lun) \
|
||||
{\
|
||||
TPASTE3(Lun_, lun, _test_unit_ready),\
|
||||
TPASTE3(Lun_, lun, _read_capacity),\
|
||||
TPASTE3(Lun_, lun, _unload),\
|
||||
TPASTE3(Lun_, lun, _wr_protect),\
|
||||
TPASTE3(Lun_, lun, _removal),\
|
||||
TPASTE3(LUN_, lun, _NAME)\
|
||||
}
|
||||
#endif
|
||||
|
||||
//! LUN descriptor table.
|
||||
static const struct
|
||||
{
|
||||
Ctrl_status (*test_unit_ready)(void);
|
||||
Ctrl_status (*read_capacity)(U32 *);
|
||||
bool (*unload)(bool);
|
||||
bool (*wr_protect)(void);
|
||||
bool (*removal)(void);
|
||||
#if ACCESS_USB == true
|
||||
Ctrl_status (*usb_read_10)(U32, U16);
|
||||
Ctrl_status (*usb_write_10)(U32, U16);
|
||||
#endif
|
||||
#if ACCESS_MEM_TO_RAM == true
|
||||
Ctrl_status (*mem_2_ram)(U32, void *);
|
||||
Ctrl_status (*ram_2_mem)(U32, const void *);
|
||||
#endif
|
||||
const char *name;
|
||||
} lun_desc[MAX_LUN] =
|
||||
{
|
||||
#if LUN_0 == ENABLE
|
||||
# ifndef Lun_0_unload
|
||||
# define Lun_0_unload NULL
|
||||
# endif
|
||||
Lun_desc_entry(0),
|
||||
#endif
|
||||
#if LUN_1 == ENABLE
|
||||
# ifndef Lun_1_unload
|
||||
# define Lun_1_unload NULL
|
||||
# endif
|
||||
Lun_desc_entry(1),
|
||||
#endif
|
||||
#if LUN_2 == ENABLE
|
||||
# ifndef Lun_2_unload
|
||||
# define Lun_2_unload NULL
|
||||
# endif
|
||||
Lun_desc_entry(2),
|
||||
#endif
|
||||
#if LUN_3 == ENABLE
|
||||
# ifndef Lun_3_unload
|
||||
# define Lun_3_unload NULL
|
||||
# endif
|
||||
Lun_desc_entry(3),
|
||||
#endif
|
||||
#if LUN_4 == ENABLE
|
||||
# ifndef Lun_4_unload
|
||||
# define Lun_4_unload NULL
|
||||
# endif
|
||||
Lun_desc_entry(4),
|
||||
#endif
|
||||
#if LUN_5 == ENABLE
|
||||
# ifndef Lun_5_unload
|
||||
# define Lun_5_unload NULL
|
||||
# endif
|
||||
Lun_desc_entry(5),
|
||||
#endif
|
||||
#if LUN_6 == ENABLE
|
||||
# ifndef Lun_6_unload
|
||||
# define Lun_6_unload NULL
|
||||
# endif
|
||||
Lun_desc_entry(6),
|
||||
#endif
|
||||
#if LUN_7 == ENABLE
|
||||
# ifndef Lun_7_unload
|
||||
# define Lun_7_unload NULL
|
||||
# endif
|
||||
Lun_desc_entry(7)
|
||||
#endif
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#if GLOBAL_WR_PROTECT == true
|
||||
bool g_wr_protect;
|
||||
#endif
|
||||
|
||||
|
||||
/*! \name Control Interface
|
||||
*/
|
||||
//! @{
|
||||
|
||||
|
||||
#ifdef FREERTOS_USED
|
||||
|
||||
bool ctrl_access_init(void)
|
||||
{
|
||||
// If the handle to the protecting semaphore is not valid,
|
||||
if (!ctrl_access_semphr)
|
||||
{
|
||||
// try to create the semaphore.
|
||||
vSemaphoreCreateBinary(ctrl_access_semphr);
|
||||
|
||||
// If the semaphore could not be created, there is no backup solution.
|
||||
if (!ctrl_access_semphr) return false;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
/*! \brief Locks accesses to LUNs.
|
||||
*
|
||||
* \return \c true if the access was successfully locked, else \c false.
|
||||
*/
|
||||
static bool ctrl_access_lock(void)
|
||||
{
|
||||
// If the semaphore could not be created, there is no backup solution.
|
||||
if (!ctrl_access_semphr) return false;
|
||||
|
||||
// Wait for the semaphore.
|
||||
while (!xSemaphoreTake(ctrl_access_semphr, portMAX_DELAY));
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
#endif // FREERTOS_USED
|
||||
|
||||
|
||||
U8 get_nb_lun(void)
|
||||
{
|
||||
#if MEM_USB == ENABLE
|
||||
# ifndef Lun_usb_get_lun
|
||||
# define Lun_usb_get_lun() host_get_lun()
|
||||
# endif
|
||||
U8 nb_lun;
|
||||
|
||||
if (!Ctrl_access_lock()) return MAX_LUN;
|
||||
|
||||
nb_lun = MAX_LUN + Lun_usb_get_lun();
|
||||
|
||||
Ctrl_access_unlock();
|
||||
|
||||
return nb_lun;
|
||||
#else
|
||||
return MAX_LUN;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
U8 get_cur_lun(void)
|
||||
{
|
||||
return LUN_ID_0;
|
||||
}
|
||||
|
||||
|
||||
Ctrl_status mem_test_unit_ready(U8 lun)
|
||||
{
|
||||
Ctrl_status status;
|
||||
|
||||
if (!Ctrl_access_lock()) return CTRL_FAIL;
|
||||
|
||||
status =
|
||||
#if MAX_LUN
|
||||
(lun < MAX_LUN) ? lun_desc[lun].test_unit_ready() :
|
||||
#endif
|
||||
#if LUN_USB == ENABLE
|
||||
Lun_usb_test_unit_ready(lun - LUN_ID_USB);
|
||||
#else
|
||||
CTRL_FAIL;
|
||||
#endif
|
||||
|
||||
Ctrl_access_unlock();
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
|
||||
Ctrl_status mem_read_capacity(U8 lun, U32 *u32_nb_sector)
|
||||
{
|
||||
Ctrl_status status;
|
||||
|
||||
if (!Ctrl_access_lock()) return CTRL_FAIL;
|
||||
|
||||
status =
|
||||
#if MAX_LUN
|
||||
(lun < MAX_LUN) ? lun_desc[lun].read_capacity(u32_nb_sector) :
|
||||
#endif
|
||||
#if LUN_USB == ENABLE
|
||||
Lun_usb_read_capacity(lun - LUN_ID_USB, u32_nb_sector);
|
||||
#else
|
||||
CTRL_FAIL;
|
||||
#endif
|
||||
|
||||
Ctrl_access_unlock();
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
|
||||
U8 mem_sector_size(U8 lun)
|
||||
{
|
||||
U8 sector_size;
|
||||
|
||||
if (!Ctrl_access_lock()) return 0;
|
||||
|
||||
sector_size =
|
||||
#if MAX_LUN
|
||||
(lun < MAX_LUN) ? 1 :
|
||||
#endif
|
||||
#if LUN_USB == ENABLE
|
||||
Lun_usb_read_sector_size(lun - LUN_ID_USB);
|
||||
#else
|
||||
0;
|
||||
#endif
|
||||
|
||||
Ctrl_access_unlock();
|
||||
|
||||
return sector_size;
|
||||
}
|
||||
|
||||
|
||||
bool mem_unload(U8 lun, bool unload)
|
||||
{
|
||||
bool unloaded;
|
||||
#if !MAX_LUN || !defined(Lun_usb_unload)
|
||||
UNUSED(lun);
|
||||
#endif
|
||||
|
||||
if (!Ctrl_access_lock()) return false;
|
||||
|
||||
unloaded =
|
||||
#if MAX_LUN
|
||||
(lun < MAX_LUN) ?
|
||||
(lun_desc[lun].unload ?
|
||||
lun_desc[lun].unload(unload) : !unload) :
|
||||
#endif
|
||||
#if LUN_USB == ENABLE
|
||||
# if defined(Lun_usb_unload)
|
||||
Lun_usb_unload(lun - LUN_ID_USB, unload);
|
||||
# else
|
||||
!unload; /* Can not unload: load success, unload fail */
|
||||
# endif
|
||||
#else
|
||||
false; /* No mem, unload/load fail */
|
||||
#endif
|
||||
|
||||
Ctrl_access_unlock();
|
||||
|
||||
return unloaded;
|
||||
}
|
||||
|
||||
bool mem_wr_protect(U8 lun)
|
||||
{
|
||||
bool wr_protect;
|
||||
|
||||
if (!Ctrl_access_lock()) return true;
|
||||
|
||||
wr_protect =
|
||||
#if MAX_LUN
|
||||
(lun < MAX_LUN) ? lun_desc[lun].wr_protect() :
|
||||
#endif
|
||||
#if LUN_USB == ENABLE
|
||||
Lun_usb_wr_protect(lun - LUN_ID_USB);
|
||||
#else
|
||||
true;
|
||||
#endif
|
||||
|
||||
Ctrl_access_unlock();
|
||||
|
||||
return wr_protect;
|
||||
}
|
||||
|
||||
|
||||
bool mem_removal(U8 lun)
|
||||
{
|
||||
bool removal;
|
||||
#if MAX_LUN==0
|
||||
UNUSED(lun);
|
||||
#endif
|
||||
|
||||
if (!Ctrl_access_lock()) return true;
|
||||
|
||||
removal =
|
||||
#if MAX_LUN
|
||||
(lun < MAX_LUN) ? lun_desc[lun].removal() :
|
||||
#endif
|
||||
#if LUN_USB == ENABLE
|
||||
Lun_usb_removal();
|
||||
#else
|
||||
true;
|
||||
#endif
|
||||
|
||||
Ctrl_access_unlock();
|
||||
|
||||
return removal;
|
||||
}
|
||||
|
||||
|
||||
const char *mem_name(U8 lun)
|
||||
{
|
||||
#if MAX_LUN==0
|
||||
UNUSED(lun);
|
||||
#endif
|
||||
return
|
||||
#if MAX_LUN
|
||||
(lun < MAX_LUN) ? lun_desc[lun].name :
|
||||
#endif
|
||||
#if LUN_USB == ENABLE
|
||||
LUN_USB_NAME;
|
||||
#else
|
||||
NULL;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
//! @}
|
||||
|
||||
|
||||
#if ACCESS_USB == true
|
||||
|
||||
/*! \name MEM <-> USB Interface
|
||||
*/
|
||||
//! @{
|
||||
|
||||
|
||||
Ctrl_status memory_2_usb(U8 lun, U32 addr, U16 nb_sector)
|
||||
{
|
||||
Ctrl_status status;
|
||||
|
||||
if (!Ctrl_access_lock()) return CTRL_FAIL;
|
||||
|
||||
memory_start_read_action(nb_sector);
|
||||
status =
|
||||
#if MAX_LUN
|
||||
(lun < MAX_LUN) ? lun_desc[lun].usb_read_10(addr, nb_sector) :
|
||||
#endif
|
||||
CTRL_FAIL;
|
||||
memory_stop_read_action();
|
||||
|
||||
Ctrl_access_unlock();
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
|
||||
Ctrl_status usb_2_memory(U8 lun, U32 addr, U16 nb_sector)
|
||||
{
|
||||
Ctrl_status status;
|
||||
|
||||
if (!Ctrl_access_lock()) return CTRL_FAIL;
|
||||
|
||||
memory_start_write_action(nb_sector);
|
||||
status =
|
||||
#if MAX_LUN
|
||||
(lun < MAX_LUN) ? lun_desc[lun].usb_write_10(addr, nb_sector) :
|
||||
#endif
|
||||
CTRL_FAIL;
|
||||
memory_stop_write_action();
|
||||
|
||||
Ctrl_access_unlock();
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
|
||||
//! @}
|
||||
|
||||
#endif // ACCESS_USB == true
|
||||
|
||||
|
||||
#if ACCESS_MEM_TO_RAM == true
|
||||
|
||||
/*! \name MEM <-> RAM Interface
|
||||
*/
|
||||
//! @{
|
||||
|
||||
|
||||
Ctrl_status memory_2_ram(U8 lun, U32 addr, void *ram)
|
||||
{
|
||||
Ctrl_status status;
|
||||
#if MAX_LUN==0
|
||||
UNUSED(lun);
|
||||
#endif
|
||||
|
||||
if (!Ctrl_access_lock()) return CTRL_FAIL;
|
||||
|
||||
memory_start_read_action(1);
|
||||
status =
|
||||
#if MAX_LUN
|
||||
(lun < MAX_LUN) ? lun_desc[lun].mem_2_ram(addr, ram) :
|
||||
#endif
|
||||
#if LUN_USB == ENABLE
|
||||
Lun_usb_mem_2_ram(addr, ram);
|
||||
#else
|
||||
CTRL_FAIL;
|
||||
#endif
|
||||
memory_stop_read_action();
|
||||
|
||||
Ctrl_access_unlock();
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
|
||||
Ctrl_status ram_2_memory(U8 lun, U32 addr, const void *ram)
|
||||
{
|
||||
Ctrl_status status;
|
||||
#if MAX_LUN==0
|
||||
UNUSED(lun);
|
||||
#endif
|
||||
|
||||
if (!Ctrl_access_lock()) return CTRL_FAIL;
|
||||
|
||||
memory_start_write_action(1);
|
||||
status =
|
||||
#if MAX_LUN
|
||||
(lun < MAX_LUN) ? lun_desc[lun].ram_2_mem(addr, ram) :
|
||||
#endif
|
||||
#if LUN_USB == ENABLE
|
||||
Lun_usb_ram_2_mem(addr, ram);
|
||||
#else
|
||||
CTRL_FAIL;
|
||||
#endif
|
||||
memory_stop_write_action();
|
||||
|
||||
Ctrl_access_unlock();
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
|
||||
//! @}
|
||||
|
||||
#endif // ACCESS_MEM_TO_RAM == true
|
||||
|
||||
|
||||
#if ACCESS_STREAM == true
|
||||
|
||||
/*! \name Streaming MEM <-> MEM Interface
|
||||
*/
|
||||
//! @{
|
||||
|
||||
|
||||
#if ACCESS_MEM_TO_MEM == true
|
||||
|
||||
#include "fat.h"
|
||||
|
||||
Ctrl_status stream_mem_to_mem(U8 src_lun, U32 src_addr, U8 dest_lun, U32 dest_addr, U16 nb_sector)
|
||||
{
|
||||
COMPILER_ALIGNED(4)
|
||||
static U8 sector_buf[FS_512B];
|
||||
Ctrl_status status = CTRL_GOOD;
|
||||
|
||||
while (nb_sector--)
|
||||
{
|
||||
if ((status = memory_2_ram(src_lun, src_addr++, sector_buf)) != CTRL_GOOD) break;
|
||||
if ((status = ram_2_memory(dest_lun, dest_addr++, sector_buf)) != CTRL_GOOD) break;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
#endif // ACCESS_MEM_TO_MEM == true
|
||||
|
||||
|
||||
Ctrl_status stream_state(U8 id)
|
||||
{
|
||||
UNUSED(id);
|
||||
return CTRL_GOOD;
|
||||
}
|
||||
|
||||
|
||||
U16 stream_stop(U8 id)
|
||||
{
|
||||
UNUSED(id);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
//! @}
|
||||
|
||||
#endif // ACCESS_STREAM == true
|
||||
|
|
@ -1,402 +0,0 @@
|
|||
/*****************************************************************************
|
||||
*
|
||||
* \file
|
||||
*
|
||||
* \brief Abstraction layer for memory interfaces.
|
||||
*
|
||||
* This module contains the interfaces:
|
||||
* - MEM <-> USB;
|
||||
* - MEM <-> RAM;
|
||||
* - MEM <-> MEM.
|
||||
*
|
||||
* This module may be configured and expanded to support the following features:
|
||||
* - write-protected globals;
|
||||
* - password-protected data;
|
||||
* - specific features;
|
||||
* - etc.
|
||||
*
|
||||
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _CTRL_ACCESS_H_
|
||||
#define _CTRL_ACCESS_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \defgroup group_common_services_storage_ctrl_access Memory Control Access
|
||||
*
|
||||
* Common abstraction layer for memory interfaces. It provides interfaces between:
|
||||
* Memory and USB, Memory and RAM, Memory and Memory. Common API for XMEGA and UC3.
|
||||
*
|
||||
* \{
|
||||
*/
|
||||
|
||||
#include "compiler.h"
|
||||
#include "conf_access.h"
|
||||
|
||||
#ifndef SECTOR_SIZE
|
||||
#define SECTOR_SIZE 512
|
||||
#endif
|
||||
|
||||
//! Status returned by CTRL_ACCESS interfaces.
|
||||
typedef enum
|
||||
{
|
||||
CTRL_GOOD = PASS, //!< Success, memory ready.
|
||||
CTRL_FAIL = FAIL, //!< An error occurred.
|
||||
CTRL_NO_PRESENT = FAIL + 1, //!< Memory unplugged.
|
||||
CTRL_BUSY = FAIL + 2 //!< Memory not initialized or changed.
|
||||
} Ctrl_status;
|
||||
|
||||
|
||||
// FYI: Each Logical Unit Number (LUN) corresponds to a memory.
|
||||
|
||||
// Check LUN defines.
|
||||
#ifndef LUN_0
|
||||
#error LUN_0 must be defined as ENABLE or DISABLE in conf_access.h
|
||||
#endif
|
||||
#ifndef LUN_1
|
||||
#error LUN_1 must be defined as ENABLE or DISABLE in conf_access.h
|
||||
#endif
|
||||
#ifndef LUN_2
|
||||
#error LUN_2 must be defined as ENABLE or DISABLE in conf_access.h
|
||||
#endif
|
||||
#ifndef LUN_3
|
||||
#error LUN_3 must be defined as ENABLE or DISABLE in conf_access.h
|
||||
#endif
|
||||
#ifndef LUN_4
|
||||
#error LUN_4 must be defined as ENABLE or DISABLE in conf_access.h
|
||||
#endif
|
||||
#ifndef LUN_5
|
||||
#error LUN_5 must be defined as ENABLE or DISABLE in conf_access.h
|
||||
#endif
|
||||
#ifndef LUN_6
|
||||
#error LUN_6 must be defined as ENABLE or DISABLE in conf_access.h
|
||||
#endif
|
||||
#ifndef LUN_7
|
||||
#error LUN_7 must be defined as ENABLE or DISABLE in conf_access.h
|
||||
#endif
|
||||
#ifndef LUN_USB
|
||||
#error LUN_USB must be defined as ENABLE or DISABLE in conf_access.h
|
||||
#endif
|
||||
|
||||
/*! \name LUN IDs
|
||||
*/
|
||||
//! @{
|
||||
#define LUN_ID_0 (0) //!< First static LUN.
|
||||
#define LUN_ID_1 (LUN_ID_0 + LUN_0)
|
||||
#define LUN_ID_2 (LUN_ID_1 + LUN_1)
|
||||
#define LUN_ID_3 (LUN_ID_2 + LUN_2)
|
||||
#define LUN_ID_4 (LUN_ID_3 + LUN_3)
|
||||
#define LUN_ID_5 (LUN_ID_4 + LUN_4)
|
||||
#define LUN_ID_6 (LUN_ID_5 + LUN_5)
|
||||
#define LUN_ID_7 (LUN_ID_6 + LUN_6)
|
||||
#define MAX_LUN (LUN_ID_7 + LUN_7) //!< Number of static LUNs.
|
||||
#define LUN_ID_USB (MAX_LUN) //!< First dynamic LUN (USB host mass storage).
|
||||
//! @}
|
||||
|
||||
|
||||
// Include LUN header files.
|
||||
#if LUN_0 == ENABLE
|
||||
#include LUN_0_INCLUDE
|
||||
#endif
|
||||
#if LUN_1 == ENABLE
|
||||
#include LUN_1_INCLUDE
|
||||
#endif
|
||||
#if LUN_2 == ENABLE
|
||||
#include LUN_2_INCLUDE
|
||||
#endif
|
||||
#if LUN_3 == ENABLE
|
||||
#include LUN_3_INCLUDE
|
||||
#endif
|
||||
#if LUN_4 == ENABLE
|
||||
#include LUN_4_INCLUDE
|
||||
#endif
|
||||
#if LUN_5 == ENABLE
|
||||
#include LUN_5_INCLUDE
|
||||
#endif
|
||||
#if LUN_6 == ENABLE
|
||||
#include LUN_6_INCLUDE
|
||||
#endif
|
||||
#if LUN_7 == ENABLE
|
||||
#include LUN_7_INCLUDE
|
||||
#endif
|
||||
#if LUN_USB == ENABLE
|
||||
#include LUN_USB_INCLUDE
|
||||
#endif
|
||||
|
||||
|
||||
// Check the configuration of write protection in conf_access.h.
|
||||
#ifndef GLOBAL_WR_PROTECT
|
||||
#error GLOBAL_WR_PROTECT must be defined as true or false in conf_access.h
|
||||
#endif
|
||||
|
||||
|
||||
#if GLOBAL_WR_PROTECT == true
|
||||
|
||||
//! Write protect.
|
||||
extern bool g_wr_protect;
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/*! \name Control Interface
|
||||
*/
|
||||
//! @{
|
||||
|
||||
#ifdef FREERTOS_USED
|
||||
|
||||
/*! \brief Initializes the LUN access locker.
|
||||
*
|
||||
* \return \c true if the locker was successfully initialized, else \c false.
|
||||
*/
|
||||
extern bool ctrl_access_init(void);
|
||||
|
||||
#endif // FREERTOS_USED
|
||||
|
||||
/*! \brief Returns the number of LUNs.
|
||||
*
|
||||
* \return Number of LUNs in the system.
|
||||
*/
|
||||
extern U8 get_nb_lun(void);
|
||||
|
||||
/*! \brief Returns the current LUN.
|
||||
*
|
||||
* \return Current LUN.
|
||||
*
|
||||
* \todo Implement.
|
||||
*/
|
||||
extern U8 get_cur_lun(void);
|
||||
|
||||
/*! \brief Tests the memory state and initializes the memory if required.
|
||||
*
|
||||
* The TEST UNIT READY SCSI primary command allows an application client to poll
|
||||
* a LUN until it is ready without having to allocate memory for returned data.
|
||||
*
|
||||
* This command may be used to check the media status of LUNs with removable
|
||||
* media.
|
||||
*
|
||||
* \param lun Logical Unit Number.
|
||||
*
|
||||
* \return Status.
|
||||
*/
|
||||
extern Ctrl_status mem_test_unit_ready(U8 lun);
|
||||
|
||||
/*! \brief Returns the address of the last valid sector (512 bytes) in the
|
||||
* memory.
|
||||
*
|
||||
* \param lun Logical Unit Number.
|
||||
* \param u32_nb_sector Pointer to the address of the last valid sector.
|
||||
*
|
||||
* \return Status.
|
||||
*/
|
||||
extern Ctrl_status mem_read_capacity(U8 lun, U32 *u32_nb_sector);
|
||||
|
||||
/*! \brief Returns the size of the physical sector.
|
||||
*
|
||||
* \param lun Logical Unit Number.
|
||||
*
|
||||
* \return Sector size (unit: 512 bytes).
|
||||
*/
|
||||
extern U8 mem_sector_size(U8 lun);
|
||||
|
||||
/*! \brief Unload/load the medium.
|
||||
*
|
||||
* \param lun Logical Unit Number.
|
||||
* \param unload \c true to unload the medium, \c false to load the medium.
|
||||
*
|
||||
* \return \c true if unload/load success, else \c false.
|
||||
*/
|
||||
extern bool mem_unload(U8 lun, bool unload);
|
||||
|
||||
/*! \brief Returns the write-protection state of the memory.
|
||||
*
|
||||
* \param lun Logical Unit Number.
|
||||
*
|
||||
* \return \c true if the memory is write-protected, else \c false.
|
||||
*
|
||||
* \note Only used by removable memories with hardware-specific write
|
||||
* protection.
|
||||
*/
|
||||
extern bool mem_wr_protect(U8 lun);
|
||||
|
||||
/*! \brief Tells whether the memory is removable.
|
||||
*
|
||||
* \param lun Logical Unit Number.
|
||||
*
|
||||
* \return \c true if the memory is removable, else \c false.
|
||||
*/
|
||||
extern bool mem_removal(U8 lun);
|
||||
|
||||
/*! \brief Returns a pointer to the LUN name.
|
||||
*
|
||||
* \param lun Logical Unit Number.
|
||||
*
|
||||
* \return Pointer to the LUN name string.
|
||||
*/
|
||||
extern const char *mem_name(U8 lun);
|
||||
|
||||
//! @}
|
||||
|
||||
|
||||
#if ACCESS_USB == true
|
||||
|
||||
/*! \name MEM <-> USB Interface
|
||||
*/
|
||||
//! @{
|
||||
|
||||
/*! \brief Transfers data from the memory to USB.
|
||||
*
|
||||
* \param lun Logical Unit Number.
|
||||
* \param addr Address of first memory sector to read.
|
||||
* \param nb_sector Number of sectors to transfer.
|
||||
*
|
||||
* \return Status.
|
||||
*/
|
||||
extern Ctrl_status memory_2_usb(U8 lun, U32 addr, U16 nb_sector);
|
||||
|
||||
/*! \brief Transfers data from USB to the memory.
|
||||
*
|
||||
* \param lun Logical Unit Number.
|
||||
* \param addr Address of first memory sector to write.
|
||||
* \param nb_sector Number of sectors to transfer.
|
||||
*
|
||||
* \return Status.
|
||||
*/
|
||||
extern Ctrl_status usb_2_memory(U8 lun, U32 addr, U16 nb_sector);
|
||||
|
||||
//! @}
|
||||
|
||||
#endif // ACCESS_USB == true
|
||||
|
||||
|
||||
#if ACCESS_MEM_TO_RAM == true
|
||||
|
||||
/*! \name MEM <-> RAM Interface
|
||||
*/
|
||||
//! @{
|
||||
|
||||
/*! \brief Copies 1 data sector from the memory to RAM.
|
||||
*
|
||||
* \param lun Logical Unit Number.
|
||||
* \param addr Address of first memory sector to read.
|
||||
* \param ram Pointer to RAM buffer to write.
|
||||
*
|
||||
* \return Status.
|
||||
*/
|
||||
extern Ctrl_status memory_2_ram(U8 lun, U32 addr, void *ram);
|
||||
|
||||
/*! \brief Copies 1 data sector from RAM to the memory.
|
||||
*
|
||||
* \param lun Logical Unit Number.
|
||||
* \param addr Address of first memory sector to write.
|
||||
* \param ram Pointer to RAM buffer to read.
|
||||
*
|
||||
* \return Status.
|
||||
*/
|
||||
extern Ctrl_status ram_2_memory(U8 lun, U32 addr, const void *ram);
|
||||
|
||||
//! @}
|
||||
|
||||
#endif // ACCESS_MEM_TO_RAM == true
|
||||
|
||||
|
||||
#if ACCESS_STREAM == true
|
||||
|
||||
/*! \name Streaming MEM <-> MEM Interface
|
||||
*/
|
||||
//! @{
|
||||
|
||||
//! Erroneous streaming data transfer ID.
|
||||
#define ID_STREAM_ERR 0xFF
|
||||
|
||||
#if ACCESS_MEM_TO_MEM == true
|
||||
|
||||
/*! \brief Copies data from one memory to another.
|
||||
*
|
||||
* \param src_lun Source Logical Unit Number.
|
||||
* \param src_addr Source address of first memory sector to read.
|
||||
* \param dest_lun Destination Logical Unit Number.
|
||||
* \param dest_addr Destination address of first memory sector to write.
|
||||
* \param nb_sector Number of sectors to copy.
|
||||
*
|
||||
* \return Status.
|
||||
*/
|
||||
extern Ctrl_status stream_mem_to_mem(U8 src_lun, U32 src_addr, U8 dest_lun, U32 dest_addr, U16 nb_sector);
|
||||
|
||||
#endif // ACCESS_MEM_TO_MEM == true
|
||||
|
||||
/*! \brief Returns the state of a streaming data transfer.
|
||||
*
|
||||
* \param id Transfer ID.
|
||||
*
|
||||
* \return Status.
|
||||
*
|
||||
* \todo Implement.
|
||||
*/
|
||||
extern Ctrl_status stream_state(U8 id);
|
||||
|
||||
/*! \brief Stops a streaming data transfer.
|
||||
*
|
||||
* \param id Transfer ID.
|
||||
*
|
||||
* \return Number of remaining sectors.
|
||||
*
|
||||
* \todo Implement.
|
||||
*/
|
||||
extern U16 stream_stop(U8 id);
|
||||
|
||||
//! @}
|
||||
|
||||
#endif // ACCESS_STREAM == true
|
||||
|
||||
/**
|
||||
* \}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // _CTRL_ACCESS_H_
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -1,810 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief USB Device Communication Device Class (CDC) interface definitions.
|
||||
*
|
||||
* Copyright (c) 2009-2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef _UDI_CDC_H_
|
||||
#define _UDI_CDC_H_
|
||||
|
||||
#include "conf_usb.h"
|
||||
#include "usb_protocol.h"
|
||||
#include "usb_protocol_cdc.h"
|
||||
#include "udd.h"
|
||||
#include "udc_desc.h"
|
||||
#include "udi.h"
|
||||
|
||||
// Check the number of port
|
||||
#ifndef UDI_CDC_PORT_NB
|
||||
# define UDI_CDC_PORT_NB 1
|
||||
#endif
|
||||
#if (UDI_CDC_PORT_NB < 1) || (UDI_CDC_PORT_NB > 7)
|
||||
# error UDI_CDC_PORT_NB must be between 1 and 7
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup udi_cdc_group_udc
|
||||
* @{
|
||||
*/
|
||||
|
||||
//! Global structure which contains standard UDI API for UDC
|
||||
extern UDC_DESC_STORAGE udi_api_t udi_api_cdc_comm;
|
||||
extern UDC_DESC_STORAGE udi_api_t udi_api_cdc_data;
|
||||
//@}
|
||||
|
||||
/**
|
||||
* \ingroup udi_cdc_group
|
||||
* \defgroup udi_cdc_group_desc USB interface descriptors
|
||||
*
|
||||
* The following structures provide predefined USB interface descriptors.
|
||||
* It must be used to define the final USB descriptors.
|
||||
*/
|
||||
//@{
|
||||
|
||||
/**
|
||||
* \brief Communication Class interface descriptor
|
||||
*
|
||||
* Interface descriptor with associated functional and endpoint
|
||||
* descriptors for the CDC Communication Class interface.
|
||||
*/
|
||||
typedef struct {
|
||||
//! Standard interface descriptor
|
||||
usb_iface_desc_t iface;
|
||||
//! CDC Header functional descriptor
|
||||
usb_cdc_hdr_desc_t header;
|
||||
//! CDC Abstract Control Model functional descriptor
|
||||
usb_cdc_acm_desc_t acm;
|
||||
//! CDC Union functional descriptor
|
||||
usb_cdc_union_desc_t union_desc;
|
||||
//! CDC Call Management functional descriptor
|
||||
usb_cdc_call_mgmt_desc_t call_mgmt;
|
||||
//! Notification endpoint descriptor
|
||||
usb_ep_desc_t ep_notify;
|
||||
} udi_cdc_comm_desc_t;
|
||||
|
||||
|
||||
/**
|
||||
* \brief Data Class interface descriptor
|
||||
*
|
||||
* Interface descriptor with associated endpoint descriptors for the
|
||||
* CDC Data Class interface.
|
||||
*/
|
||||
typedef struct {
|
||||
//! Standard interface descriptor
|
||||
usb_iface_desc_t iface;
|
||||
//! Data IN/OUT endpoint descriptors
|
||||
usb_ep_desc_t ep_in;
|
||||
usb_ep_desc_t ep_out;
|
||||
} udi_cdc_data_desc_t;
|
||||
|
||||
|
||||
//! CDC communication endpoints size for all speeds
|
||||
#define UDI_CDC_COMM_EP_SIZE 64
|
||||
//! CDC data endpoints size for FS speed (8B, 16B, 32B, 64B)
|
||||
#define UDI_CDC_DATA_EPS_FS_SIZE 64
|
||||
//! CDC data endpoints size for HS speed (512B only)
|
||||
#define UDI_CDC_DATA_EPS_HS_SIZE 512
|
||||
|
||||
/**
|
||||
* \name Content of interface descriptors
|
||||
* Up to 7 CDC interfaces can be implemented on a USB device.
|
||||
*/
|
||||
//@{
|
||||
//! By default no string associated to these interfaces
|
||||
#ifndef UDI_CDC_IAD_STRING_ID_0
|
||||
#define UDI_CDC_IAD_STRING_ID_0 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_COMM_STRING_ID_0
|
||||
#define UDI_CDC_COMM_STRING_ID_0 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_DATA_STRING_ID_0
|
||||
#define UDI_CDC_DATA_STRING_ID_0 0
|
||||
#endif
|
||||
#define UDI_CDC_IAD_DESC_0 UDI_CDC_IAD_DESC(0)
|
||||
#define UDI_CDC_COMM_DESC_0 UDI_CDC_COMM_DESC(0)
|
||||
#define UDI_CDC_DATA_DESC_0_FS UDI_CDC_DATA_DESC_FS(0)
|
||||
#define UDI_CDC_DATA_DESC_0_HS UDI_CDC_DATA_DESC_HS(0)
|
||||
|
||||
//! By default no string associated to these interfaces
|
||||
#ifndef UDI_CDC_IAD_STRING_ID_1
|
||||
#define UDI_CDC_IAD_STRING_ID_1 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_COMM_STRING_ID_1
|
||||
#define UDI_CDC_COMM_STRING_ID_1 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_DATA_STRING_ID_1
|
||||
#define UDI_CDC_DATA_STRING_ID_1 0
|
||||
#endif
|
||||
#define UDI_CDC_IAD_DESC_1 UDI_CDC_IAD_DESC(1)
|
||||
#define UDI_CDC_COMM_DESC_1 UDI_CDC_COMM_DESC(1)
|
||||
#define UDI_CDC_DATA_DESC_1_FS UDI_CDC_DATA_DESC_FS(1)
|
||||
#define UDI_CDC_DATA_DESC_1_HS UDI_CDC_DATA_DESC_HS(1)
|
||||
|
||||
//! By default no string associated to these interfaces
|
||||
#ifndef UDI_CDC_IAD_STRING_ID_2
|
||||
#define UDI_CDC_IAD_STRING_ID_2 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_COMM_STRING_ID_2
|
||||
#define UDI_CDC_COMM_STRING_ID_2 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_DATA_STRING_ID_2
|
||||
#define UDI_CDC_DATA_STRING_ID_2 0
|
||||
#endif
|
||||
#define UDI_CDC_IAD_DESC_2 UDI_CDC_IAD_DESC(2)
|
||||
#define UDI_CDC_COMM_DESC_2 UDI_CDC_COMM_DESC(2)
|
||||
#define UDI_CDC_DATA_DESC_2_FS UDI_CDC_DATA_DESC_FS(2)
|
||||
#define UDI_CDC_DATA_DESC_2_HS UDI_CDC_DATA_DESC_HS(2)
|
||||
|
||||
//! By default no string associated to these interfaces
|
||||
#ifndef UDI_CDC_IAD_STRING_ID_3
|
||||
#define UDI_CDC_IAD_STRING_ID_3 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_COMM_STRING_ID_3
|
||||
#define UDI_CDC_COMM_STRING_ID_3 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_DATA_STRING_ID_3
|
||||
#define UDI_CDC_DATA_STRING_ID_3 0
|
||||
#endif
|
||||
#define UDI_CDC_IAD_DESC_3 UDI_CDC_IAD_DESC(3)
|
||||
#define UDI_CDC_COMM_DESC_3 UDI_CDC_COMM_DESC(3)
|
||||
#define UDI_CDC_DATA_DESC_3_FS UDI_CDC_DATA_DESC_FS(3)
|
||||
#define UDI_CDC_DATA_DESC_3_HS UDI_CDC_DATA_DESC_HS(3)
|
||||
|
||||
//! By default no string associated to these interfaces
|
||||
#ifndef UDI_CDC_IAD_STRING_ID_4
|
||||
#define UDI_CDC_IAD_STRING_ID_4 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_COMM_STRING_ID_4
|
||||
#define UDI_CDC_COMM_STRING_ID_4 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_DATA_STRING_ID_4
|
||||
#define UDI_CDC_DATA_STRING_ID_4 0
|
||||
#endif
|
||||
#define UDI_CDC_IAD_DESC_4 UDI_CDC_IAD_DESC(4)
|
||||
#define UDI_CDC_COMM_DESC_4 UDI_CDC_COMM_DESC(4)
|
||||
#define UDI_CDC_DATA_DESC_4_FS UDI_CDC_DATA_DESC_FS(4)
|
||||
#define UDI_CDC_DATA_DESC_4_HS UDI_CDC_DATA_DESC_HS(4)
|
||||
|
||||
//! By default no string associated to these interfaces
|
||||
#ifndef UDI_CDC_IAD_STRING_ID_5
|
||||
#define UDI_CDC_IAD_STRING_ID_5 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_COMM_STRING_ID_5
|
||||
#define UDI_CDC_COMM_STRING_ID_5 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_DATA_STRING_ID_5
|
||||
#define UDI_CDC_DATA_STRING_ID_5 0
|
||||
#endif
|
||||
#define UDI_CDC_IAD_DESC_5 UDI_CDC_IAD_DESC(5)
|
||||
#define UDI_CDC_COMM_DESC_5 UDI_CDC_COMM_DESC(5)
|
||||
#define UDI_CDC_DATA_DESC_5_FS UDI_CDC_DATA_DESC_FS(5)
|
||||
#define UDI_CDC_DATA_DESC_5_HS UDI_CDC_DATA_DESC_HS(5)
|
||||
|
||||
//! By default no string associated to these interfaces
|
||||
#ifndef UDI_CDC_IAD_STRING_ID_6
|
||||
#define UDI_CDC_IAD_STRING_ID_6 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_COMM_STRING_ID_6
|
||||
#define UDI_CDC_COMM_STRING_ID_6 0
|
||||
#endif
|
||||
#ifndef UDI_CDC_DATA_STRING_ID_6
|
||||
#define UDI_CDC_DATA_STRING_ID_6 0
|
||||
#endif
|
||||
#define UDI_CDC_IAD_DESC_6 UDI_CDC_IAD_DESC(6)
|
||||
#define UDI_CDC_COMM_DESC_6 UDI_CDC_COMM_DESC(6)
|
||||
#define UDI_CDC_DATA_DESC_6_FS UDI_CDC_DATA_DESC_FS(6)
|
||||
#define UDI_CDC_DATA_DESC_6_HS UDI_CDC_DATA_DESC_HS(6)
|
||||
//@}
|
||||
|
||||
|
||||
//! Content of CDC IAD interface descriptor for all speeds
|
||||
#define UDI_CDC_IAD_DESC(port) { \
|
||||
.bLength = sizeof(usb_iad_desc_t),\
|
||||
.bDescriptorType = USB_DT_IAD,\
|
||||
.bInterfaceCount = 2,\
|
||||
.bFunctionClass = CDC_CLASS_COMM,\
|
||||
.bFunctionSubClass = CDC_SUBCLASS_ACM,\
|
||||
.bFunctionProtocol = CDC_PROTOCOL_V25TER,\
|
||||
.bFirstInterface = UDI_CDC_COMM_IFACE_NUMBER_##port,\
|
||||
.iFunction = UDI_CDC_IAD_STRING_ID_##port,\
|
||||
}
|
||||
|
||||
//! Content of CDC COMM interface descriptor for all speeds
|
||||
#define UDI_CDC_COMM_DESC(port) { \
|
||||
.iface.bLength = sizeof(usb_iface_desc_t),\
|
||||
.iface.bDescriptorType = USB_DT_INTERFACE,\
|
||||
.iface.bAlternateSetting = 0,\
|
||||
.iface.bNumEndpoints = 1,\
|
||||
.iface.bInterfaceClass = CDC_CLASS_COMM,\
|
||||
.iface.bInterfaceSubClass = CDC_SUBCLASS_ACM,\
|
||||
.iface.bInterfaceProtocol = CDC_PROTOCOL_V25TER,\
|
||||
.header.bFunctionLength = sizeof(usb_cdc_hdr_desc_t),\
|
||||
.header.bDescriptorType = CDC_CS_INTERFACE,\
|
||||
.header.bDescriptorSubtype = CDC_SCS_HEADER,\
|
||||
.header.bcdCDC = LE16(0x0110),\
|
||||
.call_mgmt.bFunctionLength = sizeof(usb_cdc_call_mgmt_desc_t),\
|
||||
.call_mgmt.bDescriptorType = CDC_CS_INTERFACE,\
|
||||
.call_mgmt.bDescriptorSubtype = CDC_SCS_CALL_MGMT,\
|
||||
.call_mgmt.bmCapabilities = \
|
||||
CDC_CALL_MGMT_SUPPORTED | CDC_CALL_MGMT_OVER_DCI,\
|
||||
.acm.bFunctionLength = sizeof(usb_cdc_acm_desc_t),\
|
||||
.acm.bDescriptorType = CDC_CS_INTERFACE,\
|
||||
.acm.bDescriptorSubtype = CDC_SCS_ACM,\
|
||||
.acm.bmCapabilities = CDC_ACM_SUPPORT_LINE_REQUESTS,\
|
||||
.union_desc.bFunctionLength = sizeof(usb_cdc_union_desc_t),\
|
||||
.union_desc.bDescriptorType = CDC_CS_INTERFACE,\
|
||||
.union_desc.bDescriptorSubtype= CDC_SCS_UNION,\
|
||||
.ep_notify.bLength = sizeof(usb_ep_desc_t),\
|
||||
.ep_notify.bDescriptorType = USB_DT_ENDPOINT,\
|
||||
.ep_notify.bmAttributes = USB_EP_TYPE_INTERRUPT,\
|
||||
.ep_notify.wMaxPacketSize = LE16(UDI_CDC_COMM_EP_SIZE),\
|
||||
.ep_notify.bInterval = 0x10,\
|
||||
.ep_notify.bEndpointAddress = UDI_CDC_COMM_EP_##port,\
|
||||
.iface.bInterfaceNumber = UDI_CDC_COMM_IFACE_NUMBER_##port,\
|
||||
.call_mgmt.bDataInterface = UDI_CDC_DATA_IFACE_NUMBER_##port,\
|
||||
.union_desc.bMasterInterface = UDI_CDC_COMM_IFACE_NUMBER_##port,\
|
||||
.union_desc.bSlaveInterface0 = UDI_CDC_DATA_IFACE_NUMBER_##port,\
|
||||
.iface.iInterface = UDI_CDC_COMM_STRING_ID_##port,\
|
||||
}
|
||||
|
||||
//! Content of CDC DATA interface descriptors
|
||||
#define UDI_CDC_DATA_DESC_COMMON \
|
||||
.iface.bLength = sizeof(usb_iface_desc_t),\
|
||||
.iface.bDescriptorType = USB_DT_INTERFACE,\
|
||||
.iface.bAlternateSetting = 0,\
|
||||
.iface.bNumEndpoints = 2,\
|
||||
.iface.bInterfaceClass = CDC_CLASS_DATA,\
|
||||
.iface.bInterfaceSubClass = 0,\
|
||||
.iface.bInterfaceProtocol = 0,\
|
||||
.ep_in.bLength = sizeof(usb_ep_desc_t),\
|
||||
.ep_in.bDescriptorType = USB_DT_ENDPOINT,\
|
||||
.ep_in.bmAttributes = USB_EP_TYPE_BULK,\
|
||||
.ep_in.bInterval = 0,\
|
||||
.ep_out.bLength = sizeof(usb_ep_desc_t),\
|
||||
.ep_out.bDescriptorType = USB_DT_ENDPOINT,\
|
||||
.ep_out.bmAttributes = USB_EP_TYPE_BULK,\
|
||||
.ep_out.bInterval = 0,
|
||||
|
||||
#define UDI_CDC_DATA_DESC_FS(port) { \
|
||||
UDI_CDC_DATA_DESC_COMMON \
|
||||
.ep_in.wMaxPacketSize = LE16(UDI_CDC_DATA_EPS_FS_SIZE),\
|
||||
.ep_out.wMaxPacketSize = LE16(UDI_CDC_DATA_EPS_FS_SIZE),\
|
||||
.ep_in.bEndpointAddress = UDI_CDC_DATA_EP_IN_##port,\
|
||||
.ep_out.bEndpointAddress = UDI_CDC_DATA_EP_OUT_##port,\
|
||||
.iface.bInterfaceNumber = UDI_CDC_DATA_IFACE_NUMBER_##port,\
|
||||
.iface.iInterface = UDI_CDC_DATA_STRING_ID_##port,\
|
||||
}
|
||||
|
||||
#define UDI_CDC_DATA_DESC_HS(port) { \
|
||||
UDI_CDC_DATA_DESC_COMMON \
|
||||
.ep_in.wMaxPacketSize = LE16(UDI_CDC_DATA_EPS_HS_SIZE),\
|
||||
.ep_out.wMaxPacketSize = LE16(UDI_CDC_DATA_EPS_HS_SIZE),\
|
||||
.ep_in.bEndpointAddress = UDI_CDC_DATA_EP_IN_##port,\
|
||||
.ep_out.bEndpointAddress = UDI_CDC_DATA_EP_OUT_##port,\
|
||||
.iface.bInterfaceNumber = UDI_CDC_DATA_IFACE_NUMBER_##port,\
|
||||
.iface.iInterface = UDI_CDC_DATA_STRING_ID_##port,\
|
||||
}
|
||||
|
||||
//@}
|
||||
|
||||
/**
|
||||
* \ingroup udi_group
|
||||
* \defgroup udi_cdc_group USB Device Interface (UDI) for Communication Class Device (CDC)
|
||||
*
|
||||
* Common APIs used by high level application to use this USB class.
|
||||
*
|
||||
* These routines are used to transfer and control data
|
||||
* to/from USB CDC endpoint.
|
||||
*
|
||||
* See \ref udi_cdc_quickstart.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \name Interface for application with single CDC interface support
|
||||
*/
|
||||
//@{
|
||||
|
||||
/**
|
||||
* \brief Notify a state change of DCD signal
|
||||
*
|
||||
* \param b_set DCD is enabled if true, else disabled
|
||||
*/
|
||||
void udi_cdc_ctrl_signal_dcd(bool b_set);
|
||||
|
||||
/**
|
||||
* \brief Notify a state change of DSR signal
|
||||
*
|
||||
* \param b_set DSR is enabled if true, else disabled
|
||||
*/
|
||||
void udi_cdc_ctrl_signal_dsr(bool b_set);
|
||||
|
||||
/**
|
||||
* \brief Notify a framing error
|
||||
*/
|
||||
void udi_cdc_signal_framing_error(void);
|
||||
|
||||
/**
|
||||
* \brief Notify a parity error
|
||||
*/
|
||||
void udi_cdc_signal_parity_error(void);
|
||||
|
||||
/**
|
||||
* \brief Notify a overrun
|
||||
*/
|
||||
void udi_cdc_signal_overrun(void);
|
||||
|
||||
/**
|
||||
* \brief Gets the number of byte received
|
||||
*
|
||||
* \return the number of data available
|
||||
*/
|
||||
iram_size_t udi_cdc_get_nb_received_data(void);
|
||||
|
||||
/**
|
||||
* \brief This function checks if a character has been received on the CDC line
|
||||
*
|
||||
* \return \c 1 if a byte is ready to be read.
|
||||
*/
|
||||
bool udi_cdc_is_rx_ready(void);
|
||||
|
||||
/**
|
||||
* \brief Waits and gets a value on CDC line
|
||||
*
|
||||
* \return value read on CDC line
|
||||
*/
|
||||
int udi_cdc_getc(void);
|
||||
|
||||
/**
|
||||
* \brief Reads a RAM buffer on CDC line
|
||||
*
|
||||
* \param buf Values read
|
||||
* \param size Number of value read
|
||||
*
|
||||
* \return the number of data remaining
|
||||
*/
|
||||
iram_size_t udi_cdc_read_buf(void* buf, iram_size_t size);
|
||||
|
||||
/**
|
||||
* \brief Non polling reads of a up to 'size' data from CDC line
|
||||
*
|
||||
* \param port Communication port number to manage
|
||||
* \param buf Buffer where to store read data
|
||||
* \param size Maximum number of data to read (size of buffer)
|
||||
*
|
||||
* \return the number of data effectively read
|
||||
*/
|
||||
iram_size_t udi_cdc_read_no_polling(void* buf, iram_size_t size);
|
||||
|
||||
/**
|
||||
* \brief Gets the number of free byte in TX buffer
|
||||
*
|
||||
* \return the number of free byte in TX buffer
|
||||
*/
|
||||
iram_size_t udi_cdc_get_free_tx_buffer(void);
|
||||
|
||||
/**
|
||||
* \brief This function checks if a new character sent is possible
|
||||
* The type int is used to support scanf redirection from compiler LIB.
|
||||
*
|
||||
* \return \c 1 if a new character can be sent
|
||||
*/
|
||||
bool udi_cdc_is_tx_ready(void);
|
||||
|
||||
/**
|
||||
* \brief Puts a byte on CDC line
|
||||
* The type int is used to support printf redirection from compiler LIB.
|
||||
*
|
||||
* \param value Value to put
|
||||
*
|
||||
* \return \c 1 if function was successfully done, otherwise \c 0.
|
||||
*/
|
||||
int udi_cdc_putc(int value);
|
||||
|
||||
/**
|
||||
* \brief Writes a RAM buffer on CDC line
|
||||
*
|
||||
* \param buf Values to write
|
||||
* \param size Number of value to write
|
||||
*
|
||||
* \return the number of data remaining
|
||||
*/
|
||||
iram_size_t udi_cdc_write_buf(const void* buf, iram_size_t size);
|
||||
//@}
|
||||
|
||||
/**
|
||||
* \name Interface for application with multi CDC interfaces support
|
||||
*/
|
||||
//@{
|
||||
|
||||
/**
|
||||
* \brief Notify a state change of DCD signal
|
||||
*
|
||||
* \param port Communication port number to manage
|
||||
* \param b_set DCD is enabled if true, else disabled
|
||||
*/
|
||||
void udi_cdc_multi_ctrl_signal_dcd(uint8_t port, bool b_set);
|
||||
|
||||
/**
|
||||
* \brief Notify a state change of DSR signal
|
||||
*
|
||||
* \param port Communication port number to manage
|
||||
* \param b_set DSR is enabled if true, else disabled
|
||||
*/
|
||||
void udi_cdc_multi_ctrl_signal_dsr(uint8_t port, bool b_set);
|
||||
|
||||
/**
|
||||
* \brief Notify a framing error
|
||||
*
|
||||
* \param port Communication port number to manage
|
||||
*/
|
||||
void udi_cdc_multi_signal_framing_error(uint8_t port);
|
||||
|
||||
/**
|
||||
* \brief Notify a parity error
|
||||
*
|
||||
* \param port Communication port number to manage
|
||||
*/
|
||||
void udi_cdc_multi_signal_parity_error(uint8_t port);
|
||||
|
||||
/**
|
||||
* \brief Notify a overrun
|
||||
*
|
||||
* \param port Communication port number to manage
|
||||
*/
|
||||
void udi_cdc_multi_signal_overrun(uint8_t port);
|
||||
|
||||
/**
|
||||
* \brief Gets the number of byte received
|
||||
*
|
||||
* \param port Communication port number to manage
|
||||
*
|
||||
* \return the number of data available
|
||||
*/
|
||||
iram_size_t udi_cdc_multi_get_nb_received_data(uint8_t port);
|
||||
|
||||
/**
|
||||
* \brief This function checks if a character has been received on the CDC line
|
||||
*
|
||||
* \param port Communication port number to manage
|
||||
*
|
||||
* \return \c 1 if a byte is ready to be read.
|
||||
*/
|
||||
bool udi_cdc_multi_is_rx_ready(uint8_t port);
|
||||
|
||||
/**
|
||||
* \brief Waits and gets a value on CDC line
|
||||
*
|
||||
* \param port Communication port number to manage
|
||||
*
|
||||
* \return value read on CDC line
|
||||
*/
|
||||
int udi_cdc_multi_getc(uint8_t port);
|
||||
|
||||
/**
|
||||
* \brief Reads a RAM buffer on CDC line
|
||||
*
|
||||
* \param port Communication port number to manage
|
||||
* \param buf Values read
|
||||
* \param size Number of values read
|
||||
*
|
||||
* \return the number of data remaining
|
||||
*/
|
||||
iram_size_t udi_cdc_multi_read_buf(uint8_t port, void* buf, iram_size_t size);
|
||||
|
||||
/**
|
||||
* \brief Gets the number of free byte in TX buffer
|
||||
*
|
||||
* \param port Communication port number to manage
|
||||
*
|
||||
* \return the number of free byte in TX buffer
|
||||
*/
|
||||
iram_size_t udi_cdc_multi_get_free_tx_buffer(uint8_t port);
|
||||
|
||||
/**
|
||||
* \brief This function checks if a new character sent is possible
|
||||
* The type int is used to support scanf redirection from compiler LIB.
|
||||
*
|
||||
* \param port Communication port number to manage
|
||||
*
|
||||
* \return \c 1 if a new character can be sent
|
||||
*/
|
||||
bool udi_cdc_multi_is_tx_ready(uint8_t port);
|
||||
|
||||
/**
|
||||
* \brief Puts a byte on CDC line
|
||||
* The type int is used to support printf redirection from compiler LIB.
|
||||
*
|
||||
* \param port Communication port number to manage
|
||||
* \param value Value to put
|
||||
*
|
||||
* \return \c 1 if function was successfully done, otherwise \c 0.
|
||||
*/
|
||||
int udi_cdc_multi_putc(uint8_t port, int value);
|
||||
|
||||
/**
|
||||
* \brief Writes a RAM buffer on CDC line
|
||||
*
|
||||
* \param port Communication port number to manage
|
||||
* \param buf Values to write
|
||||
* \param size Number of value to write
|
||||
*
|
||||
* \return the number of data remaining
|
||||
*/
|
||||
iram_size_t udi_cdc_multi_write_buf(uint8_t port, const void* buf, iram_size_t size);
|
||||
//@}
|
||||
|
||||
//@}
|
||||
|
||||
/**
|
||||
* \page udi_cdc_quickstart Quick start guide for USB device Communication Class Device module (UDI CDC)
|
||||
*
|
||||
* This is the quick start guide for the \ref udi_cdc_group
|
||||
* "USB device interface CDC module (UDI CDC)" with step-by-step instructions on
|
||||
* how to configure and use the modules in a selection of use cases.
|
||||
*
|
||||
* The use cases contain several code fragments. The code fragments in the
|
||||
* steps for setup can be copied into a custom initialization function, while
|
||||
* the steps for usage can be copied into, e.g., the main application function.
|
||||
*
|
||||
* \section udi_cdc_basic_use_case Basic use case
|
||||
* In this basic use case, the "USB CDC (Single Interface Device)" module is used
|
||||
* with only one communication port.
|
||||
* The "USB CDC (Composite Device)" module usage is described in \ref udi_cdc_use_cases
|
||||
* "Advanced use cases".
|
||||
*
|
||||
* \section udi_cdc_basic_use_case_setup Setup steps
|
||||
* \subsection udi_cdc_basic_use_case_setup_prereq Prerequisites
|
||||
* \copydetails udc_basic_use_case_setup_prereq
|
||||
* \subsection udi_cdc_basic_use_case_setup_code Example code
|
||||
* \copydetails udc_basic_use_case_setup_code
|
||||
* \subsection udi_cdc_basic_use_case_setup_flow Workflow
|
||||
* \copydetails udc_basic_use_case_setup_flow
|
||||
*
|
||||
* \section udi_cdc_basic_use_case_usage Usage steps
|
||||
*
|
||||
* \subsection udi_cdc_basic_use_case_usage_code Example code
|
||||
* Content of conf_usb.h:
|
||||
* \code
|
||||
#define UDI_CDC_ENABLE_EXT(port) my_callback_cdc_enable()
|
||||
extern bool my_callback_cdc_enable(void);
|
||||
#define UDI_CDC_DISABLE_EXT(port) my_callback_cdc_disable()
|
||||
extern void my_callback_cdc_disable(void);
|
||||
#define UDI_CDC_LOW_RATE
|
||||
|
||||
#define UDI_CDC_DEFAULT_RATE 115200
|
||||
#define UDI_CDC_DEFAULT_STOPBITS CDC_STOP_BITS_1
|
||||
#define UDI_CDC_DEFAULT_PARITY CDC_PAR_NONE
|
||||
#define UDI_CDC_DEFAULT_DATABITS 8
|
||||
|
||||
#include "udi_cdc_conf.h" // At the end of conf_usb.h file
|
||||
\endcode
|
||||
*
|
||||
* Add to application C-file:
|
||||
* \code
|
||||
static bool my_flag_autorize_cdc_transfert = false;
|
||||
bool my_callback_cdc_enable(void)
|
||||
{
|
||||
my_flag_autorize_cdc_transfert = true;
|
||||
return true;
|
||||
}
|
||||
void my_callback_cdc_disable(void)
|
||||
{
|
||||
my_flag_autorize_cdc_transfert = false;
|
||||
}
|
||||
|
||||
void task(void)
|
||||
{
|
||||
if (my_flag_autorize_cdc_transfert) {
|
||||
udi_cdc_putc('A');
|
||||
udi_cdc_getc();
|
||||
}
|
||||
}
|
||||
\endcode
|
||||
*
|
||||
* \subsection udi_cdc_basic_use_case_setup_flow Workflow
|
||||
* -# Ensure that conf_usb.h is available and contains the following configuration,
|
||||
* which is the USB device CDC configuration:
|
||||
* - \code #define USB_DEVICE_SERIAL_NAME "12...EF" // Disk SN for CDC \endcode
|
||||
* \note The USB serial number is mandatory when a CDC interface is used.
|
||||
* - \code #define UDI_CDC_ENABLE_EXT(port) my_callback_cdc_enable()
|
||||
extern bool my_callback_cdc_enable(void); \endcode
|
||||
* \note After the device enumeration (detecting and identifying USB devices),
|
||||
* the USB host starts the device configuration. When the USB CDC interface
|
||||
* from the device is accepted by the host, the USB host enables this interface and the
|
||||
* UDI_CDC_ENABLE_EXT() callback function is called and return true.
|
||||
* Thus, when this event is received, the data transfer on CDC interface are authorized.
|
||||
* - \code #define UDI_CDC_DISABLE_EXT(port) my_callback_cdc_disable()
|
||||
extern void my_callback_cdc_disable(void); \endcode
|
||||
* \note When the USB device is unplugged or is reset by the USB host, the USB
|
||||
* interface is disabled and the UDI_CDC_DISABLE_EXT() callback function
|
||||
* is called. Thus, the data transfer must be stopped on CDC interface.
|
||||
* - \code #define UDI_CDC_LOW_RATE \endcode
|
||||
* \note Define it when the transfer CDC Device to Host is a low rate
|
||||
* (<512000 bauds) to reduce CDC buffers size.
|
||||
* - \code #define UDI_CDC_DEFAULT_RATE 115200
|
||||
#define UDI_CDC_DEFAULT_STOPBITS CDC_STOP_BITS_1
|
||||
#define UDI_CDC_DEFAULT_PARITY CDC_PAR_NONE
|
||||
#define UDI_CDC_DEFAULT_DATABITS 8 \endcode
|
||||
* \note Default configuration of communication port at startup.
|
||||
* -# Send or wait data on CDC line:
|
||||
* - \code // Waits and gets a value on CDC line
|
||||
int udi_cdc_getc(void);
|
||||
// Reads a RAM buffer on CDC line
|
||||
iram_size_t udi_cdc_read_buf(int* buf, iram_size_t size);
|
||||
// Puts a byte on CDC line
|
||||
int udi_cdc_putc(int value);
|
||||
// Writes a RAM buffer on CDC line
|
||||
iram_size_t udi_cdc_write_buf(const int* buf, iram_size_t size); \endcode
|
||||
*
|
||||
* \section udi_cdc_use_cases Advanced use cases
|
||||
* For more advanced use of the UDI CDC module, see the following use cases:
|
||||
* - \subpage udi_cdc_use_case_composite
|
||||
* - \subpage udc_use_case_1
|
||||
* - \subpage udc_use_case_2
|
||||
* - \subpage udc_use_case_3
|
||||
* - \subpage udc_use_case_4
|
||||
* - \subpage udc_use_case_5
|
||||
* - \subpage udc_use_case_6
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page udi_cdc_use_case_composite CDC in a composite device
|
||||
*
|
||||
* A USB Composite Device is a USB Device which uses more than one USB class.
|
||||
* In this use case, the "USB CDC (Composite Device)" module is used to
|
||||
* create a USB composite device. Thus, this USB module can be associated with
|
||||
* another "Composite Device" module, like "USB HID Mouse (Composite Device)".
|
||||
*
|
||||
* Also, you can refer to application note
|
||||
* <A href="http://www.atmel.com/dyn/resources/prod_documents/doc8445.pdf">
|
||||
* AVR4902 ASF - USB Composite Device</A>.
|
||||
*
|
||||
* \section udi_cdc_use_case_composite_setup Setup steps
|
||||
* For the setup code of this use case to work, the
|
||||
* \ref udi_cdc_basic_use_case "basic use case" must be followed.
|
||||
*
|
||||
* \section udi_cdc_use_case_composite_usage Usage steps
|
||||
*
|
||||
* \subsection udi_cdc_use_case_composite_usage_code Example code
|
||||
* Content of conf_usb.h:
|
||||
* \code
|
||||
#define USB_DEVICE_EP_CTRL_SIZE 64
|
||||
#define USB_DEVICE_NB_INTERFACE (X+2)
|
||||
#define USB_DEVICE_MAX_EP (X+3)
|
||||
|
||||
#define UDI_CDC_DATA_EP_IN_0 (1 | USB_EP_DIR_IN) // TX
|
||||
#define UDI_CDC_DATA_EP_OUT_0 (2 | USB_EP_DIR_OUT) // RX
|
||||
#define UDI_CDC_COMM_EP_0 (3 | USB_EP_DIR_IN) // Notify endpoint
|
||||
#define UDI_CDC_COMM_IFACE_NUMBER_0 X+0
|
||||
#define UDI_CDC_DATA_IFACE_NUMBER_0 X+1
|
||||
|
||||
#define UDI_COMPOSITE_DESC_T \
|
||||
usb_iad_desc_t udi_cdc_iad; \
|
||||
udi_cdc_comm_desc_t udi_cdc_comm; \
|
||||
udi_cdc_data_desc_t udi_cdc_data; \
|
||||
...
|
||||
#define UDI_COMPOSITE_DESC_FS \
|
||||
.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
|
||||
.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
|
||||
.udi_cdc_data = UDI_CDC_DATA_DESC_0_FS, \
|
||||
...
|
||||
#define UDI_COMPOSITE_DESC_HS \
|
||||
.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
|
||||
.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
|
||||
.udi_cdc_data = UDI_CDC_DATA_DESC_0_HS, \
|
||||
...
|
||||
#define UDI_COMPOSITE_API \
|
||||
&udi_api_cdc_comm, \
|
||||
&udi_api_cdc_data, \
|
||||
...
|
||||
\endcode
|
||||
*
|
||||
* \subsection udi_cdc_use_case_composite_usage_flow Workflow
|
||||
* -# Ensure that conf_usb.h is available and contains the following parameters
|
||||
* required for a USB composite device configuration:
|
||||
* - \code // Endpoint control size, This must be:
|
||||
// - 8, 16, 32 or 64 for full speed device (8 is recommended to save RAM)
|
||||
// - 64 for a high speed device
|
||||
#define USB_DEVICE_EP_CTRL_SIZE 64
|
||||
// Total Number of interfaces on this USB device.
|
||||
// Add 2 for CDC.
|
||||
#define USB_DEVICE_NB_INTERFACE (X+2)
|
||||
// Total number of endpoints on this USB device.
|
||||
// This must include each endpoint for each interface.
|
||||
// Add 3 for CDC.
|
||||
#define USB_DEVICE_MAX_EP (X+3) \endcode
|
||||
* -# Ensure that conf_usb.h contains the description of
|
||||
* composite device:
|
||||
* - \code // The endpoint numbers chosen by you for the CDC.
|
||||
// The endpoint numbers starting from 1.
|
||||
#define UDI_CDC_DATA_EP_IN_0 (1 | USB_EP_DIR_IN) // TX
|
||||
#define UDI_CDC_DATA_EP_OUT_0 (2 | USB_EP_DIR_OUT) // RX
|
||||
#define UDI_CDC_COMM_EP_0 (3 | USB_EP_DIR_IN) // Notify endpoint
|
||||
// The interface index of an interface starting from 0
|
||||
#define UDI_CDC_COMM_IFACE_NUMBER_0 X+0
|
||||
#define UDI_CDC_DATA_IFACE_NUMBER_0 X+1 \endcode
|
||||
* -# Ensure that conf_usb.h contains the following parameters
|
||||
* required for a USB composite device configuration:
|
||||
* - \code // USB Interfaces descriptor structure
|
||||
#define UDI_COMPOSITE_DESC_T \
|
||||
...
|
||||
usb_iad_desc_t udi_cdc_iad; \
|
||||
udi_cdc_comm_desc_t udi_cdc_comm; \
|
||||
udi_cdc_data_desc_t udi_cdc_data; \
|
||||
...
|
||||
// USB Interfaces descriptor value for Full Speed
|
||||
#define UDI_COMPOSITE_DESC_FS \
|
||||
...
|
||||
.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
|
||||
.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
|
||||
.udi_cdc_data = UDI_CDC_DATA_DESC_0_FS, \
|
||||
...
|
||||
// USB Interfaces descriptor value for High Speed
|
||||
#define UDI_COMPOSITE_DESC_HS \
|
||||
...
|
||||
.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
|
||||
.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
|
||||
.udi_cdc_data = UDI_CDC_DATA_DESC_0_HS, \
|
||||
...
|
||||
// USB Interface APIs
|
||||
#define UDI_COMPOSITE_API \
|
||||
...
|
||||
&udi_api_cdc_comm, \
|
||||
&udi_api_cdc_data, \
|
||||
... \endcode
|
||||
* - \note The descriptors order given in the four lists above must be the
|
||||
* same as the order defined by all interface indexes. The interface index
|
||||
* orders are defined through UDI_X_IFACE_NUMBER defines.\n
|
||||
* Also, the CDC requires a USB Interface Association Descriptor (IAD) for
|
||||
* composite device.
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif // _UDI_CDC_H_
|
||||
|
|
@ -1,156 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Default CDC configuration for a USB Device with a single interface
|
||||
*
|
||||
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef _UDI_CDC_CONF_H_
|
||||
#define _UDI_CDC_CONF_H_
|
||||
|
||||
#include "usb_protocol_cdc.h"
|
||||
#include "conf_usb.h"
|
||||
|
||||
#ifndef UDI_CDC_PORT_NB
|
||||
# define UDI_CDC_PORT_NB 1
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup udi_cdc_group_single_desc
|
||||
* @{
|
||||
*/
|
||||
|
||||
//! Control endpoint size (Endpoint 0)
|
||||
#define USB_DEVICE_EP_CTRL_SIZE 64
|
||||
|
||||
#if XMEGA
|
||||
/**
|
||||
* \name Endpoint configuration on XMEGA
|
||||
* The XMEGA supports a IN and OUT endpoint with the same number endpoint,
|
||||
* thus XMEGA can support up to 7 CDC interfaces.
|
||||
*/
|
||||
//@{
|
||||
#define UDI_CDC_DATA_EP_IN_0 ( 1 | USB_EP_DIR_IN) // TX
|
||||
#define UDI_CDC_DATA_EP_OUT_0 ( 2 | USB_EP_DIR_OUT) // RX
|
||||
#define UDI_CDC_COMM_EP_0 ( 2 | USB_EP_DIR_IN) // Notify endpoint
|
||||
#define UDI_CDC_DATA_EP_IN_1 ( 3 | USB_EP_DIR_IN) // TX
|
||||
#define UDI_CDC_DATA_EP_OUT_1 ( 4 | USB_EP_DIR_OUT) // RX
|
||||
#define UDI_CDC_COMM_EP_1 ( 4 | USB_EP_DIR_IN) // Notify endpoint
|
||||
#define UDI_CDC_DATA_EP_IN_2 ( 5 | USB_EP_DIR_IN) // TX
|
||||
#define UDI_CDC_DATA_EP_OUT_2 ( 6 | USB_EP_DIR_OUT) // RX
|
||||
#define UDI_CDC_COMM_EP_2 ( 6 | USB_EP_DIR_IN) // Notify endpoint
|
||||
#define UDI_CDC_DATA_EP_IN_3 ( 7 | USB_EP_DIR_IN) // TX
|
||||
#define UDI_CDC_DATA_EP_OUT_3 ( 8 | USB_EP_DIR_OUT) // RX
|
||||
#define UDI_CDC_COMM_EP_3 ( 8 | USB_EP_DIR_IN) // Notify endpoint
|
||||
#define UDI_CDC_DATA_EP_IN_4 ( 9 | USB_EP_DIR_IN) // TX
|
||||
#define UDI_CDC_DATA_EP_OUT_4 (10 | USB_EP_DIR_OUT) // RX
|
||||
#define UDI_CDC_COMM_EP_4 (10 | USB_EP_DIR_IN) // Notify endpoint
|
||||
#define UDI_CDC_DATA_EP_IN_5 (11 | USB_EP_DIR_IN) // TX
|
||||
#define UDI_CDC_DATA_EP_OUT_5 (12 | USB_EP_DIR_OUT) // RX
|
||||
#define UDI_CDC_COMM_EP_5 (12 | USB_EP_DIR_IN) // Notify endpoint
|
||||
#define UDI_CDC_DATA_EP_IN_6 (13 | USB_EP_DIR_IN) // TX
|
||||
#define UDI_CDC_DATA_EP_OUT_6 (14 | USB_EP_DIR_OUT) // RX
|
||||
#define UDI_CDC_COMM_EP_6 (14 | USB_EP_DIR_IN) // Notify endpoint
|
||||
//! 2 endpoints numbers used per CDC interface
|
||||
#define USB_DEVICE_MAX_EP (2*UDI_CDC_PORT_NB)
|
||||
//@}
|
||||
|
||||
#else
|
||||
|
||||
/**
|
||||
* \name Default endpoint configuration
|
||||
* The USBB, UDP, UDPHS and UOTGHS interfaces can support up to 2 CDC interfaces.
|
||||
*/
|
||||
//@{
|
||||
# if UDI_CDC_PORT_NB > 2
|
||||
# error USBB, UDP, UDPHS and UOTGHS interfaces have not enought endpoints.
|
||||
# endif
|
||||
#define UDI_CDC_DATA_EP_IN_0 (1 | USB_EP_DIR_IN) // TX
|
||||
#define UDI_CDC_DATA_EP_OUT_0 (2 | USB_EP_DIR_OUT) // RX
|
||||
#define UDI_CDC_COMM_EP_0 (3 | USB_EP_DIR_IN) // Notify endpoint
|
||||
# if SAM3U
|
||||
/* For 3U max endpoint size of 4 is 64, use 5 and 6 as bulk tx and rx */
|
||||
# define UDI_CDC_DATA_EP_IN_1 (6 | USB_EP_DIR_IN) // TX
|
||||
# define UDI_CDC_DATA_EP_OUT_1 (5 | USB_EP_DIR_OUT) // RX
|
||||
# define UDI_CDC_COMM_EP_1 (4 | USB_EP_DIR_IN) // Notify
|
||||
# else
|
||||
# define UDI_CDC_DATA_EP_IN_1 (4 | USB_EP_DIR_IN) // TX
|
||||
# define UDI_CDC_DATA_EP_OUT_1 (5 | USB_EP_DIR_OUT) // RX
|
||||
# define UDI_CDC_COMM_EP_1 (6 | USB_EP_DIR_IN) // Notify
|
||||
# endif
|
||||
//! 3 endpoints used per CDC interface
|
||||
#undef USB_DEVICE_MAX_EP // undefine this definition in header file
|
||||
#define USB_DEVICE_MAX_EP (3*UDI_CDC_PORT_NB)
|
||||
//@}
|
||||
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \name Default Interface numbers
|
||||
*/
|
||||
//@{
|
||||
#define UDI_CDC_COMM_IFACE_NUMBER_0 0
|
||||
#define UDI_CDC_DATA_IFACE_NUMBER_0 1
|
||||
#define UDI_CDC_COMM_IFACE_NUMBER_1 2
|
||||
#define UDI_CDC_DATA_IFACE_NUMBER_1 3
|
||||
#define UDI_CDC_COMM_IFACE_NUMBER_2 4
|
||||
#define UDI_CDC_DATA_IFACE_NUMBER_2 5
|
||||
#define UDI_CDC_COMM_IFACE_NUMBER_3 6
|
||||
#define UDI_CDC_DATA_IFACE_NUMBER_3 7
|
||||
#define UDI_CDC_COMM_IFACE_NUMBER_4 8
|
||||
#define UDI_CDC_DATA_IFACE_NUMBER_4 9
|
||||
#define UDI_CDC_COMM_IFACE_NUMBER_5 10
|
||||
#define UDI_CDC_DATA_IFACE_NUMBER_5 11
|
||||
#define UDI_CDC_COMM_IFACE_NUMBER_6 12
|
||||
#define UDI_CDC_DATA_IFACE_NUMBER_6 13
|
||||
//@}
|
||||
|
||||
//@}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif // _UDI_CDC_CONF_H_
|
||||
|
|
@ -1,254 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Default descriptors for a USB Device with a single interface CDC
|
||||
*
|
||||
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#include "conf_usb.h"
|
||||
#include "udd.h"
|
||||
#include "udc_desc.h"
|
||||
#include "udi_cdc.h"
|
||||
|
||||
|
||||
/**
|
||||
* \defgroup udi_cdc_group_single_desc USB device descriptors for a single interface
|
||||
*
|
||||
* The following structures provide the USB device descriptors required for
|
||||
* USB Device with a single interface CDC.
|
||||
*
|
||||
* It is ready to use and do not require more definition.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
//! Two interfaces for a CDC device
|
||||
#define USB_DEVICE_NB_INTERFACE (2*UDI_CDC_PORT_NB)
|
||||
|
||||
#ifdef USB_DEVICE_LPM_SUPPORT
|
||||
# define USB_VERSION USB_V2_1
|
||||
#else
|
||||
# define USB_VERSION USB_V2_0
|
||||
#endif
|
||||
|
||||
//! USB Device Descriptor
|
||||
COMPILER_WORD_ALIGNED
|
||||
UDC_DESC_STORAGE usb_dev_desc_t udc_device_desc = {
|
||||
.bLength = sizeof(usb_dev_desc_t),
|
||||
.bDescriptorType = USB_DT_DEVICE,
|
||||
.bcdUSB = LE16(USB_VERSION),
|
||||
#if UDI_CDC_PORT_NB > 1
|
||||
.bDeviceClass = 0,
|
||||
#else
|
||||
.bDeviceClass = CDC_CLASS_DEVICE,
|
||||
#endif
|
||||
.bDeviceSubClass = 0,
|
||||
.bDeviceProtocol = 0,
|
||||
.bMaxPacketSize0 = USB_DEVICE_EP_CTRL_SIZE,
|
||||
.idVendor = LE16(USB_DEVICE_VENDOR_ID),
|
||||
.idProduct = LE16(USB_DEVICE_PRODUCT_ID),
|
||||
.bcdDevice = LE16((USB_DEVICE_MAJOR_VERSION << 8)
|
||||
| USB_DEVICE_MINOR_VERSION),
|
||||
#ifdef USB_DEVICE_MANUFACTURE_NAME
|
||||
.iManufacturer = 1,
|
||||
#else
|
||||
.iManufacturer = 0, // No manufacture string
|
||||
#endif
|
||||
#ifdef USB_DEVICE_PRODUCT_NAME
|
||||
.iProduct = 2,
|
||||
#else
|
||||
.iProduct = 0, // No product string
|
||||
#endif
|
||||
#ifdef USB_DEVICE_SERIAL_NAME
|
||||
.iSerialNumber = 3,
|
||||
#else
|
||||
.iSerialNumber = 0, // No serial string
|
||||
#endif
|
||||
.bNumConfigurations = 1
|
||||
};
|
||||
|
||||
|
||||
#ifdef USB_DEVICE_HS_SUPPORT
|
||||
//! USB Device Qualifier Descriptor for HS
|
||||
COMPILER_WORD_ALIGNED
|
||||
UDC_DESC_STORAGE usb_dev_qual_desc_t udc_device_qual = {
|
||||
.bLength = sizeof(usb_dev_qual_desc_t),
|
||||
.bDescriptorType = USB_DT_DEVICE_QUALIFIER,
|
||||
.bcdUSB = LE16(USB_VERSION),
|
||||
#if UDI_CDC_PORT_NB > 1
|
||||
.bDeviceClass = 0,
|
||||
#else
|
||||
.bDeviceClass = CDC_CLASS_DEVICE,
|
||||
#endif
|
||||
.bDeviceSubClass = 0,
|
||||
.bDeviceProtocol = 0,
|
||||
.bMaxPacketSize0 = USB_DEVICE_EP_CTRL_SIZE,
|
||||
.bNumConfigurations = 1
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef USB_DEVICE_LPM_SUPPORT
|
||||
//! USB Device Qualifier Descriptor
|
||||
COMPILER_WORD_ALIGNED
|
||||
UDC_DESC_STORAGE usb_dev_lpm_desc_t udc_device_lpm = {
|
||||
.bos.bLength = sizeof(usb_dev_bos_desc_t),
|
||||
.bos.bDescriptorType = USB_DT_BOS,
|
||||
.bos.wTotalLength = LE16(sizeof(usb_dev_bos_desc_t) + sizeof(usb_dev_capa_ext_desc_t)),
|
||||
.bos.bNumDeviceCaps = 1,
|
||||
.capa_ext.bLength = sizeof(usb_dev_capa_ext_desc_t),
|
||||
.capa_ext.bDescriptorType = USB_DT_DEVICE_CAPABILITY,
|
||||
.capa_ext.bDevCapabilityType = USB_DC_USB20_EXTENSION,
|
||||
.capa_ext.bmAttributes = USB_DC_EXT_LPM,
|
||||
};
|
||||
#endif
|
||||
|
||||
//! Structure for USB Device Configuration Descriptor
|
||||
COMPILER_PACK_SET(1)
|
||||
typedef struct {
|
||||
usb_conf_desc_t conf;
|
||||
#if UDI_CDC_PORT_NB == 1
|
||||
udi_cdc_comm_desc_t udi_cdc_comm_0;
|
||||
udi_cdc_data_desc_t udi_cdc_data_0;
|
||||
#else
|
||||
# define UDI_CDC_DESC_STRUCTURE(index, unused) \
|
||||
usb_iad_desc_t udi_cdc_iad_##index; \
|
||||
udi_cdc_comm_desc_t udi_cdc_comm_##index; \
|
||||
udi_cdc_data_desc_t udi_cdc_data_##index;
|
||||
MREPEAT(UDI_CDC_PORT_NB, UDI_CDC_DESC_STRUCTURE, ~)
|
||||
# undef UDI_CDC_DESC_STRUCTURE
|
||||
#endif
|
||||
} udc_desc_t;
|
||||
COMPILER_PACK_RESET()
|
||||
|
||||
//! USB Device Configuration Descriptor filled for full and high speed
|
||||
COMPILER_WORD_ALIGNED
|
||||
UDC_DESC_STORAGE udc_desc_t udc_desc_fs = {
|
||||
.conf.bLength = sizeof(usb_conf_desc_t),
|
||||
.conf.bDescriptorType = USB_DT_CONFIGURATION,
|
||||
.conf.wTotalLength = LE16(sizeof(udc_desc_t)),
|
||||
.conf.bNumInterfaces = USB_DEVICE_NB_INTERFACE,
|
||||
.conf.bConfigurationValue = 1,
|
||||
.conf.iConfiguration = 0,
|
||||
.conf.bmAttributes = USB_CONFIG_ATTR_MUST_SET | USB_DEVICE_ATTR,
|
||||
.conf.bMaxPower = USB_CONFIG_MAX_POWER(USB_DEVICE_POWER),
|
||||
#if UDI_CDC_PORT_NB == 1
|
||||
.udi_cdc_comm_0 = UDI_CDC_COMM_DESC_0,
|
||||
.udi_cdc_data_0 = UDI_CDC_DATA_DESC_0_FS,
|
||||
#else
|
||||
# define UDI_CDC_DESC_FS(index, unused) \
|
||||
.udi_cdc_iad_##index = UDI_CDC_IAD_DESC_##index,\
|
||||
.udi_cdc_comm_##index = UDI_CDC_COMM_DESC_##index,\
|
||||
.udi_cdc_data_##index = UDI_CDC_DATA_DESC_##index##_FS,
|
||||
MREPEAT(UDI_CDC_PORT_NB, UDI_CDC_DESC_FS, ~)
|
||||
# undef UDI_CDC_DESC_FS
|
||||
#endif
|
||||
};
|
||||
|
||||
#ifdef USB_DEVICE_HS_SUPPORT
|
||||
COMPILER_WORD_ALIGNED
|
||||
UDC_DESC_STORAGE udc_desc_t udc_desc_hs = {
|
||||
.conf.bLength = sizeof(usb_conf_desc_t),
|
||||
.conf.bDescriptorType = USB_DT_CONFIGURATION,
|
||||
.conf.wTotalLength = LE16(sizeof(udc_desc_t)),
|
||||
.conf.bNumInterfaces = USB_DEVICE_NB_INTERFACE,
|
||||
.conf.bConfigurationValue = 1,
|
||||
.conf.iConfiguration = 0,
|
||||
.conf.bmAttributes = USB_CONFIG_ATTR_MUST_SET | USB_DEVICE_ATTR,
|
||||
.conf.bMaxPower = USB_CONFIG_MAX_POWER(USB_DEVICE_POWER),
|
||||
#if UDI_CDC_PORT_NB == 1
|
||||
.udi_cdc_comm_0 = UDI_CDC_COMM_DESC_0,
|
||||
.udi_cdc_data_0 = UDI_CDC_DATA_DESC_0_HS,
|
||||
#else
|
||||
# define UDI_CDC_DESC_HS(index, unused) \
|
||||
.udi_cdc_iad_##index = UDI_CDC_IAD_DESC_##index, \
|
||||
.udi_cdc_comm_##index = UDI_CDC_COMM_DESC_##index, \
|
||||
.udi_cdc_data_##index = UDI_CDC_DATA_DESC_##index##_HS,
|
||||
MREPEAT(UDI_CDC_PORT_NB, UDI_CDC_DESC_HS, ~)
|
||||
# undef UDI_CDC_DESC_HS
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \name UDC structures which content all USB Device definitions
|
||||
*/
|
||||
//@{
|
||||
|
||||
//! Associate an UDI for each USB interface
|
||||
UDC_DESC_STORAGE udi_api_t *udi_apis[USB_DEVICE_NB_INTERFACE] = {
|
||||
# define UDI_CDC_API(index, unused) \
|
||||
&udi_api_cdc_comm, \
|
||||
&udi_api_cdc_data,
|
||||
MREPEAT(UDI_CDC_PORT_NB, UDI_CDC_API, ~)
|
||||
# undef UDI_CDC_API
|
||||
};
|
||||
|
||||
//! Add UDI with USB Descriptors FS & HS
|
||||
UDC_DESC_STORAGE udc_config_speed_t udc_config_fs[1] = { {
|
||||
.desc = (usb_conf_desc_t UDC_DESC_STORAGE*)&udc_desc_fs,
|
||||
.udi_apis = udi_apis,
|
||||
}};
|
||||
#ifdef USB_DEVICE_HS_SUPPORT
|
||||
UDC_DESC_STORAGE udc_config_speed_t udc_config_hs[1] = { {
|
||||
.desc = (usb_conf_desc_t UDC_DESC_STORAGE*)&udc_desc_hs,
|
||||
.udi_apis = udi_apis,
|
||||
}};
|
||||
#endif
|
||||
|
||||
//! Add all information about USB Device in global structure for UDC
|
||||
UDC_DESC_STORAGE udc_config_t udc_config = {
|
||||
.confdev_lsfs = &udc_device_desc,
|
||||
.conf_lsfs = udc_config_fs,
|
||||
#ifdef USB_DEVICE_HS_SUPPORT
|
||||
.confdev_hs = &udc_device_desc,
|
||||
.qualifier = &udc_device_qual,
|
||||
.conf_hs = udc_config_hs,
|
||||
#endif
|
||||
#ifdef USB_DEVICE_LPM_SUPPORT
|
||||
.conf_bos = &udc_device_lpm.bos,
|
||||
#else
|
||||
.conf_bos = NULL,
|
||||
#endif
|
||||
};
|
||||
|
||||
//@}
|
||||
//@}
|
||||
|
|
@ -1,318 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief USB Communication Device Class (CDC) protocol definitions
|
||||
*
|
||||
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#ifndef _USB_PROTOCOL_CDC_H_
|
||||
#define _USB_PROTOCOL_CDC_H_
|
||||
|
||||
#include "compiler.h"
|
||||
|
||||
/**
|
||||
* \ingroup usb_protocol_group
|
||||
* \defgroup cdc_protocol_group Communication Device Class Definitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \name Possible values of class
|
||||
*/
|
||||
//@{
|
||||
#define CDC_CLASS_DEVICE 0x02 //!< USB Communication Device Class
|
||||
#define CDC_CLASS_COMM 0x02 //!< CDC Communication Class Interface
|
||||
#define CDC_CLASS_DATA 0x0A //!< CDC Data Class Interface
|
||||
//@}
|
||||
|
||||
//! \name USB CDC Subclass IDs
|
||||
//@{
|
||||
#define CDC_SUBCLASS_DLCM 0x01 //!< Direct Line Control Model
|
||||
#define CDC_SUBCLASS_ACM 0x02 //!< Abstract Control Model
|
||||
#define CDC_SUBCLASS_TCM 0x03 //!< Telephone Control Model
|
||||
#define CDC_SUBCLASS_MCCM 0x04 //!< Multi-Channel Control Model
|
||||
#define CDC_SUBCLASS_CCM 0x05 //!< CAPI Control Model
|
||||
#define CDC_SUBCLASS_ETH 0x06 //!< Ethernet Networking Control Model
|
||||
#define CDC_SUBCLASS_ATM 0x07 //!< ATM Networking Control Model
|
||||
//@}
|
||||
|
||||
//! \name USB CDC Communication Interface Protocol IDs
|
||||
//@{
|
||||
#define CDC_PROTOCOL_V25TER 0x01 //!< Common AT commands
|
||||
//@}
|
||||
|
||||
//! \name USB CDC Data Interface Protocol IDs
|
||||
//@{
|
||||
#define CDC_PROTOCOL_I430 0x30 //!< ISDN BRI
|
||||
#define CDC_PROTOCOL_HDLC 0x31 //!< HDLC
|
||||
#define CDC_PROTOCOL_TRANS 0x32 //!< Transparent
|
||||
#define CDC_PROTOCOL_Q921M 0x50 //!< Q.921 management protocol
|
||||
#define CDC_PROTOCOL_Q921 0x51 //!< Q.931 [sic] Data link protocol
|
||||
#define CDC_PROTOCOL_Q921TM 0x52 //!< Q.921 TEI-multiplexor
|
||||
#define CDC_PROTOCOL_V42BIS 0x90 //!< Data compression procedures
|
||||
#define CDC_PROTOCOL_Q931 0x91 //!< Euro-ISDN protocol control
|
||||
#define CDC_PROTOCOL_V120 0x92 //!< V.24 rate adaption to ISDN
|
||||
#define CDC_PROTOCOL_CAPI20 0x93 //!< CAPI Commands
|
||||
#define CDC_PROTOCOL_HOST 0xFD //!< Host based driver
|
||||
/**
|
||||
* \brief Describes the Protocol Unit Functional Descriptors [sic]
|
||||
* on Communication Class Interface
|
||||
*/
|
||||
#define CDC_PROTOCOL_PUFD 0xFE
|
||||
//@}
|
||||
|
||||
//! \name USB CDC Functional Descriptor Types
|
||||
//@{
|
||||
#define CDC_CS_INTERFACE 0x24 //!< Interface Functional Descriptor
|
||||
#define CDC_CS_ENDPOINT 0x25 //!< Endpoint Functional Descriptor
|
||||
//@}
|
||||
|
||||
//! \name USB CDC Functional Descriptor Subtypes
|
||||
//@{
|
||||
#define CDC_SCS_HEADER 0x00 //!< Header Functional Descriptor
|
||||
#define CDC_SCS_CALL_MGMT 0x01 //!< Call Management
|
||||
#define CDC_SCS_ACM 0x02 //!< Abstract Control Management
|
||||
#define CDC_SCS_UNION 0x06 //!< Union Functional Descriptor
|
||||
//@}
|
||||
|
||||
//! \name USB CDC Request IDs
|
||||
//@{
|
||||
#define USB_REQ_CDC_SEND_ENCAPSULATED_COMMAND 0x00
|
||||
#define USB_REQ_CDC_GET_ENCAPSULATED_RESPONSE 0x01
|
||||
#define USB_REQ_CDC_SET_COMM_FEATURE 0x02
|
||||
#define USB_REQ_CDC_GET_COMM_FEATURE 0x03
|
||||
#define USB_REQ_CDC_CLEAR_COMM_FEATURE 0x04
|
||||
#define USB_REQ_CDC_SET_AUX_LINE_STATE 0x10
|
||||
#define USB_REQ_CDC_SET_HOOK_STATE 0x11
|
||||
#define USB_REQ_CDC_PULSE_SETUP 0x12
|
||||
#define USB_REQ_CDC_SEND_PULSE 0x13
|
||||
#define USB_REQ_CDC_SET_PULSE_TIME 0x14
|
||||
#define USB_REQ_CDC_RING_AUX_JACK 0x15
|
||||
#define USB_REQ_CDC_SET_LINE_CODING 0x20
|
||||
#define USB_REQ_CDC_GET_LINE_CODING 0x21
|
||||
#define USB_REQ_CDC_SET_CONTROL_LINE_STATE 0x22
|
||||
#define USB_REQ_CDC_SEND_BREAK 0x23
|
||||
#define USB_REQ_CDC_SET_RINGER_PARMS 0x30
|
||||
#define USB_REQ_CDC_GET_RINGER_PARMS 0x31
|
||||
#define USB_REQ_CDC_SET_OPERATION_PARMS 0x32
|
||||
#define USB_REQ_CDC_GET_OPERATION_PARMS 0x33
|
||||
#define USB_REQ_CDC_SET_LINE_PARMS 0x34
|
||||
#define USB_REQ_CDC_GET_LINE_PARMS 0x35
|
||||
#define USB_REQ_CDC_DIAL_DIGITS 0x36
|
||||
#define USB_REQ_CDC_SET_UNIT_PARAMETER 0x37
|
||||
#define USB_REQ_CDC_GET_UNIT_PARAMETER 0x38
|
||||
#define USB_REQ_CDC_CLEAR_UNIT_PARAMETER 0x39
|
||||
#define USB_REQ_CDC_GET_PROFILE 0x3A
|
||||
#define USB_REQ_CDC_SET_ETHERNET_MULTICAST_FILTERS 0x40
|
||||
#define USB_REQ_CDC_SET_ETHERNET_POWER_MANAGEMENT_PATTERNFILTER 0x41
|
||||
#define USB_REQ_CDC_GET_ETHERNET_POWER_MANAGEMENT_PATTERNFILTER 0x42
|
||||
#define USB_REQ_CDC_SET_ETHERNET_PACKET_FILTER 0x43
|
||||
#define USB_REQ_CDC_GET_ETHERNET_STATISTIC 0x44
|
||||
#define USB_REQ_CDC_SET_ATM_DATA_FORMAT 0x50
|
||||
#define USB_REQ_CDC_GET_ATM_DEVICE_STATISTICS 0x51
|
||||
#define USB_REQ_CDC_SET_ATM_DEFAULT_VC 0x52
|
||||
#define USB_REQ_CDC_GET_ATM_VC_STATISTICS 0x53
|
||||
// Added bNotification codes according cdc spec 1.1 chapter 6.3
|
||||
#define USB_REQ_CDC_NOTIFY_RING_DETECT 0x09
|
||||
#define USB_REQ_CDC_NOTIFY_SERIAL_STATE 0x20
|
||||
#define USB_REQ_CDC_NOTIFY_CALL_STATE_CHANGE 0x28
|
||||
#define USB_REQ_CDC_NOTIFY_LINE_STATE_CHANGE 0x29
|
||||
//@}
|
||||
|
||||
/*
|
||||
* Need to pack structures tightly, or the compiler might insert padding
|
||||
* and violate the spec-mandated layout.
|
||||
*/
|
||||
COMPILER_PACK_SET(1)
|
||||
|
||||
//! \name USB CDC Descriptors
|
||||
//@{
|
||||
|
||||
|
||||
//! CDC Header Functional Descriptor
|
||||
typedef struct {
|
||||
uint8_t bFunctionLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bDescriptorSubtype;
|
||||
le16_t bcdCDC;
|
||||
} usb_cdc_hdr_desc_t;
|
||||
|
||||
//! CDC Call Management Functional Descriptor
|
||||
typedef struct {
|
||||
uint8_t bFunctionLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bDescriptorSubtype;
|
||||
uint8_t bmCapabilities;
|
||||
uint8_t bDataInterface;
|
||||
} usb_cdc_call_mgmt_desc_t;
|
||||
|
||||
//! CDC ACM Functional Descriptor
|
||||
typedef struct {
|
||||
uint8_t bFunctionLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bDescriptorSubtype;
|
||||
uint8_t bmCapabilities;
|
||||
} usb_cdc_acm_desc_t;
|
||||
|
||||
//! CDC Union Functional Descriptor
|
||||
typedef struct {
|
||||
uint8_t bFunctionLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bDescriptorSubtype;
|
||||
uint8_t bMasterInterface;
|
||||
uint8_t bSlaveInterface0;
|
||||
} usb_cdc_union_desc_t;
|
||||
|
||||
|
||||
//! \name USB CDC Call Management Capabilities
|
||||
//@{
|
||||
//! Device handles call management itself
|
||||
#define CDC_CALL_MGMT_SUPPORTED (1 << 0)
|
||||
//! Device can send/receive call management info over a Data Class interface
|
||||
#define CDC_CALL_MGMT_OVER_DCI (1 << 1)
|
||||
//@}
|
||||
|
||||
//! \name USB CDC ACM Capabilities
|
||||
//@{
|
||||
//! Device supports the request combination of
|
||||
//! Set_Comm_Feature, Clear_Comm_Feature, and Get_Comm_Feature.
|
||||
#define CDC_ACM_SUPPORT_FEATURE_REQUESTS (1 << 0)
|
||||
//! Device supports the request combination of
|
||||
//! Set_Line_Coding, Set_Control_Line_State, Get_Line_Coding,
|
||||
//! and the notification Serial_State.
|
||||
#define CDC_ACM_SUPPORT_LINE_REQUESTS (1 << 1)
|
||||
//! Device supports the request Send_Break
|
||||
#define CDC_ACM_SUPPORT_SENDBREAK_REQUESTS (1 << 2)
|
||||
//! Device supports the notification Network_Connection.
|
||||
#define CDC_ACM_SUPPORT_NOTIFY_REQUESTS (1 << 3)
|
||||
//@}
|
||||
//@}
|
||||
|
||||
//! \name USB CDC line control
|
||||
//@{
|
||||
|
||||
//! \name USB CDC line coding
|
||||
//@{
|
||||
//! Line Coding structure
|
||||
typedef struct {
|
||||
le32_t dwDTERate;
|
||||
uint8_t bCharFormat;
|
||||
uint8_t bParityType;
|
||||
uint8_t bDataBits;
|
||||
} usb_cdc_line_coding_t;
|
||||
//! Possible values of bCharFormat
|
||||
enum cdc_char_format {
|
||||
CDC_STOP_BITS_1 = 0, //!< 1 stop bit
|
||||
CDC_STOP_BITS_1_5 = 1, //!< 1.5 stop bits
|
||||
CDC_STOP_BITS_2 = 2, //!< 2 stop bits
|
||||
};
|
||||
//! Possible values of bParityType
|
||||
enum cdc_parity {
|
||||
CDC_PAR_NONE = 0, //!< No parity
|
||||
CDC_PAR_ODD = 1, //!< Odd parity
|
||||
CDC_PAR_EVEN = 2, //!< Even parity
|
||||
CDC_PAR_MARK = 3, //!< Parity forced to 0 (space)
|
||||
CDC_PAR_SPACE = 4, //!< Parity forced to 1 (mark)
|
||||
};
|
||||
//@}
|
||||
|
||||
//! \name USB CDC control signals
|
||||
//! spec 1.1 chapter 6.2.14
|
||||
//@{
|
||||
|
||||
//! Control signal structure
|
||||
typedef struct {
|
||||
uint16_t value;
|
||||
} usb_cdc_control_signal_t;
|
||||
|
||||
//! \name Possible values in usb_cdc_control_signal_t
|
||||
//@{
|
||||
//! Carrier control for half duplex modems.
|
||||
//! This signal corresponds to V.24 signal 105 and RS-232 signal RTS.
|
||||
//! The device ignores the value of this bit
|
||||
//! when operating in full duplex mode.
|
||||
#define CDC_CTRL_SIGNAL_ACTIVATE_CARRIER (1 << 1)
|
||||
//! Indicates to DCE if DTE is present or not.
|
||||
//! This signal corresponds to V.24 signal 108/2 and RS-232 signal DTR.
|
||||
#define CDC_CTRL_SIGNAL_DTE_PRESENT (1 << 0)
|
||||
//@}
|
||||
//@}
|
||||
|
||||
|
||||
//! \name USB CDC notification message
|
||||
//@{
|
||||
|
||||
typedef struct {
|
||||
uint8_t bmRequestType;
|
||||
uint8_t bNotification;
|
||||
le16_t wValue;
|
||||
le16_t wIndex;
|
||||
le16_t wLength;
|
||||
} usb_cdc_notify_msg_t;
|
||||
|
||||
//! \name USB CDC serial state
|
||||
//@{*
|
||||
|
||||
//! Hardware handshake support (cdc spec 1.1 chapter 6.3.5)
|
||||
typedef struct {
|
||||
usb_cdc_notify_msg_t header;
|
||||
le16_t value;
|
||||
} usb_cdc_notify_serial_state_t;
|
||||
|
||||
//! \name Possible values in usb_cdc_notify_serial_state_t
|
||||
//@{
|
||||
#define CDC_SERIAL_STATE_DCD CPU_TO_LE16((1<<0))
|
||||
#define CDC_SERIAL_STATE_DSR CPU_TO_LE16((1<<1))
|
||||
#define CDC_SERIAL_STATE_BREAK CPU_TO_LE16((1<<2))
|
||||
#define CDC_SERIAL_STATE_RING CPU_TO_LE16((1<<3))
|
||||
#define CDC_SERIAL_STATE_FRAMING CPU_TO_LE16((1<<4))
|
||||
#define CDC_SERIAL_STATE_PARITY CPU_TO_LE16((1<<5))
|
||||
#define CDC_SERIAL_STATE_OVERRUN CPU_TO_LE16((1<<6))
|
||||
//@}
|
||||
//! @}
|
||||
|
||||
//! @}
|
||||
|
||||
COMPILER_PACK_RESET()
|
||||
|
||||
//! @}
|
||||
|
||||
#endif // _USB_PROTOCOL_CDC_H_
|
||||
|
|
@ -1,147 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief User Interface
|
||||
*
|
||||
* Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#include <asf.h>
|
||||
#include "ui.h"
|
||||
|
||||
void ui_init(void)
|
||||
{
|
||||
/* Initialize LEDs */
|
||||
LED_On(LED_0_PIN);
|
||||
}
|
||||
|
||||
void ui_powerdown(void)
|
||||
{
|
||||
LED_Off(LED_0_PIN);
|
||||
}
|
||||
|
||||
void ui_wakeup(void)
|
||||
{
|
||||
LED_On(LED_0_PIN);
|
||||
}
|
||||
|
||||
|
||||
void ui_com_open(uint8_t port)
|
||||
{
|
||||
UNUSED(port);
|
||||
}
|
||||
|
||||
|
||||
void ui_com_close(uint8_t port)
|
||||
{
|
||||
UNUSED(port);
|
||||
}
|
||||
|
||||
|
||||
void ui_com_rx_start(void)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
|
||||
void ui_com_rx_stop(void)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
|
||||
void ui_com_tx_start(void)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
|
||||
void ui_com_tx_stop(void)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
|
||||
void ui_com_error(void)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
|
||||
void ui_com_overflow(void)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
void ui_start_read(void)
|
||||
{
|
||||
}
|
||||
|
||||
void ui_stop_read(void)
|
||||
{
|
||||
}
|
||||
|
||||
void ui_start_write(void)
|
||||
{
|
||||
}
|
||||
|
||||
void ui_stop_write(void)
|
||||
{
|
||||
}
|
||||
|
||||
void ui_process(uint16_t framenumber)
|
||||
{
|
||||
if ((framenumber % 1000) == 0) {
|
||||
LED_On(LED_0_PIN);
|
||||
}
|
||||
if ((framenumber % 1000) == 500) {
|
||||
LED_Off(LED_0_PIN);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* \defgroup UI User Interface
|
||||
*
|
||||
* Human interface on SAMD21-XPlain:
|
||||
* - LED0 blinks when USB host has checked and enabled CDC and MSC interface
|
||||
*
|
||||
*/
|
||||
|
|
@ -1,50 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Descriptors for an USB Composite Device MSC and HID mouse
|
||||
*
|
||||
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef _UDI_COMPOSITE_CONF_H_
|
||||
#define _UDI_COMPOSITE_CONF_H_
|
||||
|
||||
#endif // _UDI_COMPOSITE_CONF_H_
|
||||
|
|
@ -1,184 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Descriptors for an USB Composite Device
|
||||
*
|
||||
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#include "conf_usb.h"
|
||||
#include "udd.h"
|
||||
#include "udc_desc.h"
|
||||
|
||||
/**
|
||||
* \defgroup udi_group_desc Descriptors for a USB Device
|
||||
* composite
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**INDENT-OFF**/
|
||||
|
||||
//! USB Device Descriptor
|
||||
COMPILER_WORD_ALIGNED
|
||||
UDC_DESC_STORAGE usb_dev_desc_t udc_device_desc = {
|
||||
.bLength = sizeof(usb_dev_desc_t),
|
||||
.bDescriptorType = USB_DT_DEVICE,
|
||||
.bcdUSB = LE16(USB_V2_0),
|
||||
.bDeviceClass = 0,
|
||||
.bDeviceSubClass = 0,
|
||||
.bDeviceProtocol = 0,
|
||||
.bMaxPacketSize0 = USB_DEVICE_EP_CTRL_SIZE,
|
||||
.idVendor = LE16(USB_DEVICE_VENDOR_ID),
|
||||
.idProduct = LE16(USB_DEVICE_PRODUCT_ID),
|
||||
.bcdDevice = LE16((USB_DEVICE_MAJOR_VERSION << 8)
|
||||
| USB_DEVICE_MINOR_VERSION),
|
||||
#ifdef USB_DEVICE_MANUFACTURE_NAME
|
||||
.iManufacturer = 1,
|
||||
#else
|
||||
.iManufacturer = 0, // No manufacture string
|
||||
#endif
|
||||
#ifdef USB_DEVICE_PRODUCT_NAME
|
||||
.iProduct = 2,
|
||||
#else
|
||||
.iProduct = 0, // No product string
|
||||
#endif
|
||||
#ifdef USB_DEVICE_SERIAL_NAME
|
||||
.iSerialNumber = 3,
|
||||
#else
|
||||
.iSerialNumber = 0, // No serial string
|
||||
#endif
|
||||
.bNumConfigurations = 1
|
||||
};
|
||||
|
||||
|
||||
#ifdef USB_DEVICE_HS_SUPPORT
|
||||
//! USB Device Qualifier Descriptor for HS
|
||||
COMPILER_WORD_ALIGNED
|
||||
UDC_DESC_STORAGE usb_dev_qual_desc_t udc_device_qual = {
|
||||
.bLength = sizeof(usb_dev_qual_desc_t),
|
||||
.bDescriptorType = USB_DT_DEVICE_QUALIFIER,
|
||||
.bcdUSB = LE16(USB_V2_0),
|
||||
.bDeviceClass = 0,
|
||||
.bDeviceSubClass = 0,
|
||||
.bDeviceProtocol = 0,
|
||||
.bMaxPacketSize0 = USB_DEVICE_EP_CTRL_SIZE,
|
||||
.bNumConfigurations = 1
|
||||
};
|
||||
#endif
|
||||
|
||||
//! Structure for USB Device Configuration Descriptor
|
||||
COMPILER_PACK_SET(1)
|
||||
typedef struct {
|
||||
usb_conf_desc_t conf;
|
||||
UDI_COMPOSITE_DESC_T;
|
||||
} udc_desc_t;
|
||||
COMPILER_PACK_RESET()
|
||||
|
||||
//! USB Device Configuration Descriptor filled for FS
|
||||
COMPILER_WORD_ALIGNED
|
||||
UDC_DESC_STORAGE udc_desc_t udc_desc_fs = {
|
||||
.conf.bLength = sizeof(usb_conf_desc_t),
|
||||
.conf.bDescriptorType = USB_DT_CONFIGURATION,
|
||||
.conf.wTotalLength = LE16(sizeof(udc_desc_t)),
|
||||
.conf.bNumInterfaces = USB_DEVICE_NB_INTERFACE,
|
||||
.conf.bConfigurationValue = 1,
|
||||
.conf.iConfiguration = 0,
|
||||
.conf.bmAttributes = USB_CONFIG_ATTR_MUST_SET | USB_DEVICE_ATTR,
|
||||
.conf.bMaxPower = USB_CONFIG_MAX_POWER(USB_DEVICE_POWER),
|
||||
UDI_COMPOSITE_DESC_FS
|
||||
};
|
||||
|
||||
#ifdef USB_DEVICE_HS_SUPPORT
|
||||
//! USB Device Configuration Descriptor filled for HS
|
||||
COMPILER_WORD_ALIGNED
|
||||
UDC_DESC_STORAGE udc_desc_t udc_desc_hs = {
|
||||
.conf.bLength = sizeof(usb_conf_desc_t),
|
||||
.conf.bDescriptorType = USB_DT_CONFIGURATION,
|
||||
.conf.wTotalLength = LE16(sizeof(udc_desc_t)),
|
||||
.conf.bNumInterfaces = USB_DEVICE_NB_INTERFACE,
|
||||
.conf.bConfigurationValue = 1,
|
||||
.conf.iConfiguration = 0,
|
||||
.conf.bmAttributes = USB_CONFIG_ATTR_MUST_SET | USB_DEVICE_ATTR,
|
||||
.conf.bMaxPower = USB_CONFIG_MAX_POWER(USB_DEVICE_POWER),
|
||||
UDI_COMPOSITE_DESC_HS
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* \name UDC structures which contains all USB Device definitions
|
||||
*/
|
||||
//@{
|
||||
|
||||
//! Associate an UDI for each USB interface
|
||||
UDC_DESC_STORAGE udi_api_t *udi_apis[USB_DEVICE_NB_INTERFACE] = {
|
||||
UDI_COMPOSITE_API
|
||||
};
|
||||
|
||||
//! Add UDI with USB Descriptors FS
|
||||
UDC_DESC_STORAGE udc_config_speed_t udc_config_lsfs[1] = {{
|
||||
.desc = (usb_conf_desc_t UDC_DESC_STORAGE*)&udc_desc_fs,
|
||||
.udi_apis = udi_apis,
|
||||
}};
|
||||
|
||||
#ifdef USB_DEVICE_HS_SUPPORT
|
||||
//! Add UDI with USB Descriptors HS
|
||||
UDC_DESC_STORAGE udc_config_speed_t udc_config_hs[1] = {{
|
||||
.desc = (usb_conf_desc_t UDC_DESC_STORAGE*)&udc_desc_hs,
|
||||
.udi_apis = udi_apis,
|
||||
}};
|
||||
#endif
|
||||
|
||||
//! Add all information about USB Device in global structure for UDC
|
||||
UDC_DESC_STORAGE udc_config_t udc_config = {
|
||||
.confdev_lsfs = &udc_device_desc,
|
||||
.conf_lsfs = udc_config_lsfs,
|
||||
#ifdef USB_DEVICE_HS_SUPPORT
|
||||
.confdev_hs = &udc_device_desc,
|
||||
.qualifier = &udc_device_qual,
|
||||
.conf_hs = udc_config_hs,
|
||||
#endif
|
||||
};
|
||||
|
||||
//@}
|
||||
/**INDENT-ON**/
|
||||
//@}
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -1,376 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief USB Device Mass Storage Class (MSC) interface definitions.
|
||||
*
|
||||
* Copyright (c) 2009-2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef _UDI_MSC_H_
|
||||
#define _UDI_MSC_H_
|
||||
|
||||
#include "conf_usb.h"
|
||||
#include "usb_protocol.h"
|
||||
#include "usb_protocol_msc.h"
|
||||
#include "udd.h"
|
||||
#include "udc_desc.h"
|
||||
#include "udi.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup udi_msc_group_udc
|
||||
* @{
|
||||
*/
|
||||
//! Global structure which contains standard UDI interface for UDC
|
||||
extern UDC_DESC_STORAGE udi_api_t udi_api_msc;
|
||||
//@}
|
||||
|
||||
/**
|
||||
* \ingroup udi_msc_group
|
||||
* \defgroup udi_msc_group USB interface descriptors
|
||||
*
|
||||
* The following structures provide predefined USB interface descriptors.
|
||||
* It must be used to define the final USB descriptors.
|
||||
*/
|
||||
//@{
|
||||
|
||||
//! Interface descriptor structure for MSC
|
||||
typedef struct {
|
||||
usb_iface_desc_t iface;
|
||||
usb_ep_desc_t ep_in;
|
||||
usb_ep_desc_t ep_out;
|
||||
} udi_msc_desc_t;
|
||||
|
||||
//! By default no string associated to this interface
|
||||
#ifndef UDI_MSC_STRING_ID
|
||||
#define UDI_MSC_STRING_ID 0
|
||||
#endif
|
||||
|
||||
//! MSC endpoints size for full speed
|
||||
#define UDI_MSC_EPS_SIZE_FS 64
|
||||
//! MSC endpoints size for high speed
|
||||
#define UDI_MSC_EPS_SIZE_HS 512
|
||||
|
||||
//! Content of MSC interface descriptor for all speeds
|
||||
#define UDI_MSC_DESC \
|
||||
.iface.bLength = sizeof(usb_iface_desc_t),\
|
||||
.iface.bDescriptorType = USB_DT_INTERFACE,\
|
||||
.iface.bInterfaceNumber = UDI_MSC_IFACE_NUMBER,\
|
||||
.iface.bAlternateSetting = 0,\
|
||||
.iface.bNumEndpoints = 2,\
|
||||
.iface.bInterfaceClass = MSC_CLASS,\
|
||||
.iface.bInterfaceSubClass = MSC_SUBCLASS_TRANSPARENT,\
|
||||
.iface.bInterfaceProtocol = MSC_PROTOCOL_BULK,\
|
||||
.iface.iInterface = UDI_MSC_STRING_ID,\
|
||||
.ep_in.bLength = sizeof(usb_ep_desc_t),\
|
||||
.ep_in.bDescriptorType = USB_DT_ENDPOINT,\
|
||||
.ep_in.bEndpointAddress = UDI_MSC_EP_IN,\
|
||||
.ep_in.bmAttributes = USB_EP_TYPE_BULK,\
|
||||
.ep_in.bInterval = 0,\
|
||||
.ep_out.bLength = sizeof(usb_ep_desc_t),\
|
||||
.ep_out.bDescriptorType = USB_DT_ENDPOINT,\
|
||||
.ep_out.bEndpointAddress = UDI_MSC_EP_OUT,\
|
||||
.ep_out.bmAttributes = USB_EP_TYPE_BULK,\
|
||||
.ep_out.bInterval = 0,
|
||||
|
||||
//! Content of MSC interface descriptor for full speed only
|
||||
#define UDI_MSC_DESC_FS {\
|
||||
UDI_MSC_DESC \
|
||||
.ep_in.wMaxPacketSize = LE16(UDI_MSC_EPS_SIZE_FS),\
|
||||
.ep_out.wMaxPacketSize = LE16(UDI_MSC_EPS_SIZE_FS),\
|
||||
}
|
||||
|
||||
//! Content of MSC interface descriptor for high speed only
|
||||
#define UDI_MSC_DESC_HS {\
|
||||
UDI_MSC_DESC \
|
||||
.ep_in.wMaxPacketSize = LE16(UDI_MSC_EPS_SIZE_HS),\
|
||||
.ep_out.wMaxPacketSize = LE16(UDI_MSC_EPS_SIZE_HS),\
|
||||
}
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \ingroup udi_group
|
||||
* \defgroup udi_msc_group USB Device Interface (UDI) for Mass Storage Class (MSC)
|
||||
*
|
||||
* Common APIs used by high level application to use this USB class.
|
||||
*
|
||||
* These routines are used by memory to transfer its data
|
||||
* to/from USB MSC endpoints.
|
||||
*
|
||||
* See \ref udi_msc_quickstart.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Process the background read/write commands
|
||||
*
|
||||
* Routine called by the main loop
|
||||
*/
|
||||
bool udi_msc_process_trans(void);
|
||||
|
||||
/**
|
||||
* \brief Transfers data to/from USB MSC endpoints
|
||||
*
|
||||
*
|
||||
* \param b_read Memory to USB, if true
|
||||
* \param block Buffer on Internal RAM to send or fill
|
||||
* \param block_size Buffer size to send or fill
|
||||
* \param callback Function to call at the end of transfer.
|
||||
* If NULL then the routine exit when transfer is finish.
|
||||
*
|
||||
* \return \c 1 if function was successfully done, otherwise \c 0.
|
||||
*/
|
||||
bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size,
|
||||
void (*callback) (udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep));
|
||||
//@}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* \page udi_msc_quickstart Quick start guide for USB device Mass Storage module (UDI MSC)
|
||||
*
|
||||
* This is the quick start guide for the \ref udi_msc_group
|
||||
* "USB device interface MSC module (UDI MSC)" with step-by-step instructions on
|
||||
* how to configure and use the modules in a selection of use cases.
|
||||
*
|
||||
* The use cases contain several code fragments. The code fragments in the
|
||||
* steps for setup can be copied into a custom initialization function, while
|
||||
* the steps for usage can be copied into, e.g., the main application function.
|
||||
*
|
||||
* \section udi_msc_basic_use_case Basic use case
|
||||
* In this basic use case, the "USB MSC (Single Interface Device)" module is used.
|
||||
* The "USB MSC (Composite Device)" module usage is described in \ref udi_msc_use_cases
|
||||
* "Advanced use cases".
|
||||
*
|
||||
* \section udi_msc_basic_use_case_setup Setup steps
|
||||
* \subsection udi_msc_basic_use_case_setup_prereq Prerequisites
|
||||
* \copydetails udc_basic_use_case_setup_prereq
|
||||
* \subsection udi_msc_basic_use_case_setup_code Example code
|
||||
* \copydetails udc_basic_use_case_setup_code
|
||||
* \subsection udi_msc_basic_use_case_setup_flow Workflow
|
||||
* \copydetails udc_basic_use_case_setup_flow
|
||||
*
|
||||
* \section udi_msc_basic_use_case_usage Usage steps
|
||||
*
|
||||
* \subsection udi_msc_basic_use_case_usage_code Example code
|
||||
* Content of conf_usb.h:
|
||||
* \code
|
||||
#define USB_DEVICE_SERIAL_NAME "12...EF" // Disk SN for MSC
|
||||
#define UDI_MSC_GLOBAL_VENDOR_ID \
|
||||
'A', 'T', 'M', 'E', 'L', ' ', ' ', ' '
|
||||
#define UDI_MSC_GLOBAL_PRODUCT_VERSION \
|
||||
'1', '.', '0', '0'
|
||||
#define UDI_MSC_ENABLE_EXT() my_callback_msc_enable()
|
||||
extern bool my_callback_msc_enable(void);
|
||||
#define UDI_MSC_DISABLE_EXT() my_callback_msc_disable()
|
||||
extern void my_callback_msc_disable(void);
|
||||
#include "udi_msc_conf.h" // At the end of conf_usb.h file
|
||||
\endcode
|
||||
*
|
||||
* Add to application C-file:
|
||||
* \code
|
||||
static bool my_flag_autorize_msc_transfert = false;
|
||||
bool my_callback_msc_enable(void)
|
||||
{
|
||||
my_flag_autorize_msc_transfert = true;
|
||||
return true;
|
||||
}
|
||||
void my_callback_msc_disable(void)
|
||||
{
|
||||
my_flag_autorize_msc_transfert = false;
|
||||
}
|
||||
|
||||
void task(void)
|
||||
{
|
||||
udi_msc_process_trans();
|
||||
}
|
||||
\endcode
|
||||
*
|
||||
* \subsection udi_msc_basic_use_case_setup_flow Workflow
|
||||
* -# Ensure that conf_usb.h is available and contains the following configuration,
|
||||
* which is the USB device MSC configuration:
|
||||
* - \code #define USB_DEVICE_SERIAL_NAME "12...EF" // Disk SN for MSC \endcode
|
||||
* \note The USB serial number is mandatory when a MSC interface is used.
|
||||
* - \code //! Vendor name and Product version of MSC interface
|
||||
#define UDI_MSC_GLOBAL_VENDOR_ID \
|
||||
'A', 'T', 'M', 'E', 'L', ' ', ' ', ' '
|
||||
#define UDI_MSC_GLOBAL_PRODUCT_VERSION \
|
||||
'1', '.', '0', '0' \endcode
|
||||
* \note The USB MSC interface requires a vendor ID (8 ASCII characters)
|
||||
* and a product version (4 ASCII characters).
|
||||
* - \code #define UDI_MSC_ENABLE_EXT() my_callback_msc_enable()
|
||||
extern bool my_callback_msc_enable(void); \endcode
|
||||
* \note After the device enumeration (detecting and identifying USB devices),
|
||||
* the USB host starts the device configuration. When the USB MSC interface
|
||||
* from the device is accepted by the host, the USB host enables this interface and the
|
||||
* UDI_MSC_ENABLE_EXT() callback function is called and return true.
|
||||
* Thus, when this event is received, the tasks which call
|
||||
* udi_msc_process_trans() must be enabled.
|
||||
* - \code #define UDI_MSC_DISABLE_EXT() my_callback_msc_disable()
|
||||
extern void my_callback_msc_disable(void); \endcode
|
||||
* \note When the USB device is unplugged or is reset by the USB host, the USB
|
||||
* interface is disabled and the UDI_MSC_DISABLE_EXT() callback function
|
||||
* is called. Thus, it is recommended to disable the task which is called udi_msc_process_trans().
|
||||
* -# The MSC is automatically linked with memory control access component
|
||||
* which provides the memories interfaces. However, the memory data transfers
|
||||
* must be done outside USB interrupt routine. This is done in the MSC process
|
||||
* ("udi_msc_process_trans()") called by main loop:
|
||||
* - \code * void task(void) {
|
||||
udi_msc_process_trans();
|
||||
} \endcode
|
||||
* -# The MSC speed depends on task periodicity. To get the best speed
|
||||
* the notification callback "UDI_MSC_NOTIFY_TRANS_EXT" can be used to wakeup
|
||||
* this task (Example, through a mutex):
|
||||
* - \code #define UDI_MSC_NOTIFY_TRANS_EXT() msc_notify_trans()
|
||||
void msc_notify_trans(void) {
|
||||
wakeup_my_task();
|
||||
} \endcode
|
||||
*
|
||||
* \section udi_msc_use_cases Advanced use cases
|
||||
* For more advanced use of the UDI MSC module, see the following use cases:
|
||||
* - \subpage udi_msc_use_case_composite
|
||||
* - \subpage udc_use_case_1
|
||||
* - \subpage udc_use_case_2
|
||||
* - \subpage udc_use_case_3
|
||||
* - \subpage udc_use_case_5
|
||||
* - \subpage udc_use_case_6
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page udi_msc_use_case_composite MSC in a composite device
|
||||
*
|
||||
* A USB Composite Device is a USB Device which uses more than one USB class.
|
||||
* In this use case, the "USB MSC (Composite Device)" module is used to
|
||||
* create a USB composite device. Thus, this USB module can be associated with
|
||||
* another "Composite Device" module, like "USB HID Mouse (Composite Device)".
|
||||
*
|
||||
* Also, you can refer to application note
|
||||
* <A href="http://www.atmel.com/dyn/resources/prod_documents/doc8445.pdf">
|
||||
* AVR4902 ASF - USB Composite Device</A>.
|
||||
*
|
||||
* \section udi_msc_use_case_composite_setup Setup steps
|
||||
* For the setup code of this use case to work, the
|
||||
* \ref udi_msc_basic_use_case "basic use case" must be followed.
|
||||
*
|
||||
* \section udi_msc_use_case_composite_usage Usage steps
|
||||
*
|
||||
* \subsection udi_msc_use_case_composite_usage_code Example code
|
||||
* Content of conf_usb.h:
|
||||
* \code
|
||||
#define USB_DEVICE_EP_CTRL_SIZE 64
|
||||
#define USB_DEVICE_NB_INTERFACE (X+1)
|
||||
#define USB_DEVICE_MAX_EP (X+2)
|
||||
|
||||
#define UDI_MSC_EP_IN (X | USB_EP_DIR_IN)
|
||||
#define UDI_MSC_EP_OUT (Y | USB_EP_DIR_OUT)
|
||||
#define UDI_MSC_IFACE_NUMBER X
|
||||
|
||||
#define UDI_COMPOSITE_DESC_T \
|
||||
udi_msc_desc_t udi_msc; \
|
||||
...
|
||||
#define UDI_COMPOSITE_DESC_FS \
|
||||
.udi_msc = UDI_MSC_DESC, \
|
||||
...
|
||||
#define UDI_COMPOSITE_DESC_HS \
|
||||
.udi_msc = UDI_MSC_DESC, \
|
||||
...
|
||||
#define UDI_COMPOSITE_API \
|
||||
&udi_api_msc, \
|
||||
...
|
||||
\endcode
|
||||
*
|
||||
* \subsection udi_msc_use_case_composite_usage_flow Workflow
|
||||
* -# Ensure that conf_usb.h is available and contains the following parameters
|
||||
* required for a USB composite device configuration:
|
||||
* - \code // Endpoint control size, This must be:
|
||||
// - 8, 16, 32 or 64 for full speed device (8 is recommended to save RAM)
|
||||
// - 64 for a high speed device
|
||||
#define USB_DEVICE_EP_CTRL_SIZE 64
|
||||
// Total Number of interfaces on this USB device.
|
||||
// Add 1 for MSC.
|
||||
#define USB_DEVICE_NB_INTERFACE (X+1)
|
||||
// Total number of endpoints on this USB device.
|
||||
// This must include each endpoint for each interface.
|
||||
// Add 2 for MSC.
|
||||
#define USB_DEVICE_MAX_EP (X+2) \endcode
|
||||
* -# Ensure that conf_usb.h contains the description of
|
||||
* composite device:
|
||||
* - \code // The endpoint numbers chosen by you for the MSC.
|
||||
// The endpoint numbers starting from 1.
|
||||
#define UDI_MSC_EP_IN (X | USB_EP_DIR_IN)
|
||||
#define UDI_MSC_EP_OUT (Y | USB_EP_DIR_OUT)
|
||||
// The interface index of an interface starting from 0
|
||||
#define UDI_MSC_IFACE_NUMBER X \endcode
|
||||
* -# Ensure that conf_usb.h contains the following parameters
|
||||
* required for a USB composite device configuration:
|
||||
* - \code // USB Interfaces descriptor structure
|
||||
#define UDI_COMPOSITE_DESC_T \
|
||||
...
|
||||
udi_msc_desc_t udi_msc; \
|
||||
...
|
||||
// USB Interfaces descriptor value for Full Speed
|
||||
#define UDI_COMPOSITE_DESC_FS \
|
||||
...
|
||||
.udi_msc = UDI_MSC_DESC_FS, \
|
||||
...
|
||||
// USB Interfaces descriptor value for High Speed
|
||||
#define UDI_COMPOSITE_DESC_HS \
|
||||
...
|
||||
.udi_msc = UDI_MSC_DESC_HS, \
|
||||
...
|
||||
// USB Interface APIs
|
||||
#define UDI_COMPOSITE_API \
|
||||
...
|
||||
&udi_api_msc, \
|
||||
... \endcode
|
||||
* - \note The descriptors order given in the four lists above must be the
|
||||
* same as the order defined by all interface indexes. The interface index
|
||||
* orders are defined through UDI_X_IFACE_NUMBER defines.
|
||||
*/
|
||||
|
||||
#endif // _UDI_MSC_H_
|
||||
|
|
@ -1,337 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SCSI Primary Commands
|
||||
*
|
||||
* This file contains definitions of some of the commands found in the
|
||||
* SPC-2 standard.
|
||||
*
|
||||
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#ifndef _SPC_PROTOCOL_H_
|
||||
#define _SPC_PROTOCOL_H_
|
||||
|
||||
|
||||
/**
|
||||
* \ingroup usb_msc_protocol
|
||||
* \defgroup usb_spc_protocol SCSI Primary Commands protocol definitions
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
//! \name SCSI commands defined by SPC-2
|
||||
//@{
|
||||
#define SPC_TEST_UNIT_READY 0x00
|
||||
#define SPC_REQUEST_SENSE 0x03
|
||||
#define SPC_INQUIRY 0x12
|
||||
#define SPC_MODE_SELECT6 0x15
|
||||
#define SPC_MODE_SENSE6 0x1A
|
||||
#define SPC_SEND_DIAGNOSTIC 0x1D
|
||||
#define SPC_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1E
|
||||
#define SPC_MODE_SENSE10 0x5A
|
||||
#define SPC_REPORT_LUNS 0xA0
|
||||
//@}
|
||||
|
||||
//! \brief May be set in byte 0 of the INQUIRY CDB
|
||||
//@{
|
||||
//! Enable Vital Product Data
|
||||
#define SCSI_INQ_REQ_EVPD 0x01
|
||||
//! Command Support Data specified by the PAGE OR OPERATION CODE field
|
||||
#define SCSI_INQ_REQ_CMDT 0x02
|
||||
//@}
|
||||
|
||||
COMPILER_PACK_SET(1)
|
||||
|
||||
/**
|
||||
* \brief SCSI Standard Inquiry data structure
|
||||
*/
|
||||
struct scsi_inquiry_data {
|
||||
uint8_t pq_pdt; //!< Peripheral Qual / Peripheral Dev Type
|
||||
#define SCSI_INQ_PQ_CONNECTED 0x00 //!< Peripheral connected
|
||||
#define SCSI_INQ_PQ_NOT_CONN 0x20 //!< Peripheral not connected
|
||||
#define SCSI_INQ_PQ_NOT_SUPP 0x60 //!< Peripheral not supported
|
||||
#define SCSI_INQ_DT_DIR_ACCESS 0x00 //!< Direct Access (SBC)
|
||||
#define SCSI_INQ_DT_SEQ_ACCESS 0x01 //!< Sequential Access
|
||||
#define SCSI_INQ_DT_PRINTER 0x02 //!< Printer
|
||||
#define SCSI_INQ_DT_PROCESSOR 0x03 //!< Processor device
|
||||
#define SCSI_INQ_DT_WRITE_ONCE 0x04 //!< Write-once device
|
||||
#define SCSI_INQ_DT_CD_DVD 0x05 //!< CD/DVD device
|
||||
#define SCSI_INQ_DT_OPTICAL 0x07 //!< Optical Memory
|
||||
#define SCSI_INQ_DT_MC 0x08 //!< Medium Changer
|
||||
#define SCSI_INQ_DT_ARRAY 0x0c //!< Storage Array Controller
|
||||
#define SCSI_INQ_DT_ENCLOSURE 0x0d //!< Enclosure Services
|
||||
#define SCSI_INQ_DT_RBC 0x0e //!< Simplified Direct Access
|
||||
#define SCSI_INQ_DT_OCRW 0x0f //!< Optical card reader/writer
|
||||
#define SCSI_INQ_DT_BCC 0x10 //!< Bridge Controller Commands
|
||||
#define SCSI_INQ_DT_OSD 0x11 //!< Object-based Storage
|
||||
#define SCSI_INQ_DT_NONE 0x1f //!< No Peripheral
|
||||
uint8_t flags1; //!< Flags (byte 1)
|
||||
#define SCSI_INQ_RMB 0x80 //!< Removable Medium
|
||||
uint8_t version; //!< Version
|
||||
#define SCSI_INQ_VER_NONE 0x00 //!< No standards conformance
|
||||
#define SCSI_INQ_VER_SPC 0x03 //!< SCSI Primary Commands (link to SBC)
|
||||
#define SCSI_INQ_VER_SPC2 0x04 //!< SCSI Primary Commands - 2 (link to SBC-2)
|
||||
#define SCSI_INQ_VER_SPC3 0x05 //!< SCSI Primary Commands - 3 (link to SBC-2)
|
||||
#define SCSI_INQ_VER_SPC4 0x06 //!< SCSI Primary Commands - 4 (link to SBC-3)
|
||||
uint8_t flags3; //!< Flags (byte 3)
|
||||
#define SCSI_INQ_NORMACA 0x20 //!< Normal ACA Supported
|
||||
#define SCSI_INQ_HISUP 0x10 //!< Hierarchal LUN addressing
|
||||
#define SCSI_INQ_RSP_SPC2 0x02 //!< SPC-2 / SPC-3 response format
|
||||
uint8_t addl_len; //!< Additional Length (n-4)
|
||||
#define SCSI_INQ_ADDL_LEN(tot) ((tot)-5) //!< Total length is \a tot
|
||||
uint8_t flags5; //!< Flags (byte 5)
|
||||
#define SCSI_INQ_SCCS 0x80
|
||||
uint8_t flags6; //!< Flags (byte 6)
|
||||
#define SCSI_INQ_BQUE 0x80
|
||||
#define SCSI_INQ_ENCSERV 0x40
|
||||
#define SCSI_INQ_MULTIP 0x10
|
||||
#define SCSI_INQ_MCHGR 0x08
|
||||
#define SCSI_INQ_ADDR16 0x01
|
||||
uint8_t flags7; //!< Flags (byte 7)
|
||||
#define SCSI_INQ_WBUS16 0x20
|
||||
#define SCSI_INQ_SYNC 0x10
|
||||
#define SCSI_INQ_LINKED 0x08
|
||||
#define SCSI_INQ_CMDQUE 0x02
|
||||
uint8_t vendor_id[8]; //!< T10 Vendor Identification
|
||||
uint8_t product_id[16]; //!< Product Identification
|
||||
uint8_t product_rev[4]; //!< Product Revision Level
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief SCSI Standard Request sense data structure
|
||||
*/
|
||||
struct scsi_request_sense_data {
|
||||
/* 1st byte: REQUEST SENSE response flags*/
|
||||
uint8_t valid_reponse_code;
|
||||
#define SCSI_SENSE_VALID 0x80 //!< Indicates the INFORMATION field contains valid information
|
||||
#define SCSI_SENSE_RESPONSE_CODE_MASK 0x7F
|
||||
#define SCSI_SENSE_CURRENT 0x70 //!< Response code 70h (current errors)
|
||||
#define SCSI_SENSE_DEFERRED 0x71
|
||||
|
||||
/* 2nd byte */
|
||||
uint8_t obsolete;
|
||||
|
||||
/* 3rd byte */
|
||||
uint8_t sense_flag_key;
|
||||
#define SCSI_SENSE_FILEMARK 0x80 //!< Indicates that the current command has read a filemark or setmark.
|
||||
#define SCSI_SENSE_EOM 0x40 //!< Indicates that an end-of-medium condition exists.
|
||||
#define SCSI_SENSE_ILI 0x20 //!< Indicates that the requested logical block length did not match the logical block length of the data on the medium.
|
||||
#define SCSI_SENSE_RESERVED 0x10 //!< Reserved
|
||||
#define SCSI_SENSE_KEY(x) (x&0x0F) //!< Sense Key
|
||||
|
||||
/* 4th to 7th bytes - INFORMATION field */
|
||||
uint8_t information[4];
|
||||
|
||||
/* 8th byte - ADDITIONAL SENSE LENGTH field */
|
||||
uint8_t AddSenseLen;
|
||||
#define SCSI_SENSE_ADDL_LEN(total_len) ((total_len) - 8)
|
||||
|
||||
/* 9th to 12th byte - COMMAND-SPECIFIC INFORMATION field */
|
||||
uint8_t CmdSpecINFO[4];
|
||||
|
||||
/* 13th byte - ADDITIONAL SENSE CODE field */
|
||||
uint8_t AddSenseCode;
|
||||
|
||||
/* 14th byte - ADDITIONAL SENSE CODE QUALIFIER field */
|
||||
uint8_t AddSnsCodeQlfr;
|
||||
|
||||
/* 15th byte - FIELD REPLACEABLE UNIT CODE field */
|
||||
uint8_t FldReplUnitCode;
|
||||
|
||||
/* 16th byte */
|
||||
uint8_t SenseKeySpec[3];
|
||||
#define SCSI_SENSE_SKSV 0x80 //!< Indicates the SENSE-KEY SPECIFIC field contains valid information
|
||||
};
|
||||
|
||||
COMPILER_PACK_RESET()
|
||||
|
||||
/* Vital Product Data page codes */
|
||||
enum scsi_vpd_page_code {
|
||||
SCSI_VPD_SUPPORTED_PAGES = 0x00,
|
||||
SCSI_VPD_UNIT_SERIAL_NUMBER = 0x80,
|
||||
SCSI_VPD_DEVICE_IDENTIFICATION = 0x83,
|
||||
};
|
||||
#define SCSI_VPD_HEADER_SIZE 4
|
||||
|
||||
/* Constants associated with the Device Identification VPD page */
|
||||
#define SCSI_VPD_ID_HEADER_SIZE 4
|
||||
|
||||
#define SCSI_VPD_CODE_SET_BINARY 1
|
||||
#define SCSI_VPD_CODE_SET_ASCII 2
|
||||
#define SCSI_VPD_CODE_SET_UTF8 3
|
||||
|
||||
#define SCSI_VPD_ID_TYPE_T10 1
|
||||
|
||||
|
||||
/* Sense keys */
|
||||
enum scsi_sense_key {
|
||||
SCSI_SK_NO_SENSE = 0x0,
|
||||
SCSI_SK_RECOVERED_ERROR = 0x1,
|
||||
SCSI_SK_NOT_READY = 0x2,
|
||||
SCSI_SK_MEDIUM_ERROR = 0x3,
|
||||
SCSI_SK_HARDWARE_ERROR = 0x4,
|
||||
SCSI_SK_ILLEGAL_REQUEST = 0x5,
|
||||
SCSI_SK_UNIT_ATTENTION = 0x6,
|
||||
SCSI_SK_DATA_PROTECT = 0x7,
|
||||
SCSI_SK_BLANK_CHECK = 0x8,
|
||||
SCSI_SK_VENDOR_SPECIFIC = 0x9,
|
||||
SCSI_SK_COPY_ABORTED = 0xa,
|
||||
SCSI_SK_ABORTED_COMMAND = 0xb,
|
||||
SCSI_SK_VOLUME_OVERFLOW = 0xd,
|
||||
SCSI_SK_MISCOMPARE = 0xe,
|
||||
};
|
||||
|
||||
/* Additional Sense Code / Additional Sense Code Qualifier pairs */
|
||||
enum scsi_asc_ascq {
|
||||
SCSI_ASC_NO_ADDITIONAL_SENSE_INFO = 0x0000,
|
||||
SCSI_ASC_LU_NOT_READY_REBUILD_IN_PROGRESS = 0x0405,
|
||||
SCSI_ASC_WRITE_ERROR = 0x0c00,
|
||||
SCSI_ASC_UNRECOVERED_READ_ERROR = 0x1100,
|
||||
SCSI_ASC_INVALID_COMMAND_OPERATION_CODE = 0x2000,
|
||||
SCSI_ASC_INVALID_FIELD_IN_CDB = 0x2400,
|
||||
SCSI_ASC_WRITE_PROTECTED = 0x2700,
|
||||
SCSI_ASC_NOT_READY_TO_READY_CHANGE = 0x2800,
|
||||
SCSI_ASC_MEDIUM_NOT_PRESENT = 0x3A00,
|
||||
SCSI_ASC_INTERNAL_TARGET_FAILURE = 0x4400,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief SPC-2 Mode parameter
|
||||
* This subclause describes the block descriptors and the pages
|
||||
* used with MODE SELECT and MODE SENSE commands
|
||||
* that are applicable to all SCSI devices.
|
||||
*/
|
||||
enum scsi_spc_mode {
|
||||
SCSI_MS_MODE_VENDOR_SPEC = 0x00,
|
||||
SCSI_MS_MODE_INFEXP = 0x1C, // Informational exceptions control page
|
||||
SCSI_MS_MODE_ALL = 0x3f,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief SPC-2 Informational exceptions control page
|
||||
* See chapter 8.3.8
|
||||
*/
|
||||
struct spc_control_page_info_execpt {
|
||||
uint8_t page_code;
|
||||
uint8_t page_length;
|
||||
#define SPC_MP_INFEXP_PAGE_LENGTH 0x0A
|
||||
uint8_t flags1;
|
||||
#define SPC_MP_INFEXP_PERF (1<<7) //!< Initiator Control
|
||||
#define SPC_MP_INFEXP_EBF (1<<5) //!< Caching Analysis Permitted
|
||||
#define SPC_MP_INFEXP_EWASC (1<<4) //!< Discontinuity
|
||||
#define SPC_MP_INFEXP_DEXCPT (1<<3) //!< Size enable
|
||||
#define SPC_MP_INFEXP_TEST (1<<2) //!< Writeback Cache Enable
|
||||
#define SPC_MP_INFEXP_LOGERR (1<<0) //!< Log errors bit
|
||||
uint8_t mrie;
|
||||
#define SPC_MP_INFEXP_MRIE_NO_REPORT 0x00
|
||||
#define SPC_MP_INFEXP_MRIE_ASYNC_EVENT 0x01
|
||||
#define SPC_MP_INFEXP_MRIE_GEN_UNIT 0x02
|
||||
#define SPC_MP_INFEXP_MRIE_COND_RECOV_ERROR 0x03
|
||||
#define SPC_MP_INFEXP_MRIE_UNCOND_RECOV_ERROR 0x04
|
||||
#define SPC_MP_INFEXP_MRIE_NO_SENSE 0x05
|
||||
#define SPC_MP_INFEXP_MRIE_ONLY_REPORT 0x06
|
||||
be32_t interval_timer;
|
||||
be32_t report_count;
|
||||
};
|
||||
|
||||
|
||||
enum scsi_spc_mode_sense_pc {
|
||||
SCSI_MS_SENSE_PC_CURRENT = 0,
|
||||
SCSI_MS_SENSE_PC_CHANGEABLE = 1,
|
||||
SCSI_MS_SENSE_PC_DEFAULT = 2,
|
||||
SCSI_MS_SENSE_PC_SAVED = 3,
|
||||
};
|
||||
|
||||
|
||||
|
||||
static inline bool scsi_mode_sense_dbd_is_set(const uint8_t * cdb)
|
||||
{
|
||||
return (cdb[1] >> 3) & 1;
|
||||
}
|
||||
|
||||
static inline uint8_t scsi_mode_sense_get_page_code(const uint8_t * cdb)
|
||||
{
|
||||
return cdb[2] & 0x3f;
|
||||
}
|
||||
|
||||
static inline uint8_t scsi_mode_sense_get_pc(const uint8_t * cdb)
|
||||
{
|
||||
return cdb[2] >> 6;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief SCSI Mode Parameter Header used by MODE SELECT(6) and MODE
|
||||
* SENSE(6)
|
||||
*/
|
||||
struct scsi_mode_param_header6 {
|
||||
uint8_t mode_data_length; //!< Number of bytes after this
|
||||
uint8_t medium_type; //!< Medium Type
|
||||
uint8_t device_specific_parameter; //!< Defined by command set
|
||||
uint8_t block_descriptor_length; //!< Length of block descriptors
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief SCSI Mode Parameter Header used by MODE SELECT(10) and MODE
|
||||
* SENSE(10)
|
||||
*/
|
||||
struct scsi_mode_param_header10 {
|
||||
be16_t mode_data_length; //!< Number of bytes after this
|
||||
uint8_t medium_type; //!< Medium Type
|
||||
uint8_t device_specific_parameter; //!< Defined by command set
|
||||
uint8_t flags4; //!< LONGLBA in bit 0
|
||||
uint8_t reserved;
|
||||
be16_t block_descriptor_length; //!< Length of block descriptors
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief SCSI Page_0 Mode Page header (SPF not set)
|
||||
*/
|
||||
struct scsi_mode_page_0_header {
|
||||
uint8_t page_code;
|
||||
#define SCSI_PAGE_CODE_PS (1 << 7) //!< Parameters Saveable
|
||||
#define SCSI_PAGE_CODE_SPF (1 << 6) //!< SubPage Format
|
||||
uint8_t page_length; //!< Number of bytes after this
|
||||
#define SCSI_MS_PAGE_LEN(total) ((total) - 2)
|
||||
};
|
||||
|
||||
//@}
|
||||
|
||||
#endif // SPC_PROTOCOL_H_
|
||||
|
|
@ -1,147 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief USB Mass Storage Class (MSC) protocol definitions.
|
||||
*
|
||||
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef _USB_PROTOCOL_MSC_H_
|
||||
#define _USB_PROTOCOL_MSC_H_
|
||||
|
||||
|
||||
/**
|
||||
* \ingroup usb_protocol_group
|
||||
* \defgroup usb_msc_protocol USB Mass Storage Class (MSC) protocol definitions
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \name Possible Class value
|
||||
*/
|
||||
//@{
|
||||
#define MSC_CLASS 0x08
|
||||
//@}
|
||||
|
||||
/**
|
||||
* \name Possible SubClass value
|
||||
* \note In practise, most devices should use
|
||||
* #MSC_SUBCLASS_TRANSPARENT and specify the actual command set in
|
||||
* the standard INQUIRY data block, even if the MSC spec indicates
|
||||
* otherwise. In particular, RBC is not supported by certain major
|
||||
* operating systems like Windows XP.
|
||||
*/
|
||||
//@{
|
||||
#define MSC_SUBCLASS_RBC 0x01 //!< Reduced Block Commands
|
||||
#define MSC_SUBCLASS_ATAPI 0x02 //!< CD/DVD devices
|
||||
#define MSC_SUBCLASS_QIC_157 0x03 //!< Tape devices
|
||||
#define MSC_SUBCLASS_UFI 0x04 //!< Floppy disk drives
|
||||
#define MSC_SUBCLASS_SFF_8070I 0x05 //!< Floppy disk drives
|
||||
#define MSC_SUBCLASS_TRANSPARENT 0x06 //!< Determined by INQUIRY
|
||||
//@}
|
||||
|
||||
/**
|
||||
* \name Possible protocol value
|
||||
* \note Only the BULK protocol should be used in new designs.
|
||||
*/
|
||||
//@{
|
||||
#define MSC_PROTOCOL_CBI 0x00 //!< Command/Bulk/Interrupt
|
||||
#define MSC_PROTOCOL_CBI_ALT 0x01 //!< W/o command completion
|
||||
#define MSC_PROTOCOL_BULK 0x50 //!< Bulk-only
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \brief MSC USB requests (bRequest)
|
||||
*/
|
||||
enum usb_reqid_msc {
|
||||
USB_REQ_MSC_BULK_RESET = 0xFF, //!< Mass Storage Reset
|
||||
USB_REQ_MSC_GET_MAX_LUN = 0xFE, //!< Get Max LUN
|
||||
};
|
||||
|
||||
|
||||
COMPILER_PACK_SET(1)
|
||||
|
||||
/**
|
||||
* \name A Command Block Wrapper (CBW).
|
||||
*/
|
||||
//@{
|
||||
struct usb_msc_cbw {
|
||||
le32_t dCBWSignature; //!< Must contain 'USBC'
|
||||
le32_t dCBWTag; //!< Unique command ID
|
||||
le32_t dCBWDataTransferLength; //!< Number of bytes to transfer
|
||||
uint8_t bmCBWFlags; //!< Direction in bit 7
|
||||
uint8_t bCBWLUN; //!< Logical Unit Number
|
||||
uint8_t bCBWCBLength; //!< Number of valid CDB bytes
|
||||
uint8_t CDB[16]; //!< SCSI Command Descriptor Block
|
||||
};
|
||||
|
||||
#define USB_CBW_SIGNATURE 0x55534243 //!< dCBWSignature value
|
||||
#define USB_CBW_DIRECTION_IN (1<<7) //!< Data from device to host
|
||||
#define USB_CBW_DIRECTION_OUT (0<<7) //!< Data from host to device
|
||||
#define USB_CBW_LUN_MASK 0x0F //!< Valid bits in bCBWLUN
|
||||
#define USB_CBW_LEN_MASK 0x1F //!< Valid bits in bCBWCBLength
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \name A Command Status Wrapper (CSW).
|
||||
*/
|
||||
//@{
|
||||
struct usb_msc_csw {
|
||||
le32_t dCSWSignature; //!< Must contain 'USBS'
|
||||
le32_t dCSWTag; //!< Same as dCBWTag
|
||||
le32_t dCSWDataResidue; //!< Number of bytes not transfered
|
||||
uint8_t bCSWStatus; //!< Status code
|
||||
};
|
||||
|
||||
#define USB_CSW_SIGNATURE 0x55534253 //!< dCSWSignature value
|
||||
#define USB_CSW_STATUS_PASS 0x00 //!< Command Passed
|
||||
#define USB_CSW_STATUS_FAIL 0x01 //!< Command Failed
|
||||
#define USB_CSW_STATUS_PE 0x02 //!< Phase Error
|
||||
//@}
|
||||
|
||||
COMPILER_PACK_RESET()
|
||||
|
||||
//@}
|
||||
|
||||
#endif // _USB_PROTOCOL_MSC_H_
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -1,697 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Interface of the USB Device Controller (UDC)
|
||||
*
|
||||
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef _UDC_H_
|
||||
#define _UDC_H_
|
||||
|
||||
#include "conf_usb.h"
|
||||
#include "usb_protocol.h"
|
||||
#include "udc_desc.h"
|
||||
#include "udd.h"
|
||||
|
||||
#if USB_DEVICE_VENDOR_ID == 0
|
||||
# error USB_DEVICE_VENDOR_ID cannot be equal to 0
|
||||
#endif
|
||||
|
||||
#if USB_DEVICE_PRODUCT_ID == 0
|
||||
# error USB_DEVICE_PRODUCT_ID cannot be equal to 0
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \ingroup usb_device_group
|
||||
* \defgroup udc_group USB Device Controller (UDC)
|
||||
*
|
||||
* The UDC provides a high-level abstraction of the usb device.
|
||||
* You can use these functions to control the main device state
|
||||
* (start/attach/wakeup).
|
||||
*
|
||||
* \section USB_DEVICE_CONF USB Device Custom configuration
|
||||
* The following USB Device configuration must be included in the conf_usb.h
|
||||
* file of the application.
|
||||
*
|
||||
* USB_DEVICE_VENDOR_ID (Word)<br>
|
||||
* Vendor ID provided by USB org (ATMEL 0x03EB).
|
||||
*
|
||||
* USB_DEVICE_PRODUCT_ID (Word)<br>
|
||||
* Product ID (Referenced in usb_atmel.h).
|
||||
*
|
||||
* USB_DEVICE_MAJOR_VERSION (Byte)<br>
|
||||
* Major version of the device
|
||||
*
|
||||
* USB_DEVICE_MINOR_VERSION (Byte)<br>
|
||||
* Minor version of the device
|
||||
*
|
||||
* USB_DEVICE_MANUFACTURE_NAME (string)<br>
|
||||
* ASCII name for the manufacture
|
||||
*
|
||||
* USB_DEVICE_PRODUCT_NAME (string)<br>
|
||||
* ASCII name for the product
|
||||
*
|
||||
* USB_DEVICE_SERIAL_NAME (string)<br>
|
||||
* ASCII name to enable and set a serial number
|
||||
*
|
||||
* USB_DEVICE_POWER (Numeric)<br>
|
||||
* (unit mA) Maximum device power
|
||||
*
|
||||
* USB_DEVICE_ATTR (Byte)<br>
|
||||
* USB attributes available:
|
||||
* - USB_CONFIG_ATTR_SELF_POWERED
|
||||
* - USB_CONFIG_ATTR_REMOTE_WAKEUP
|
||||
* Note: if remote wake enabled then defines remotewakeup callbacks,
|
||||
* see Table 5-2. External API from UDC - Callback
|
||||
*
|
||||
* USB_DEVICE_LOW_SPEED (Only defined)<br>
|
||||
* Force the USB Device to run in low speed
|
||||
*
|
||||
* USB_DEVICE_HS_SUPPORT (Only defined)<br>
|
||||
* Authorize the USB Device to run in high speed
|
||||
*
|
||||
* USB_DEVICE_MAX_EP (Byte)<br>
|
||||
* Define the maximum endpoint number used by the USB Device.<br>
|
||||
* This one is already defined in UDI default configuration.
|
||||
* Ex:
|
||||
* - When endpoint control 0x00, endpoint 0x01 and
|
||||
* endpoint 0x82 is used then USB_DEVICE_MAX_EP=2
|
||||
* - When only endpoint control 0x00 is used then USB_DEVICE_MAX_EP=0
|
||||
* - When endpoint 0x01 and endpoint 0x81 is used then USB_DEVICE_MAX_EP=1<br>
|
||||
* (configuration not possible on USBB interface)
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Authorizes the VBUS event
|
||||
*
|
||||
* \return true, if the VBUS monitoring is possible.
|
||||
*
|
||||
* \section udc_vbus_monitoring VBus monitoring used cases
|
||||
*
|
||||
* The VBus monitoring is used only for USB SELF Power application.
|
||||
*
|
||||
* - By default the USB device is automatically attached when Vbus is high
|
||||
* or when USB is start for devices without internal Vbus monitoring.
|
||||
* conf_usb.h file does not contains define USB_DEVICE_ATTACH_AUTO_DISABLE.
|
||||
* \code //#define USB_DEVICE_ATTACH_AUTO_DISABLE \endcode
|
||||
*
|
||||
* - Add custom VBUS monitoring. conf_usb.h file contains define
|
||||
* USB_DEVICE_ATTACH_AUTO_DISABLE:
|
||||
* \code #define USB_DEVICE_ATTACH_AUTO_DISABLE \endcode
|
||||
* User C file contains:
|
||||
* \code
|
||||
// Authorize VBUS monitoring
|
||||
if (!udc_include_vbus_monitoring()) {
|
||||
// Implement custom VBUS monitoring via GPIO or other
|
||||
}
|
||||
Event_VBUS_present() // VBUS interrupt or GPIO interrupt or other
|
||||
{
|
||||
// Attach USB Device
|
||||
udc_attach();
|
||||
}
|
||||
\endcode
|
||||
*
|
||||
* - Case of battery charging. conf_usb.h file contains define
|
||||
* USB_DEVICE_ATTACH_AUTO_DISABLE:
|
||||
* \code #define USB_DEVICE_ATTACH_AUTO_DISABLE \endcode
|
||||
* User C file contains:
|
||||
* \code
|
||||
Event VBUS present() // VBUS interrupt or GPIO interrupt or ..
|
||||
{
|
||||
// Authorize battery charging, but wait key press to start USB.
|
||||
}
|
||||
Event Key press()
|
||||
{
|
||||
// Stop batteries charging
|
||||
// Start USB
|
||||
udc_attach();
|
||||
}
|
||||
\endcode
|
||||
*/
|
||||
static inline bool udc_include_vbus_monitoring(void)
|
||||
{
|
||||
return udd_include_vbus_monitoring();
|
||||
}
|
||||
|
||||
/*! \brief Start the USB Device stack
|
||||
*/
|
||||
void udc_start(void);
|
||||
|
||||
/*! \brief Stop the USB Device stack
|
||||
*/
|
||||
void udc_stop(void);
|
||||
|
||||
/**
|
||||
* \brief Attach device to the bus when possible
|
||||
*
|
||||
* \warning If a VBus control is included in driver,
|
||||
* then it will attach device when an acceptable Vbus
|
||||
* level from the host is detected.
|
||||
*/
|
||||
static inline void udc_attach(void)
|
||||
{
|
||||
udd_attach();
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* \brief Detaches the device from the bus
|
||||
*
|
||||
* The driver must remove pull-up on USB line D- or D+.
|
||||
*/
|
||||
static inline void udc_detach(void)
|
||||
{
|
||||
udd_detach();
|
||||
}
|
||||
|
||||
|
||||
/*! \brief The USB driver sends a resume signal called \e "Upstream Resume"
|
||||
* This is authorized only when the remote wakeup feature is enabled by host.
|
||||
*/
|
||||
static inline void udc_remotewakeup(void)
|
||||
{
|
||||
udd_send_remotewakeup();
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* \brief Returns a pointer on the current interface descriptor
|
||||
*
|
||||
* \return pointer on the current interface descriptor.
|
||||
*/
|
||||
usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
|
||||
|
||||
//@}
|
||||
|
||||
/**
|
||||
* \ingroup usb_group
|
||||
* \defgroup usb_device_group USB Stack Device
|
||||
*
|
||||
* This module includes USB Stack Device implementation.
|
||||
* The stack is divided in three parts:
|
||||
* - USB Device Controller (UDC) provides USB chapter 9 compliance
|
||||
* - USB Device Interface (UDI) provides USB Class compliance
|
||||
* - USB Device Driver (UDD) provides USB Driver for each Atmel MCU
|
||||
|
||||
* Many USB Device applications can be implemented on Atmel MCU.
|
||||
* Atmel provides many application notes for different applications:
|
||||
* - AVR4900, provides general information about Device Stack
|
||||
* - AVR4901, explains how to create a new class
|
||||
* - AVR4902, explains how to create a composite device
|
||||
* - AVR49xx, all device classes provided in ASF have an application note
|
||||
*
|
||||
* A basic USB knowledge is required to understand the USB Device
|
||||
* Class application notes (HID,MS,CDC,PHDC,...).
|
||||
* Then, to create an USB device with
|
||||
* only one class provided by ASF, refer directly to the application note
|
||||
* corresponding to this USB class. The USB Device application note for
|
||||
* New Class and Composite is dedicated to advanced USB users.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
//! @}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \ingroup udc_group
|
||||
* \defgroup udc_basic_use_case_setup_prereq USB Device Controller (UDC) - Prerequisites
|
||||
* Common prerequisites for all USB devices.
|
||||
*
|
||||
* This module is based on USB device stack full interrupt driven, and supporting
|
||||
* \ref sleepmgr_group sleepmgr. For AVR and SAM3/4 devices the \ref clk_group clock services
|
||||
* is supported. For SAMD devices the \ref asfdoc_sam0_system_clock_group clock driver is supported.
|
||||
*
|
||||
* The following procedure must be executed to setup the project correctly:
|
||||
* - Specify the clock configuration:
|
||||
* - XMEGA USB devices need 48MHz clock input.\n
|
||||
* XMEGA USB devices need CPU frequency higher than 12MHz.\n
|
||||
* You can use either an internal RC48MHz auto calibrated by Start of Frames
|
||||
* or an external OSC.
|
||||
* - UC3 and SAM3/4 devices without USB high speed support need 48MHz clock input.\n
|
||||
* You must use a PLL and an external OSC.
|
||||
* - UC3 and SAM3/4 devices with USB high speed support need 12MHz clock input.\n
|
||||
* You must use an external OSC.
|
||||
* - UC3 devices with USBC hardware need CPU frequency higher than 25MHz.
|
||||
* - SAMD devices without USB high speed support need 48MHz clock input.\n
|
||||
* You should use DFLL with USBCRM.
|
||||
* - In conf_board.h, the define CONF_BOARD_USB_PORT must be added to enable USB lines.
|
||||
* (Not mandatory for all boards)
|
||||
* - Enable interrupts
|
||||
* - Initialize the clock service
|
||||
*
|
||||
* The usage of \ref sleepmgr_group sleepmgr service is optional, but recommended to reduce power
|
||||
* consumption:
|
||||
* - Initialize the sleep manager service
|
||||
* - Activate sleep mode when the application is in IDLE state
|
||||
*
|
||||
* \subpage udc_conf_clock.
|
||||
*
|
||||
* for AVR and SAM3/4 devices, add to the initialization code:
|
||||
* \code
|
||||
sysclk_init();
|
||||
irq_initialize_vectors();
|
||||
cpu_irq_enable();
|
||||
board_init();
|
||||
sleepmgr_init(); // Optional
|
||||
\endcode
|
||||
*
|
||||
* For SAMD devices, add to the initialization code:
|
||||
* \code
|
||||
system_init();
|
||||
irq_initialize_vectors();
|
||||
cpu_irq_enable();
|
||||
sleepmgr_init(); // Optional
|
||||
\endcode
|
||||
* Add to the main IDLE loop:
|
||||
* \code
|
||||
sleepmgr_enter_sleep(); // Optional
|
||||
\endcode
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* \ingroup udc_group
|
||||
* \defgroup udc_basic_use_case_setup_code USB Device Controller (UDC) - Example code
|
||||
* Common example code for all USB devices.
|
||||
*
|
||||
* Content of conf_usb.h:
|
||||
* \code
|
||||
#define USB_DEVICE_VENDOR_ID 0x03EB
|
||||
#define USB_DEVICE_PRODUCT_ID 0xXXXX
|
||||
#define USB_DEVICE_MAJOR_VERSION 1
|
||||
#define USB_DEVICE_MINOR_VERSION 0
|
||||
#define USB_DEVICE_POWER 100
|
||||
#define USB_DEVICE_ATTR USB_CONFIG_ATTR_BUS_POWERED
|
||||
\endcode
|
||||
*
|
||||
* Add to application C-file:
|
||||
* \code
|
||||
void usb_init(void)
|
||||
{
|
||||
udc_start();
|
||||
}
|
||||
\endcode
|
||||
*/
|
||||
|
||||
/**
|
||||
* \ingroup udc_group
|
||||
* \defgroup udc_basic_use_case_setup_flow USB Device Controller (UDC) - Workflow
|
||||
* Common workflow for all USB devices.
|
||||
*
|
||||
* -# Ensure that conf_usb.h is available and contains the following configuration
|
||||
* which is the main USB device configuration:
|
||||
* - \code // Vendor ID provided by USB org (ATMEL 0x03EB)
|
||||
#define USB_DEVICE_VENDOR_ID 0x03EB // Type Word
|
||||
// Product ID (Atmel PID referenced in usb_atmel.h)
|
||||
#define USB_DEVICE_PRODUCT_ID 0xXXXX // Type Word
|
||||
// Major version of the device
|
||||
#define USB_DEVICE_MAJOR_VERSION 1 // Type Byte
|
||||
// Minor version of the device
|
||||
#define USB_DEVICE_MINOR_VERSION 0 // Type Byte
|
||||
// Maximum device power (mA)
|
||||
#define USB_DEVICE_POWER 100 // Type 9-bits
|
||||
// USB attributes to enable features
|
||||
#define USB_DEVICE_ATTR USB_CONFIG_ATTR_BUS_POWERED // Flags \endcode
|
||||
* -# Call the USB device stack start function to enable stack and start USB:
|
||||
* - \code udc_start(); \endcode
|
||||
* \note In case of USB dual roles (Device and Host) managed through USB OTG connector
|
||||
* (USB ID pin), the call of udc_start() must be removed and replaced by uhc_start().
|
||||
* SeRefer to "AVR4950 section 6.1 Dual roles" for further information about dual roles.
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page udc_conf_clock conf_clock.h examples with USB support
|
||||
*
|
||||
* Content of XMEGA conf_clock.h:
|
||||
* \code
|
||||
// Configuration based on internal RC:
|
||||
// USB clock need of 48Mhz
|
||||
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC
|
||||
#define CONFIG_OSC_RC32_CAL 48000000UL
|
||||
#define CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC OSC_ID_USBSOF
|
||||
// CPU clock need of clock > 12MHz to run with USB (Here 24MHz)
|
||||
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC32MHZ
|
||||
#define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_2
|
||||
#define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_1
|
||||
\endcode
|
||||
*
|
||||
* Content of conf_clock.h for AT32UC3A0, AT32UC3A1, AT32UC3B devices (USBB):
|
||||
* \code
|
||||
// Configuration based on 12MHz external OSC:
|
||||
#define CONFIG_PLL1_SOURCE PLL_SRC_OSC0
|
||||
#define CONFIG_PLL1_MUL 8
|
||||
#define CONFIG_PLL1_DIV 2
|
||||
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1
|
||||
#define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div)
|
||||
\endcode
|
||||
*
|
||||
* Content of conf_clock.h for AT32UC3A3, AT32UC3A4 devices (USBB with high speed support):
|
||||
* \code
|
||||
// Configuration based on 12MHz external OSC:
|
||||
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_OSC0
|
||||
#define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div)
|
||||
\endcode
|
||||
*
|
||||
* Content of conf_clock.h for AT32UC3C, ATUCXXD, ATUCXXL3U, ATUCXXL4U devices (USBC):
|
||||
* \code
|
||||
// Configuration based on 12MHz external OSC:
|
||||
#define CONFIG_PLL1_SOURCE PLL_SRC_OSC0
|
||||
#define CONFIG_PLL1_MUL 8
|
||||
#define CONFIG_PLL1_DIV 2
|
||||
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1
|
||||
#define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div)
|
||||
// CPU clock need of clock > 25MHz to run with USBC
|
||||
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLL1
|
||||
\endcode
|
||||
*
|
||||
* Content of conf_clock.h for SAM3S, SAM3SD, SAM4S devices (UPD: USB Peripheral Device):
|
||||
* \code
|
||||
// PLL1 (B) Options (Fpll = (Fclk * PLL_mul) / PLL_div)
|
||||
#define CONFIG_PLL1_SOURCE PLL_SRC_MAINCK_XTAL
|
||||
#define CONFIG_PLL1_MUL 16
|
||||
#define CONFIG_PLL1_DIV 2
|
||||
// USB Clock Source Options (Fusb = FpllX / USB_div)
|
||||
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1
|
||||
#define CONFIG_USBCLK_DIV 2
|
||||
\endcode
|
||||
*
|
||||
* Content of conf_clock.h for SAM3U device (UPDHS: USB Peripheral Device High Speed):
|
||||
* \code
|
||||
// USB Clock Source fixed at UPLL.
|
||||
\endcode
|
||||
*
|
||||
* Content of conf_clock.h for SAM3X, SAM3A devices (UOTGHS: USB OTG High Speed):
|
||||
* \code
|
||||
// USB Clock Source fixed at UPLL.
|
||||
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_UPLL
|
||||
#define CONFIG_USBCLK_DIV 1
|
||||
\endcode
|
||||
*
|
||||
* Content of conf_clocks.h for SAMD devices (USB):
|
||||
* \code
|
||||
// System clock bus configuration
|
||||
# define CONF_CLOCK_FLASH_WAIT_STATES 2
|
||||
|
||||
// USB Clock Source fixed at DFLL.
|
||||
// SYSTEM_CLOCK_SOURCE_DFLL configuration - Digital Frequency Locked Loop
|
||||
# define CONF_CLOCK_DFLL_ENABLE true
|
||||
# define CONF_CLOCK_DFLL_LOOP_MODE SYSTEM_CLOCK_DFLL_LOOP_MODE_USB_RECOVERY
|
||||
# define CONF_CLOCK_DFLL_ON_DEMAND true
|
||||
|
||||
// Set this to true to configure the GCLK when running clocks_init.
|
||||
// If set to false, none of the GCLK generators will be configured in clocks_init().
|
||||
# define CONF_CLOCK_CONFIGURE_GCLK true
|
||||
|
||||
// Configure GCLK generator 0 (Main Clock)
|
||||
# define CONF_CLOCK_GCLK_0_ENABLE true
|
||||
# define CONF_CLOCK_GCLK_0_RUN_IN_STANDBY true
|
||||
# define CONF_CLOCK_GCLK_0_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_DFLL
|
||||
# define CONF_CLOCK_GCLK_0_PRESCALER 1
|
||||
# define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE false
|
||||
\endcode
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page udc_use_case_1 Change USB speed
|
||||
*
|
||||
* In this use case, the USB device is used with different USB speeds.
|
||||
*
|
||||
* \section udc_use_case_1_setup Setup steps
|
||||
*
|
||||
* Prior to implement this use case, be sure to have already
|
||||
* apply the UDI module "basic use case".
|
||||
*
|
||||
* \section udc_use_case_1_usage Usage steps
|
||||
*
|
||||
* \subsection udc_use_case_1_usage_code Example code
|
||||
* Content of conf_usb.h:
|
||||
* \code
|
||||
#if // Low speed
|
||||
#define USB_DEVICE_LOW_SPEED
|
||||
// #define USB_DEVICE_HS_SUPPORT
|
||||
|
||||
#elif // Full speed
|
||||
// #define USB_DEVICE_LOW_SPEED
|
||||
// #define USB_DEVICE_HS_SUPPORT
|
||||
|
||||
#elif // High speed
|
||||
// #define USB_DEVICE_LOW_SPEED
|
||||
#define USB_DEVICE_HS_SUPPORT
|
||||
|
||||
#endif
|
||||
\endcode
|
||||
*
|
||||
* \subsection udc_use_case_1_usage_flow Workflow
|
||||
* -# Ensure that conf_usb.h is available and contains the following parameters
|
||||
* required for a USB device low speed (1.5Mbit/s):
|
||||
* - \code #define USB_DEVICE_LOW_SPEED
|
||||
//#define USB_DEVICE_HS_SUPPORT \endcode
|
||||
* -# Ensure that conf_usb.h contains the following parameters
|
||||
* required for a USB device full speed (12Mbit/s):
|
||||
* - \code //#define USB_DEVICE_LOW_SPEED
|
||||
//#define USB_DEVICE_HS_SUPPORT \endcode
|
||||
* -# Ensure that conf_usb.h contains the following parameters
|
||||
* required for a USB device high speed (480Mbit/s):
|
||||
* - \code //#define USB_DEVICE_LOW_SPEED
|
||||
#define USB_DEVICE_HS_SUPPORT \endcode
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page udc_use_case_2 Use USB strings
|
||||
*
|
||||
* In this use case, the usual USB strings is added in the USB device.
|
||||
*
|
||||
* \section udc_use_case_2_setup Setup steps
|
||||
* Prior to implement this use case, be sure to have already
|
||||
* apply the UDI module "basic use case".
|
||||
*
|
||||
* \section udc_use_case_2_usage Usage steps
|
||||
*
|
||||
* \subsection udc_use_case_2_usage_code Example code
|
||||
* Content of conf_usb.h:
|
||||
* \code
|
||||
#define USB_DEVICE_MANUFACTURE_NAME "Manufacture name"
|
||||
#define USB_DEVICE_PRODUCT_NAME "Product name"
|
||||
#define USB_DEVICE_SERIAL_NAME "12...EF"
|
||||
\endcode
|
||||
*
|
||||
* \subsection udc_use_case_2_usage_flow Workflow
|
||||
* -# Ensure that conf_usb.h is available and contains the following parameters
|
||||
* required to enable different USB strings:
|
||||
* - \code // Static ASCII name for the manufacture
|
||||
#define USB_DEVICE_MANUFACTURE_NAME "Manufacture name" \endcode
|
||||
* - \code // Static ASCII name for the product
|
||||
#define USB_DEVICE_PRODUCT_NAME "Product name" \endcode
|
||||
* - \code // Static ASCII name to enable and set a serial number
|
||||
#define USB_DEVICE_SERIAL_NAME "12...EF" \endcode
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page udc_use_case_3 Use USB remote wakeup feature
|
||||
*
|
||||
* In this use case, the USB remote wakeup feature is enabled.
|
||||
*
|
||||
* \section udc_use_case_3_setup Setup steps
|
||||
* Prior to implement this use case, be sure to have already
|
||||
* apply the UDI module "basic use case".
|
||||
*
|
||||
* \section udc_use_case_3_usage Usage steps
|
||||
*
|
||||
* \subsection udc_use_case_3_usage_code Example code
|
||||
* Content of conf_usb.h:
|
||||
* \code
|
||||
#define USB_DEVICE_ATTR \
|
||||
(USB_CONFIG_ATTR_REMOTE_WAKEUP | USB_CONFIG_ATTR_..._POWERED)
|
||||
#define UDC_REMOTEWAKEUP_ENABLE() my_callback_remotewakeup_enable()
|
||||
extern void my_callback_remotewakeup_enable(void);
|
||||
#define UDC_REMOTEWAKEUP_DISABLE() my_callback_remotewakeup_disable()
|
||||
extern void my_callback_remotewakeup_disable(void);
|
||||
\endcode
|
||||
*
|
||||
* Add to application C-file:
|
||||
* \code
|
||||
void my_callback_remotewakeup_enable(void)
|
||||
{
|
||||
// Enable application wakeup events (e.g. enable GPIO interrupt)
|
||||
}
|
||||
void my_callback_remotewakeup_disable(void)
|
||||
{
|
||||
// Disable application wakeup events (e.g. disable GPIO interrupt)
|
||||
}
|
||||
|
||||
void my_interrupt_event(void)
|
||||
{
|
||||
udc_remotewakeup();
|
||||
}
|
||||
\endcode
|
||||
*
|
||||
* \subsection udc_use_case_3_usage_flow Workflow
|
||||
* -# Ensure that conf_usb.h is available and contains the following parameters
|
||||
* required to enable remote wakeup feature:
|
||||
* - \code // Authorizes the remote wakeup feature
|
||||
#define USB_DEVICE_ATTR (USB_CONFIG_ATTR_REMOTE_WAKEUP | USB_CONFIG_ATTR_..._POWERED) \endcode
|
||||
* - \code // Define callback called when the host enables the remotewakeup feature
|
||||
#define UDC_REMOTEWAKEUP_ENABLE() my_callback_remotewakeup_enable()
|
||||
extern void my_callback_remotewakeup_enable(void); \endcode
|
||||
* - \code // Define callback called when the host disables the remotewakeup feature
|
||||
#define UDC_REMOTEWAKEUP_DISABLE() my_callback_remotewakeup_disable()
|
||||
extern void my_callback_remotewakeup_disable(void); \endcode
|
||||
* -# Send a remote wakeup (USB upstream):
|
||||
* - \code udc_remotewakeup(); \endcode
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page udc_use_case_5 Bus power application recommendations
|
||||
*
|
||||
* In this use case, the USB device BUS power feature is enabled.
|
||||
* This feature requires a correct power consumption management.
|
||||
*
|
||||
* \section udc_use_case_5_setup Setup steps
|
||||
* Prior to implement this use case, be sure to have already
|
||||
* apply the UDI module "basic use case".
|
||||
*
|
||||
* \section udc_use_case_5_usage Usage steps
|
||||
*
|
||||
* \subsection udc_use_case_5_usage_code Example code
|
||||
* Content of conf_usb.h:
|
||||
* \code
|
||||
#define USB_DEVICE_ATTR (USB_CONFIG_ATTR_BUS_POWERED)
|
||||
#define UDC_SUSPEND_EVENT() user_callback_suspend_action()
|
||||
extern void user_callback_suspend_action(void)
|
||||
#define UDC_RESUME_EVENT() user_callback_resume_action()
|
||||
extern void user_callback_resume_action(void)
|
||||
\endcode
|
||||
*
|
||||
* Add to application C-file:
|
||||
* \code
|
||||
void user_callback_suspend_action(void)
|
||||
{
|
||||
// Disable hardware component to reduce power consumption
|
||||
}
|
||||
void user_callback_resume_action(void)
|
||||
{
|
||||
// Re-enable hardware component
|
||||
}
|
||||
\endcode
|
||||
*
|
||||
* \subsection udc_use_case_5_usage_flow Workflow
|
||||
* -# Ensure that conf_usb.h is available and contains the following parameters:
|
||||
* - \code // Authorizes the BUS power feature
|
||||
#define USB_DEVICE_ATTR (USB_CONFIG_ATTR_BUS_POWERED) \endcode
|
||||
* - \code // Define callback called when the host suspend the USB line
|
||||
#define UDC_SUSPEND_EVENT() user_callback_suspend_action()
|
||||
extern void user_callback_suspend_action(void); \endcode
|
||||
* - \code // Define callback called when the host or device resume the USB line
|
||||
#define UDC_RESUME_EVENT() user_callback_resume_action()
|
||||
extern void user_callback_resume_action(void); \endcode
|
||||
* -# Reduce power consumption in suspend mode (max. 2.5mA on Vbus):
|
||||
* - \code void user_callback_suspend_action(void)
|
||||
{
|
||||
turn_off_components();
|
||||
} \endcode
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page udc_use_case_6 USB dynamic serial number
|
||||
*
|
||||
* In this use case, the USB serial strings is dynamic.
|
||||
* For a static serial string refer to \ref udc_use_case_2.
|
||||
*
|
||||
* \section udc_use_case_6_setup Setup steps
|
||||
* Prior to implement this use case, be sure to have already
|
||||
* apply the UDI module "basic use case".
|
||||
*
|
||||
* \section udc_use_case_6_usage Usage steps
|
||||
*
|
||||
* \subsection udc_use_case_6_usage_code Example code
|
||||
* Content of conf_usb.h:
|
||||
* \code
|
||||
#define USB_DEVICE_SERIAL_NAME
|
||||
#define USB_DEVICE_GET_SERIAL_NAME_POINTER serial_number
|
||||
#define USB_DEVICE_GET_SERIAL_NAME_LENGTH 12
|
||||
extern uint8_t serial_number[];
|
||||
\endcode
|
||||
*
|
||||
* Add to application C-file:
|
||||
* \code
|
||||
uint8_t serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH];
|
||||
|
||||
void init_build_usb_serial_number(void)
|
||||
{
|
||||
serial_number[0] = 'A';
|
||||
serial_number[1] = 'B';
|
||||
...
|
||||
serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH-1] = 'C';
|
||||
} \endcode
|
||||
*
|
||||
* \subsection udc_use_case_6_usage_flow Workflow
|
||||
* -# Ensure that conf_usb.h is available and contains the following parameters
|
||||
* required to enable a USB serial number strings dynamically:
|
||||
* - \code #define USB_DEVICE_SERIAL_NAME // Define this empty
|
||||
#define USB_DEVICE_GET_SERIAL_NAME_POINTER serial_number // Give serial array pointer
|
||||
#define USB_DEVICE_GET_SERIAL_NAME_LENGTH 12 // Give size of serial array
|
||||
extern uint8_t serial_number[]; // Declare external serial array \endcode
|
||||
* -# Before start USB stack, initialize the serial array
|
||||
* - \code
|
||||
uint8_t serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH];
|
||||
|
||||
void init_build_usb_serial_number(void)
|
||||
{
|
||||
serial_number[0] = 'A';
|
||||
serial_number[1] = 'B';
|
||||
...
|
||||
serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH-1] = 'C';
|
||||
} \endcode
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#endif // _UDC_H_
|
||||
|
|
@ -1,135 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Common API for USB Device Interface
|
||||
*
|
||||
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef _UDC_DESC_H_
|
||||
#define _UDC_DESC_H_
|
||||
|
||||
#include "conf_usb.h"
|
||||
#include "usb_protocol.h"
|
||||
#include "udi.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \ingroup udc_group
|
||||
* \defgroup udc_desc_group USB Device Descriptor
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Defines the memory's location of USB descriptors
|
||||
*
|
||||
* By default the Descriptor is stored in RAM
|
||||
* (UDC_DESC_STORAGE is defined empty).
|
||||
*
|
||||
* If you have need to free RAM space,
|
||||
* it is possible to put descriptor in flash in following case:
|
||||
* - USB driver authorize flash transfer (USBB on UC3 and USB on Mega)
|
||||
* - USB Device is not high speed (UDC no need to change USB descriptors)
|
||||
*
|
||||
* For UC3 application used "const".
|
||||
*
|
||||
* For Mega application used "code".
|
||||
*/
|
||||
#define UDC_DESC_STORAGE
|
||||
// Descriptor storage in internal RAM
|
||||
#if (defined UDC_DATA_USE_HRAM_SUPPORT)
|
||||
# if defined(__GNUC__)
|
||||
# define UDC_DATA(x) COMPILER_WORD_ALIGNED __attribute__((__section__(".data_hram0")))
|
||||
# define UDC_BSS(x) COMPILER_ALIGNED(x) __attribute__((__section__(".bss_hram0")))
|
||||
# elif defined(__ICCAVR32__)
|
||||
# define UDC_DATA(x) COMPILER_ALIGNED(x) __data32
|
||||
# define UDC_BSS(x) COMPILER_ALIGNED(x) __data32
|
||||
# endif
|
||||
#else
|
||||
# define UDC_DATA(x) COMPILER_ALIGNED(x)
|
||||
# define UDC_BSS(x) COMPILER_ALIGNED(x)
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* \brief Configuration descriptor and UDI link for one USB speed
|
||||
*/
|
||||
typedef struct {
|
||||
//! USB configuration descriptor
|
||||
usb_conf_desc_t UDC_DESC_STORAGE *desc;
|
||||
//! Array of UDI API pointer
|
||||
udi_api_t UDC_DESC_STORAGE *UDC_DESC_STORAGE * udi_apis;
|
||||
} udc_config_speed_t;
|
||||
|
||||
|
||||
/**
|
||||
* \brief All information about the USB Device
|
||||
*/
|
||||
typedef struct {
|
||||
//! USB device descriptor for low or full speed
|
||||
usb_dev_desc_t UDC_DESC_STORAGE *confdev_lsfs;
|
||||
//! USB configuration descriptor and UDI API pointers for low or full speed
|
||||
udc_config_speed_t UDC_DESC_STORAGE *conf_lsfs;
|
||||
#ifdef USB_DEVICE_HS_SUPPORT
|
||||
//! USB device descriptor for high speed
|
||||
usb_dev_desc_t UDC_DESC_STORAGE *confdev_hs;
|
||||
//! USB device qualifier, only use in high speed mode
|
||||
usb_dev_qual_desc_t UDC_DESC_STORAGE *qualifier;
|
||||
//! USB configuration descriptor and UDI API pointers for high speed
|
||||
udc_config_speed_t UDC_DESC_STORAGE *conf_hs;
|
||||
#endif
|
||||
usb_dev_bos_desc_t UDC_DESC_STORAGE *conf_bos;
|
||||
} udc_config_t;
|
||||
|
||||
//! Global variables of USB Device Descriptor and UDI links
|
||||
extern UDC_DESC_STORAGE udc_config_t udc_config;
|
||||
|
||||
//@}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif // _UDC_DESC_H_
|
||||
|
|
@ -1,396 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Common API for USB Device Drivers (UDD)
|
||||
*
|
||||
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef _UDD_H_
|
||||
#define _UDD_H_
|
||||
|
||||
#include "usb_protocol.h"
|
||||
#include "udc_desc.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \ingroup usb_device_group
|
||||
* \defgroup udd_group USB Device Driver (UDD)
|
||||
*
|
||||
* The UDD driver provides a low-level abstraction of the device
|
||||
* controller hardware. Most events coming from the hardware such as
|
||||
* interrupts, which may cause the UDD to call into the UDC and UDI.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
//! \brief Endpoint identifier
|
||||
typedef uint8_t udd_ep_id_t;
|
||||
|
||||
//! \brief Endpoint transfer status
|
||||
//! Returned in parameters of callback register via udd_ep_run routine.
|
||||
typedef enum {
|
||||
UDD_EP_TRANSFER_OK = 0,
|
||||
UDD_EP_TRANSFER_ABORT = 1,
|
||||
} udd_ep_status_t;
|
||||
|
||||
/**
|
||||
* \brief Global variable to give and record information of the setup request management
|
||||
*
|
||||
* This global variable allows to decode and response a setup request.
|
||||
* It can be updated by udc_process_setup() from UDC or *setup() from UDIs.
|
||||
*/
|
||||
typedef struct {
|
||||
//! Data received in USB SETUP packet
|
||||
//! Note: The swap of "req.wValues" from uin16_t to le16_t is done by UDD.
|
||||
usb_setup_req_t req;
|
||||
|
||||
//! Point to buffer to send or fill with data following SETUP packet
|
||||
//! This buffer must be word align for DATA IN phase (use prefix COMPILER_WORD_ALIGNED for buffer)
|
||||
uint8_t *payload;
|
||||
|
||||
//! Size of buffer to send or fill, and content the number of byte transfered
|
||||
uint16_t payload_size;
|
||||
|
||||
//! Callback called after reception of ZLP from setup request
|
||||
void (*callback) (void);
|
||||
|
||||
//! Callback called when the buffer given (.payload) is full or empty.
|
||||
//! This one return false to abort data transfer, or true with a new buffer in .payload.
|
||||
bool(*over_under_run) (void);
|
||||
} udd_ctrl_request_t;
|
||||
extern udd_ctrl_request_t udd_g_ctrlreq;
|
||||
|
||||
//! Return true if the setup request \a udd_g_ctrlreq indicates IN data transfer
|
||||
#define Udd_setup_is_in() \
|
||||
(USB_REQ_DIR_IN == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK))
|
||||
|
||||
//! Return true if the setup request \a udd_g_ctrlreq indicates OUT data transfer
|
||||
#define Udd_setup_is_out() \
|
||||
(USB_REQ_DIR_OUT == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK))
|
||||
|
||||
//! Return the type of the SETUP request \a udd_g_ctrlreq. \see usb_reqtype.
|
||||
#define Udd_setup_type() \
|
||||
(udd_g_ctrlreq.req.bmRequestType & USB_REQ_TYPE_MASK)
|
||||
|
||||
//! Return the recipient of the SETUP request \a udd_g_ctrlreq. \see usb_recipient
|
||||
#define Udd_setup_recipient() \
|
||||
(udd_g_ctrlreq.req.bmRequestType & USB_REQ_RECIP_MASK)
|
||||
|
||||
/**
|
||||
* \brief End of halt callback function type.
|
||||
* Registered by routine udd_ep_wait_stall_clear()
|
||||
* Callback called when endpoint stall is cleared.
|
||||
*/
|
||||
typedef void (*udd_callback_halt_cleared_t) (void);
|
||||
|
||||
/**
|
||||
* \brief End of transfer callback function type.
|
||||
* Registered by routine udd_ep_run()
|
||||
* Callback called by USB interrupt after data transfer or abort (reset,...).
|
||||
*
|
||||
* \param status UDD_EP_TRANSFER_OK, if transfer is complete
|
||||
* \param status UDD_EP_TRANSFER_ABORT, if transfer is aborted
|
||||
* \param n number of data transfered
|
||||
*/
|
||||
typedef void (*udd_callback_trans_t) (udd_ep_status_t status,
|
||||
iram_size_t nb_transfered, udd_ep_id_t ep);
|
||||
|
||||
/**
|
||||
* \brief Authorizes the VBUS event
|
||||
*
|
||||
* \return true, if the VBUS monitoring is possible.
|
||||
*/
|
||||
bool udd_include_vbus_monitoring(void);
|
||||
|
||||
/**
|
||||
* \brief Enables the USB Device mode
|
||||
*/
|
||||
void udd_enable(void);
|
||||
|
||||
/**
|
||||
* \brief Disables the USB Device mode
|
||||
*/
|
||||
void udd_disable(void);
|
||||
|
||||
/**
|
||||
* \brief Attach device to the bus when possible
|
||||
*
|
||||
* \warning If a VBus control is included in driver,
|
||||
* then it will attach device when an acceptable Vbus
|
||||
* level from the host is detected.
|
||||
*/
|
||||
void udd_attach(void);
|
||||
|
||||
/**
|
||||
* \brief Detaches the device from the bus
|
||||
*
|
||||
* The driver must remove pull-up on USB line D- or D+.
|
||||
*/
|
||||
void udd_detach(void);
|
||||
|
||||
/**
|
||||
* \brief Test whether the USB Device Controller is running at high
|
||||
* speed or not.
|
||||
*
|
||||
* \return \c true if the Device is running at high speed mode, otherwise \c false.
|
||||
*/
|
||||
bool udd_is_high_speed(void);
|
||||
|
||||
/**
|
||||
* \brief Changes the USB address of device
|
||||
*
|
||||
* \param address New USB address
|
||||
*/
|
||||
void udd_set_address(uint8_t address);
|
||||
|
||||
/**
|
||||
* \brief Returns the USB address of device
|
||||
*
|
||||
* \return USB address
|
||||
*/
|
||||
uint8_t udd_getaddress(void);
|
||||
|
||||
/**
|
||||
* \brief Returns the current start of frame number
|
||||
*
|
||||
* \return current start of frame number.
|
||||
*/
|
||||
uint16_t udd_get_frame_number(void);
|
||||
|
||||
/**
|
||||
* \brief Returns the current micro start of frame number
|
||||
*
|
||||
* \return current micro start of frame number required in high speed mode.
|
||||
*/
|
||||
uint16_t udd_get_micro_frame_number(void);
|
||||
|
||||
/*! \brief The USB driver sends a resume signal called Upstream Resume
|
||||
*/
|
||||
void udd_send_remotewakeup(void);
|
||||
|
||||
/**
|
||||
* \brief Load setup payload
|
||||
*
|
||||
* \param payload Pointer on payload
|
||||
* \param payload_size Size of payload
|
||||
*/
|
||||
void udd_set_setup_payload( uint8_t *payload, uint16_t payload_size );
|
||||
|
||||
|
||||
/**
|
||||
* \name Endpoint Management
|
||||
*
|
||||
* The following functions allow drivers to create and remove
|
||||
* endpoints, as well as set, clear and query their "halted" and
|
||||
* "wedged" states.
|
||||
*/
|
||||
//@{
|
||||
|
||||
#if (USB_DEVICE_MAX_EP != 0)
|
||||
|
||||
/**
|
||||
* \brief Configures and enables an endpoint
|
||||
*
|
||||
* \param ep Endpoint number including direction (USB_EP_DIR_IN/USB_EP_DIR_OUT).
|
||||
* \param bmAttributes Attributes of endpoint declared in the descriptor.
|
||||
* \param MaxEndpointSize Endpoint maximum size
|
||||
*
|
||||
* \return \c 1 if the endpoint is enabled, otherwise \c 0.
|
||||
*/
|
||||
bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes,
|
||||
uint16_t MaxEndpointSize);
|
||||
|
||||
/**
|
||||
* \brief Disables an endpoint
|
||||
*
|
||||
* \param ep Endpoint number including direction (USB_EP_DIR_IN/USB_EP_DIR_OUT).
|
||||
*/
|
||||
void udd_ep_free(udd_ep_id_t ep);
|
||||
|
||||
/**
|
||||
* \brief Check if the endpoint \a ep is halted.
|
||||
*
|
||||
* \param ep The ID of the endpoint to check.
|
||||
*
|
||||
* \return \c 1 if \a ep is halted, otherwise \c 0.
|
||||
*/
|
||||
bool udd_ep_is_halted(udd_ep_id_t ep);
|
||||
|
||||
/**
|
||||
* \brief Set the halted state of the endpoint \a ep
|
||||
*
|
||||
* After calling this function, any transaction on \a ep will result
|
||||
* in a STALL handshake being sent. Any pending transactions will be
|
||||
* performed first, however.
|
||||
*
|
||||
* \param ep The ID of the endpoint to be halted
|
||||
*
|
||||
* \return \c 1 if \a ep is halted, otherwise \c 0.
|
||||
*/
|
||||
bool udd_ep_set_halt(udd_ep_id_t ep);
|
||||
|
||||
/**
|
||||
* \brief Clear the halted state of the endpoint \a ep
|
||||
*
|
||||
* After calling this function, any transaction on \a ep will
|
||||
* be handled normally, i.e. a STALL handshake will not be sent, and
|
||||
* the data toggle sequence will start at DATA0.
|
||||
*
|
||||
* \param ep The ID of the endpoint to be un-halted
|
||||
*
|
||||
* \return \c 1 if function was successfully done, otherwise \c 0.
|
||||
*/
|
||||
bool udd_ep_clear_halt(udd_ep_id_t ep);
|
||||
|
||||
/**
|
||||
* \brief Registers a callback to call when endpoint halt is cleared
|
||||
*
|
||||
* \param ep The ID of the endpoint to use
|
||||
* \param callback NULL or function to call when endpoint halt is cleared
|
||||
*
|
||||
* \warning if the endpoint is not halted then the \a callback is called immediately.
|
||||
*
|
||||
* \return \c 1 if the register is accepted, otherwise \c 0.
|
||||
*/
|
||||
bool udd_ep_wait_stall_clear(udd_ep_id_t ep,
|
||||
udd_callback_halt_cleared_t callback);
|
||||
|
||||
/**
|
||||
* \brief Allows to receive or send data on an endpoint
|
||||
*
|
||||
* The driver uses a specific DMA USB to transfer data
|
||||
* from internal RAM to endpoint, if this one is available.
|
||||
* When the transfer is finished or aborted (stall, reset, ...), the \a callback is called.
|
||||
* The \a callback returns the transfer status and eventually the number of byte transfered.
|
||||
* Note: The control endpoint is not authorized.
|
||||
*
|
||||
* \param ep The ID of the endpoint to use
|
||||
* \param b_shortpacket Enabled automatic short packet
|
||||
* \param buf Buffer on Internal RAM to send or fill.
|
||||
* It must be align, then use COMPILER_WORD_ALIGNED.
|
||||
* \param buf_size Buffer size to send or fill
|
||||
* \param callback NULL or function to call at the end of transfer
|
||||
*
|
||||
* \warning About \a b_shortpacket, for IN endpoint it means that a short packet
|
||||
* (or a Zero Length Packet) will be sent to the USB line to properly close the usb
|
||||
* transfer at the end of the data transfer.
|
||||
* For Bulk and Interrupt OUT endpoint, it will automatically stop the transfer
|
||||
* at the end of the data transfer (received short packet).
|
||||
*
|
||||
* \return \c 1 if function was successfully done, otherwise \c 0.
|
||||
*/
|
||||
bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket,
|
||||
uint8_t * buf, iram_size_t buf_size,
|
||||
udd_callback_trans_t callback);
|
||||
/**
|
||||
* \brief Aborts transfer on going on endpoint
|
||||
*
|
||||
* If a transfer is on going, then it is stopped and
|
||||
* the callback registered is called to signal the end of transfer.
|
||||
* Note: The control endpoint is not authorized.
|
||||
*
|
||||
* \param ep Endpoint to abort
|
||||
*/
|
||||
void udd_ep_abort(udd_ep_id_t ep);
|
||||
|
||||
#endif
|
||||
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \name High speed test mode management
|
||||
*
|
||||
* The following functions allow the device to jump to a specific test mode required in high speed mode.
|
||||
*/
|
||||
//@{
|
||||
void udd_test_mode_j(void);
|
||||
void udd_test_mode_k(void);
|
||||
void udd_test_mode_se0_nak(void);
|
||||
void udd_test_mode_packet(void);
|
||||
//@}
|
||||
|
||||
|
||||
/**
|
||||
* \name UDC callbacks to provide for UDD
|
||||
*
|
||||
* The following callbacks are used by UDD.
|
||||
*/
|
||||
//@{
|
||||
|
||||
/**
|
||||
* \brief Decodes and manages a setup request
|
||||
*
|
||||
* The driver call it when a SETUP packet is received.
|
||||
* The \c udd_g_ctrlreq contains the data of SETUP packet.
|
||||
* If this callback accepts the setup request then it must
|
||||
* return \c 1 and eventually update \c udd_g_ctrlreq to send or receive data.
|
||||
*
|
||||
* \return \c 1 if the request is accepted, otherwise \c 0.
|
||||
*/
|
||||
extern bool udc_process_setup(void);
|
||||
|
||||
/**
|
||||
* \brief Reset the UDC
|
||||
*
|
||||
* The UDC must reset all configuration.
|
||||
*/
|
||||
extern void udc_reset(void);
|
||||
|
||||
/**
|
||||
* \brief To signal that a SOF is occurred
|
||||
*
|
||||
* The UDC must send the signal to all UDIs enabled
|
||||
*/
|
||||
extern void udc_sof_notify(void);
|
||||
|
||||
//@}
|
||||
|
||||
//@}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif // _UDD_H_
|
||||
|
|
@ -1,133 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Common API for USB Device Interface
|
||||
*
|
||||
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef _UDI_H_
|
||||
#define _UDI_H_
|
||||
|
||||
#include "conf_usb.h"
|
||||
#include "usb_protocol.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \ingroup usb_device_group
|
||||
* \defgroup udi_group USB Device Interface (UDI)
|
||||
* The UDI provides a common API for all classes,
|
||||
* and this is used by UDC for the main control of USB Device interface.
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief UDI API.
|
||||
*
|
||||
* The callbacks within this structure are called only by
|
||||
* USB Device Controller (UDC)
|
||||
*
|
||||
* The udc_get_interface_desc() can be use by UDI to know the interface descriptor
|
||||
* selected by UDC.
|
||||
*/
|
||||
typedef struct {
|
||||
/**
|
||||
* \brief Enable the interface.
|
||||
*
|
||||
* This function is called when the host selects a configuration
|
||||
* to which this interface belongs through a Set Configuration
|
||||
* request, and when the host selects an alternate setting of
|
||||
* this interface through a Set Interface request.
|
||||
*
|
||||
* \return \c 1 if function was successfully done, otherwise \c 0.
|
||||
*/
|
||||
bool(*enable) (void);
|
||||
|
||||
/**
|
||||
* \brief Disable the interface.
|
||||
*
|
||||
* This function is called when this interface is currently
|
||||
* active, and
|
||||
* - the host selects any configuration through a Set
|
||||
* Configuration request, or
|
||||
* - the host issues a USB reset, or
|
||||
* - the device is detached from the host (i.e. Vbus is no
|
||||
* longer present)
|
||||
*/
|
||||
void (*disable) (void);
|
||||
|
||||
/**
|
||||
* \brief Handle a control request directed at an interface.
|
||||
*
|
||||
* This function is called when this interface is currently
|
||||
* active and the host sends a SETUP request
|
||||
* with this interface as the recipient.
|
||||
*
|
||||
* Use udd_g_ctrlreq to decode and response to SETUP request.
|
||||
*
|
||||
* \return \c 1 if this interface supports the SETUP request, otherwise \c 0.
|
||||
*/
|
||||
bool(*setup) (void);
|
||||
|
||||
/**
|
||||
* \brief Returns the current setting of the selected interface.
|
||||
*
|
||||
* This function is called when UDC when know alternate setting of selected interface.
|
||||
*
|
||||
* \return alternate setting of selected interface
|
||||
*/
|
||||
uint8_t(*getsetting) (void);
|
||||
|
||||
/**
|
||||
* \brief To signal that a SOF is occurred
|
||||
*/
|
||||
void(*sof_notify) (void);
|
||||
} udi_api_t;
|
||||
|
||||
//@}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif // _UDI_H_
|
||||
|
|
@ -1,191 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief All USB VIDs and PIDs from Atmel USB applications
|
||||
*
|
||||
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef _USB_ATMEL_H_
|
||||
#define _USB_ATMEL_H_
|
||||
|
||||
/**
|
||||
* \defgroup usb_group USB Stack
|
||||
*
|
||||
* This stack includes the USB Device Stack, USB Host Stack and common
|
||||
* definitions.
|
||||
* @{
|
||||
*/
|
||||
|
||||
//! @}
|
||||
|
||||
/**
|
||||
* \ingroup usb_group
|
||||
* \defgroup usb_atmel_ids_group Atmel USB Identifiers
|
||||
*
|
||||
* This module defines Atmel PID and VIDs constants.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
//! \name Vendor Identifier assigned by USB org to ATMEL
|
||||
#define USB_VID_ATMEL 0x03EB
|
||||
|
||||
|
||||
//! \name Product Identifier assigned by ATMEL to AVR applications
|
||||
//! @{
|
||||
|
||||
//! \name The range from 2000h to 20FFh is reserved to the old PID for C51, MEGA, and others.
|
||||
//! @{
|
||||
#define USB_PID_ATMEL_MEGA_HIDGENERIC 0x2013
|
||||
#define USB_PID_ATMEL_MEGA_HIDKEYBOARD 0x2017
|
||||
#define USB_PID_ATMEL_MEGA_CDC 0x2018
|
||||
#define USB_PID_ATMEL_MEGA_AUDIO_IN 0x2019
|
||||
#define USB_PID_ATMEL_MEGA_MS 0x201A
|
||||
#define USB_PID_ATMEL_MEGA_AUDIO_IN_OUT 0x201B
|
||||
#define USB_PID_ATMEL_MEGA_HIDMOUSE 0x201C
|
||||
#define USB_PID_ATMEL_MEGA_HIDMOUSE_CERTIF_U4 0x201D
|
||||
#define USB_PID_ATMEL_MEGA_CDC_MULTI 0x201E
|
||||
#define USB_PID_ATMEL_MEGA_MS_HIDMS_HID_USBKEY 0x2022
|
||||
#define USB_PID_ATMEL_MEGA_MS_HIDMS_HID_STK525 0x2023
|
||||
#define USB_PID_ATMEL_MEGA_MS_2 0x2029
|
||||
#define USB_PID_ATMEL_MEGA_MS_HIDMS 0x202A
|
||||
#define USB_PID_ATMEL_MEGA_MS_3 0x2032
|
||||
#define USB_PID_ATMEL_MEGA_LIBUSB 0x2050
|
||||
//! @}
|
||||
|
||||
//! \name The range 2100h to 21FFh is reserved to PIDs for AVR Tools.
|
||||
//! @{
|
||||
#define USB_PID_ATMEL_XPLAINED 0x2122
|
||||
#define USB_PID_ATMEL_XMEGA_USB_ZIGBIT_2_4GHZ 0x214A
|
||||
#define USB_PID_ATMEL_XMEGA_USB_ZIGBIT_SUBGHZ 0x214B
|
||||
//! @}
|
||||
|
||||
//! \name The range 2300h to 23FFh is reserved to PIDs for demo from ASF1.7=>
|
||||
//! @{
|
||||
#define USB_PID_ATMEL_UC3_ENUM 0x2300
|
||||
#define USB_PID_ATMEL_UC3_MS 0x2301
|
||||
#define USB_PID_ATMEL_UC3_MS_SDRAM_LOADER 0x2302
|
||||
#define USB_PID_ATMEL_UC3_EVK1100_CTRLPANEL 0x2303
|
||||
#define USB_PID_ATMEL_UC3_HID 0x2304
|
||||
#define USB_PID_ATMEL_UC3_EVK1101_CTRLPANEL_HID 0x2305
|
||||
#define USB_PID_ATMEL_UC3_EVK1101_CTRLPANEL_HID_MS 0x2306
|
||||
#define USB_PID_ATMEL_UC3_CDC 0x2307
|
||||
#define USB_PID_ATMEL_UC3_AUDIO_MICRO 0x2308
|
||||
#define USB_PID_ATMEL_UC3_CDC_DEBUG 0x2310 // Virtual Com (debug interface) on EVK11xx
|
||||
#define USB_PID_ATMEL_UC3_AUDIO_SPEAKER_MICRO 0x2311
|
||||
#define USB_PID_ATMEL_UC3_CDC_MSC 0x2312
|
||||
//! @}
|
||||
|
||||
//! \name The range 2400h to 24FFh is reserved to PIDs for ASF applications
|
||||
//! @{
|
||||
#define USB_PID_ATMEL_ASF_HIDMOUSE 0x2400
|
||||
#define USB_PID_ATMEL_ASF_HIDKEYBOARD 0x2401
|
||||
#define USB_PID_ATMEL_ASF_HIDGENERIC 0x2402
|
||||
#define USB_PID_ATMEL_ASF_MSC 0x2403
|
||||
#define USB_PID_ATMEL_ASF_CDC 0x2404
|
||||
#define USB_PID_ATMEL_ASF_PHDC 0x2405
|
||||
#define USB_PID_ATMEL_ASF_HIDMTOUCH 0x2406
|
||||
#define USB_PID_ATMEL_ASF_MSC_HIDMOUSE 0x2420
|
||||
#define USB_PID_ATMEL_ASF_MSC_HIDS_CDC 0x2421
|
||||
#define USB_PID_ATMEL_ASF_MSC_HIDKEYBOARD 0x2422
|
||||
#define USB_PID_ATMEL_ASF_VENDOR_CLASS 0x2423
|
||||
#define USB_PID_ATMEL_ASF_MSC_CDC 0x2424
|
||||
#define USB_PID_ATMEL_ASF_TWO_CDC 0x2425
|
||||
#define USB_PID_ATMEL_ASF_SEVEN_CDC 0x2426
|
||||
#define USB_PID_ATMEL_ASF_XPLAIN_BC_POWERONLY 0x2430
|
||||
#define USB_PID_ATMEL_ASF_XPLAIN_BC_TERMINAL 0x2431
|
||||
#define USB_PID_ATMEL_ASF_XPLAIN_BC_TOUCH 0x2432
|
||||
#define USB_PID_ATMEL_ASF_AUDIO_SPEAKER 0x2433
|
||||
#define USB_PID_ATMEL_ASF_XMEGA_B1_XPLAINED 0x2434
|
||||
//! @}
|
||||
|
||||
//! \name The range 2F00h to 2FFFh is reserved to official PIDs for AVR bootloaders
|
||||
//! Note, !!!! don't use this range for demos or examples !!!!
|
||||
//! @{
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA64C3 0x2FD6
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA128C3 0x2FD7
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA16C4 0x2FD8
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA32C4 0x2FD9
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA256C3 0x2FDA
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA384C3 0x2FDB
|
||||
#define USB_PID_ATMEL_DFU_ATUCL3_L4 0x2FDC
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA64A4U 0x2FDD
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA128A4U 0x2FDE
|
||||
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA64B3 0x2FDF
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA128B3 0x2FE0
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA64B1 0x2FE1
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA256A3BU 0x2FE2
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA16A4U 0x2FE3
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA32A4U 0x2FE4
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA64A3U 0x2FE5
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA128A3U 0x2FE6
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA192A3U 0x2FE7
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA64A1U 0x2FE8
|
||||
#define USB_PID_ATMEL_DFU_ATUC3D 0x2FE9
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA128B1 0x2FEA
|
||||
#define USB_PID_ATMEL_DFU_AT32UC3C 0x2FEB
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA256A3U 0x2FEC
|
||||
#define USB_PID_ATMEL_DFU_ATXMEGA128A1U 0x2FED
|
||||
#define USB_PID_ATMEL_DFU_ATMEGA8U2 0x2FEE
|
||||
#define USB_PID_ATMEL_DFU_ATMEGA16U2 0x2FEF
|
||||
#define USB_PID_ATMEL_DFU_ATMEGA32U2 0x2FF0
|
||||
#define USB_PID_ATMEL_DFU_AT32UC3A3 0x2FF1
|
||||
#define USB_PID_ATMEL_DFU_ATMEGA32U6 0x2FF2
|
||||
#define USB_PID_ATMEL_DFU_ATMEGA16U4 0x2FF3
|
||||
#define USB_PID_ATMEL_DFU_ATMEGA32U4 0x2FF4
|
||||
#define USB_PID_ATMEL_DFU_AT32AP7200 0x2FF5
|
||||
#define USB_PID_ATMEL_DFU_AT32UC3B 0x2FF6
|
||||
#define USB_PID_ATMEL_DFU_AT90USB82 0x2FF7
|
||||
#define USB_PID_ATMEL_DFU_AT32UC3A 0x2FF8
|
||||
#define USB_PID_ATMEL_DFU_AT90USB64 0x2FF9
|
||||
#define USB_PID_ATMEL_DFU_AT90USB162 0x2FFA
|
||||
#define USB_PID_ATMEL_DFU_AT90USB128 0x2FFB
|
||||
// 2FFCh to 2FFFh used by C51 family products
|
||||
//! @}
|
||||
|
||||
//! @}
|
||||
|
||||
//! @}
|
||||
|
||||
|
||||
#endif // _USB_ATMEL_H_
|
||||
|
|
@ -1,498 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief USB protocol definitions.
|
||||
*
|
||||
* This file contains the USB definitions and data structures provided by the
|
||||
* USB 2.0 specification.
|
||||
*
|
||||
* Copyright (c) 2009-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef _USB_PROTOCOL_H_
|
||||
#define _USB_PROTOCOL_H_
|
||||
|
||||
#include "usb_atmel.h"
|
||||
|
||||
/**
|
||||
* \ingroup usb_group
|
||||
* \defgroup usb_protocol_group USB Protocol Definitions
|
||||
*
|
||||
* This module defines constants and data structures provided by the USB
|
||||
* 2.0 specification.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
//! Value for field bcdUSB
|
||||
#define USB_V2_0 0x0200 //!< USB Specification version 2.00
|
||||
#define USB_V2_1 0x0201 //!< USB Specification version 2.01
|
||||
|
||||
/*! \name Generic definitions (Class, subclass and protocol)
|
||||
*/
|
||||
//! @{
|
||||
#define NO_CLASS 0x00
|
||||
#define CLASS_VENDOR_SPECIFIC 0xFF
|
||||
#define NO_SUBCLASS 0x00
|
||||
#define NO_PROTOCOL 0x00
|
||||
//! @}
|
||||
|
||||
//! \name IAD (Interface Association Descriptor) constants
|
||||
//! @{
|
||||
#define CLASS_IAD 0xEF
|
||||
#define SUB_CLASS_IAD 0x02
|
||||
#define PROTOCOL_IAD 0x01
|
||||
//! @}
|
||||
|
||||
/**
|
||||
* \brief USB request data transfer direction (bmRequestType)
|
||||
*/
|
||||
#define USB_REQ_DIR_OUT (0<<7) //!< Host to device
|
||||
#define USB_REQ_DIR_IN (1<<7) //!< Device to host
|
||||
#define USB_REQ_DIR_MASK (1<<7) //!< Mask
|
||||
|
||||
/**
|
||||
* \brief USB request types (bmRequestType)
|
||||
*/
|
||||
#define USB_REQ_TYPE_STANDARD (0<<5) //!< Standard request
|
||||
#define USB_REQ_TYPE_CLASS (1<<5) //!< Class-specific request
|
||||
#define USB_REQ_TYPE_VENDOR (2<<5) //!< Vendor-specific request
|
||||
#define USB_REQ_TYPE_MASK (3<<5) //!< Mask
|
||||
|
||||
/**
|
||||
* \brief USB recipient codes (bmRequestType)
|
||||
*/
|
||||
#define USB_REQ_RECIP_DEVICE (0<<0) //!< Recipient device
|
||||
#define USB_REQ_RECIP_INTERFACE (1<<0) //!< Recipient interface
|
||||
#define USB_REQ_RECIP_ENDPOINT (2<<0) //!< Recipient endpoint
|
||||
#define USB_REQ_RECIP_OTHER (3<<0) //!< Recipient other
|
||||
#define USB_REQ_RECIP_MASK (0x1F) //!< Mask
|
||||
|
||||
/**
|
||||
* \brief Standard USB requests (bRequest)
|
||||
*/
|
||||
enum usb_reqid {
|
||||
USB_REQ_GET_STATUS = 0,
|
||||
USB_REQ_CLEAR_FEATURE = 1,
|
||||
USB_REQ_SET_FEATURE = 3,
|
||||
USB_REQ_SET_ADDRESS = 5,
|
||||
USB_REQ_GET_DESCRIPTOR = 6,
|
||||
USB_REQ_SET_DESCRIPTOR = 7,
|
||||
USB_REQ_GET_CONFIGURATION = 8,
|
||||
USB_REQ_SET_CONFIGURATION = 9,
|
||||
USB_REQ_GET_INTERFACE = 10,
|
||||
USB_REQ_SET_INTERFACE = 11,
|
||||
USB_REQ_SYNCH_FRAME = 12,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Standard USB device status flags
|
||||
*
|
||||
*/
|
||||
enum usb_device_status {
|
||||
USB_DEV_STATUS_BUS_POWERED = 0,
|
||||
USB_DEV_STATUS_SELF_POWERED = 1,
|
||||
USB_DEV_STATUS_REMOTEWAKEUP = 2
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Standard USB Interface status flags
|
||||
*
|
||||
*/
|
||||
enum usb_interface_status {
|
||||
USB_IFACE_STATUS_RESERVED = 0
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Standard USB endpoint status flags
|
||||
*
|
||||
*/
|
||||
enum usb_endpoint_status {
|
||||
USB_EP_STATUS_HALTED = 1,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Standard USB device feature flags
|
||||
*
|
||||
* \note valid for SetFeature request.
|
||||
*/
|
||||
enum usb_device_feature {
|
||||
USB_DEV_FEATURE_REMOTE_WAKEUP = 1, //!< Remote wakeup enabled
|
||||
USB_DEV_FEATURE_TEST_MODE = 2, //!< USB test mode
|
||||
USB_DEV_FEATURE_OTG_B_HNP_ENABLE = 3,
|
||||
USB_DEV_FEATURE_OTG_A_HNP_SUPPORT = 4,
|
||||
USB_DEV_FEATURE_OTG_A_ALT_HNP_SUPPORT = 5
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Test Mode possible on HS USB device
|
||||
*
|
||||
* \note valid for USB_DEV_FEATURE_TEST_MODE request.
|
||||
*/
|
||||
enum usb_device_hs_test_mode {
|
||||
USB_DEV_TEST_MODE_J = 1,
|
||||
USB_DEV_TEST_MODE_K = 2,
|
||||
USB_DEV_TEST_MODE_SE0_NAK = 3,
|
||||
USB_DEV_TEST_MODE_PACKET = 4,
|
||||
USB_DEV_TEST_MODE_FORCE_ENABLE = 5,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Standard USB endpoint feature/status flags
|
||||
*/
|
||||
enum usb_endpoint_feature {
|
||||
USB_EP_FEATURE_HALT = 0,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Standard USB Test Mode Selectors
|
||||
*/
|
||||
enum usb_test_mode_selector {
|
||||
USB_TEST_J = 0x01,
|
||||
USB_TEST_K = 0x02,
|
||||
USB_TEST_SE0_NAK = 0x03,
|
||||
USB_TEST_PACKET = 0x04,
|
||||
USB_TEST_FORCE_ENABLE = 0x05,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Standard USB descriptor types
|
||||
*/
|
||||
enum usb_descriptor_type {
|
||||
USB_DT_DEVICE = 1,
|
||||
USB_DT_CONFIGURATION = 2,
|
||||
USB_DT_STRING = 3,
|
||||
USB_DT_INTERFACE = 4,
|
||||
USB_DT_ENDPOINT = 5,
|
||||
USB_DT_DEVICE_QUALIFIER = 6,
|
||||
USB_DT_OTHER_SPEED_CONFIGURATION = 7,
|
||||
USB_DT_INTERFACE_POWER = 8,
|
||||
USB_DT_OTG = 9,
|
||||
USB_DT_IAD = 0x0B,
|
||||
USB_DT_BOS = 0x0F,
|
||||
USB_DT_DEVICE_CAPABILITY = 0x10,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief USB Device Capability types
|
||||
*/
|
||||
enum usb_capability_type {
|
||||
USB_DC_USB20_EXTENSION = 0x02,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief USB Device Capability - USB 2.0 Extension
|
||||
* To fill bmAttributes field of usb_capa_ext_desc_t structure.
|
||||
*/
|
||||
enum usb_capability_extension_attr {
|
||||
USB_DC_EXT_LPM = 0x00000002,
|
||||
};
|
||||
|
||||
#define HIRD_50_US 0
|
||||
#define HIRD_125_US 1
|
||||
#define HIRD_200_US 2
|
||||
#define HIRD_275_US 3
|
||||
#define HIRD_350_US 4
|
||||
#define HIRD_425_US 5
|
||||
#define HIRD_500_US 6
|
||||
#define HIRD_575_US 7
|
||||
#define HIRD_650_US 8
|
||||
#define HIRD_725_US 9
|
||||
#define HIRD_800_US 10
|
||||
#define HIRD_875_US 11
|
||||
#define HIRD_950_US 12
|
||||
#define HIRD_1025_US 13
|
||||
#define HIRD_1100_US 14
|
||||
#define HIRD_1175_US 15
|
||||
|
||||
/** Fields definition from a LPM TOKEN */
|
||||
#define USB_LPM_ATTRIBUT_BLINKSTATE_MASK (0xF << 0)
|
||||
#define USB_LPM_ATTRIBUT_FIRD_MASK (0xF << 4)
|
||||
#define USB_LPM_ATTRIBUT_REMOTEWAKE_MASK (1 << 8)
|
||||
#define USB_LPM_ATTRIBUT_BLINKSTATE(value) ((value & 0xF) << 0)
|
||||
#define USB_LPM_ATTRIBUT_FIRD(value) ((value & 0xF) << 4)
|
||||
#define USB_LPM_ATTRIBUT_REMOTEWAKE(value) ((value & 1) << 8)
|
||||
#define USB_LPM_ATTRIBUT_BLINKSTATE_L1 USB_LPM_ATTRIBUT_BLINKSTATE(1)
|
||||
|
||||
/**
|
||||
* \brief Standard USB endpoint transfer types
|
||||
*/
|
||||
enum usb_ep_type {
|
||||
USB_EP_TYPE_CONTROL = 0x00,
|
||||
USB_EP_TYPE_ISOCHRONOUS = 0x01,
|
||||
USB_EP_TYPE_BULK = 0x02,
|
||||
USB_EP_TYPE_INTERRUPT = 0x03,
|
||||
USB_EP_TYPE_MASK = 0x03,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Standard USB language IDs for string descriptors
|
||||
*/
|
||||
enum usb_langid {
|
||||
USB_LANGID_EN_US = 0x0409, //!< English (United States)
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Mask selecting the index part of an endpoint address
|
||||
*/
|
||||
#define USB_EP_ADDR_MASK 0x0f
|
||||
|
||||
//! \brief USB address identifier
|
||||
typedef uint8_t usb_add_t;
|
||||
|
||||
/**
|
||||
* \brief Endpoint transfer direction is IN
|
||||
*/
|
||||
#define USB_EP_DIR_IN 0x80
|
||||
|
||||
/**
|
||||
* \brief Endpoint transfer direction is OUT
|
||||
*/
|
||||
#define USB_EP_DIR_OUT 0x00
|
||||
|
||||
//! \brief Endpoint identifier
|
||||
typedef uint8_t usb_ep_t;
|
||||
|
||||
/**
|
||||
* \brief Maximum length in bytes of a USB descriptor
|
||||
*
|
||||
* The maximum length of a USB descriptor is limited by the 8-bit
|
||||
* bLength field.
|
||||
*/
|
||||
#define USB_MAX_DESC_LEN 255
|
||||
|
||||
/*
|
||||
* 2-byte alignment requested for all USB structures.
|
||||
*/
|
||||
COMPILER_PACK_SET(1)
|
||||
|
||||
/**
|
||||
* \brief A USB Device SETUP request
|
||||
*
|
||||
* The data payload of SETUP packets always follows this structure.
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bmRequestType;
|
||||
uint8_t bRequest;
|
||||
le16_t wValue;
|
||||
le16_t wIndex;
|
||||
le16_t wLength;
|
||||
} usb_setup_req_t;
|
||||
|
||||
/**
|
||||
* \brief Standard USB device descriptor structure
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
le16_t bcdUSB;
|
||||
uint8_t bDeviceClass;
|
||||
uint8_t bDeviceSubClass;
|
||||
uint8_t bDeviceProtocol;
|
||||
uint8_t bMaxPacketSize0;
|
||||
le16_t idVendor;
|
||||
le16_t idProduct;
|
||||
le16_t bcdDevice;
|
||||
uint8_t iManufacturer;
|
||||
uint8_t iProduct;
|
||||
uint8_t iSerialNumber;
|
||||
uint8_t bNumConfigurations;
|
||||
} usb_dev_desc_t;
|
||||
|
||||
/**
|
||||
* \brief Standard USB device qualifier descriptor structure
|
||||
*
|
||||
* This descriptor contains information about the device when running at
|
||||
* the "other" speed (i.e. if the device is currently operating at high
|
||||
* speed, this descriptor can be used to determine what would change if
|
||||
* the device was operating at full speed.)
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
le16_t bcdUSB;
|
||||
uint8_t bDeviceClass;
|
||||
uint8_t bDeviceSubClass;
|
||||
uint8_t bDeviceProtocol;
|
||||
uint8_t bMaxPacketSize0;
|
||||
uint8_t bNumConfigurations;
|
||||
uint8_t bReserved;
|
||||
} usb_dev_qual_desc_t;
|
||||
|
||||
/**
|
||||
* \brief USB Device BOS descriptor structure
|
||||
*
|
||||
* The BOS descriptor (Binary device Object Store) defines a root
|
||||
* descriptor that is similar to the configuration descriptor, and is
|
||||
* the base descriptor for accessing a family of related descriptors.
|
||||
* A host can read a BOS descriptor and learn from the wTotalLength field
|
||||
* the entire size of the device-level descriptor set, or it can read in
|
||||
* the entire BOS descriptor set of device capabilities.
|
||||
* The host accesses this descriptor using the GetDescriptor() request.
|
||||
* The descriptor type in the GetDescriptor() request is set to BOS.
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
le16_t wTotalLength;
|
||||
uint8_t bNumDeviceCaps;
|
||||
} usb_dev_bos_desc_t;
|
||||
|
||||
|
||||
/**
|
||||
* \brief USB Device Capabilities - USB 2.0 Extension Descriptor structure
|
||||
*
|
||||
* Defines the set of USB 1.1-specific device level capabilities.
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bDevCapabilityType;
|
||||
le32_t bmAttributes;
|
||||
} usb_dev_capa_ext_desc_t;
|
||||
|
||||
/**
|
||||
* \brief USB Device LPM Descriptor structure
|
||||
*
|
||||
* The BOS descriptor and capabilities descriptors for LPM.
|
||||
*/
|
||||
typedef struct {
|
||||
usb_dev_bos_desc_t bos;
|
||||
usb_dev_capa_ext_desc_t capa_ext;
|
||||
} usb_dev_lpm_desc_t;
|
||||
|
||||
/**
|
||||
* \brief Standard USB Interface Association Descriptor structure
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bLength; //!< size of this descriptor in bytes
|
||||
uint8_t bDescriptorType; //!< INTERFACE descriptor type
|
||||
uint8_t bFirstInterface; //!< Number of interface
|
||||
uint8_t bInterfaceCount; //!< value to select alternate setting
|
||||
uint8_t bFunctionClass; //!< Class code assigned by the USB
|
||||
uint8_t bFunctionSubClass;//!< Sub-class code assigned by the USB
|
||||
uint8_t bFunctionProtocol;//!< Protocol code assigned by the USB
|
||||
uint8_t iFunction; //!< Index of string descriptor
|
||||
} usb_association_desc_t;
|
||||
|
||||
|
||||
/**
|
||||
* \brief Standard USB configuration descriptor structure
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
le16_t wTotalLength;
|
||||
uint8_t bNumInterfaces;
|
||||
uint8_t bConfigurationValue;
|
||||
uint8_t iConfiguration;
|
||||
uint8_t bmAttributes;
|
||||
uint8_t bMaxPower;
|
||||
} usb_conf_desc_t;
|
||||
|
||||
|
||||
#define USB_CONFIG_ATTR_MUST_SET (1 << 7) //!< Must always be set
|
||||
#define USB_CONFIG_ATTR_BUS_POWERED (0 << 6) //!< Bus-powered
|
||||
#define USB_CONFIG_ATTR_SELF_POWERED (1 << 6) //!< Self-powered
|
||||
#define USB_CONFIG_ATTR_REMOTE_WAKEUP (1 << 5) //!< remote wakeup supported
|
||||
|
||||
#define USB_CONFIG_MAX_POWER(ma) (((ma) + 1) / 2) //!< Max power in mA
|
||||
|
||||
/**
|
||||
* \brief Standard USB association descriptor structure
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bLength; //!< Size of this descriptor in bytes
|
||||
uint8_t bDescriptorType; //!< Interface descriptor type
|
||||
uint8_t bFirstInterface; //!< Number of interface
|
||||
uint8_t bInterfaceCount; //!< value to select alternate setting
|
||||
uint8_t bFunctionClass; //!< Class code assigned by the USB
|
||||
uint8_t bFunctionSubClass; //!< Sub-class code assigned by the USB
|
||||
uint8_t bFunctionProtocol; //!< Protocol code assigned by the USB
|
||||
uint8_t iFunction; //!< Index of string descriptor
|
||||
} usb_iad_desc_t;
|
||||
|
||||
/**
|
||||
* \brief Standard USB interface descriptor structure
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bInterfaceNumber;
|
||||
uint8_t bAlternateSetting;
|
||||
uint8_t bNumEndpoints;
|
||||
uint8_t bInterfaceClass;
|
||||
uint8_t bInterfaceSubClass;
|
||||
uint8_t bInterfaceProtocol;
|
||||
uint8_t iInterface;
|
||||
} usb_iface_desc_t;
|
||||
|
||||
/**
|
||||
* \brief Standard USB endpoint descriptor structure
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
uint8_t bEndpointAddress;
|
||||
uint8_t bmAttributes;
|
||||
le16_t wMaxPacketSize;
|
||||
uint8_t bInterval;
|
||||
} usb_ep_desc_t;
|
||||
|
||||
|
||||
/**
|
||||
* \brief A standard USB string descriptor structure
|
||||
*/
|
||||
typedef struct {
|
||||
uint8_t bLength;
|
||||
uint8_t bDescriptorType;
|
||||
} usb_str_desc_t;
|
||||
|
||||
typedef struct {
|
||||
usb_str_desc_t desc;
|
||||
le16_t string[1];
|
||||
} usb_str_lgid_desc_t;
|
||||
|
||||
COMPILER_PACK_RESET()
|
||||
|
||||
//! @}
|
||||
|
||||
#endif /* _USB_PROTOCOL_H_ */
|
||||
|
|
@ -1,142 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Global interrupt management for 8- and 32-bit AVR
|
||||
*
|
||||
* Copyright (c) 2010-2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#ifndef UTILS_INTERRUPT_H
|
||||
#define UTILS_INTERRUPT_H
|
||||
|
||||
#include <parts.h>
|
||||
|
||||
#if XMEGA || MEGA
|
||||
# include "interrupt/interrupt_avr8.h"
|
||||
#elif UC3
|
||||
# include "interrupt/interrupt_avr32.h"
|
||||
#elif SAM || SAMB
|
||||
# include "interrupt/interrupt_sam_nvic.h"
|
||||
#else
|
||||
# error Unsupported device.
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \defgroup interrupt_group Global interrupt management
|
||||
*
|
||||
* This is a driver for global enabling and disabling of interrupts.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(__DOXYGEN__)
|
||||
/**
|
||||
* \def CONFIG_INTERRUPT_FORCE_INTC
|
||||
* \brief Force usage of the ASF INTC driver
|
||||
*
|
||||
* Predefine this symbol when preprocessing to force the use of the ASF INTC driver.
|
||||
* This is useful to ensure compatibility across compilers and shall be used only when required
|
||||
* by the application needs.
|
||||
*/
|
||||
# define CONFIG_INTERRUPT_FORCE_INTC
|
||||
#endif
|
||||
|
||||
//! \name Global interrupt flags
|
||||
//@{
|
||||
/**
|
||||
* \typedef irqflags_t
|
||||
* \brief Type used for holding state of interrupt flag
|
||||
*/
|
||||
|
||||
/**
|
||||
* \def cpu_irq_enable
|
||||
* \brief Enable interrupts globally
|
||||
*/
|
||||
|
||||
/**
|
||||
* \def cpu_irq_disable
|
||||
* \brief Disable interrupts globally
|
||||
*/
|
||||
|
||||
/**
|
||||
* \fn irqflags_t cpu_irq_save(void)
|
||||
* \brief Get and clear the global interrupt flags
|
||||
*
|
||||
* Use in conjunction with \ref cpu_irq_restore.
|
||||
*
|
||||
* \return Current state of interrupt flags.
|
||||
*
|
||||
* \note This function leaves interrupts disabled.
|
||||
*/
|
||||
|
||||
/**
|
||||
* \fn void cpu_irq_restore(irqflags_t flags)
|
||||
* \brief Restore global interrupt flags
|
||||
*
|
||||
* Use in conjunction with \ref cpu_irq_save.
|
||||
*
|
||||
* \param flags State to set interrupt flag to.
|
||||
*/
|
||||
|
||||
/**
|
||||
* \fn bool cpu_irq_is_enabled_flags(irqflags_t flags)
|
||||
* \brief Check if interrupts are globally enabled in supplied flags
|
||||
*
|
||||
* \param flags Currents state of interrupt flags.
|
||||
*
|
||||
* \return True if interrupts are enabled.
|
||||
*/
|
||||
|
||||
/**
|
||||
* \def cpu_irq_is_enabled
|
||||
* \brief Check if interrupts are globally enabled
|
||||
*
|
||||
* \return True if interrupts are enabled.
|
||||
*/
|
||||
//@}
|
||||
|
||||
//! @}
|
||||
|
||||
/**
|
||||
* \ingroup interrupt_group
|
||||
* \defgroup interrupt_deprecated_group Deprecated interrupt definitions
|
||||
*/
|
||||
|
||||
#endif /* UTILS_INTERRUPT_H */
|
||||
|
|
@ -1,86 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Global interrupt management for SAM D20, SAM3 and SAM4 (NVIC based)
|
||||
*
|
||||
* Copyright (c) 2012-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#include "interrupt_sam_nvic.h"
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
/* Deprecated - global flag to determine the global interrupt state. Required by
|
||||
* QTouch library, however new applications should use cpu_irq_is_enabled()
|
||||
* which probes the true global interrupt state from the CPU special registers.
|
||||
*/
|
||||
volatile bool g_interrupt_enabled = true;
|
||||
#endif
|
||||
|
||||
void cpu_irq_enter_critical(void)
|
||||
{
|
||||
if (cpu_irq_critical_section_counter == 0) {
|
||||
if (cpu_irq_is_enabled()) {
|
||||
cpu_irq_disable();
|
||||
cpu_irq_prev_interrupt_state = true;
|
||||
} else {
|
||||
/* Make sure the to save the prev state as false */
|
||||
cpu_irq_prev_interrupt_state = false;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
cpu_irq_critical_section_counter++;
|
||||
}
|
||||
|
||||
void cpu_irq_leave_critical(void)
|
||||
{
|
||||
/* Check if the user is trying to leave a critical section when not in a critical section */
|
||||
Assert(cpu_irq_critical_section_counter > 0);
|
||||
|
||||
cpu_irq_critical_section_counter--;
|
||||
|
||||
/* Only enable global interrupts when the counter reaches 0 and the state of the global interrupt flag
|
||||
was enabled when entering critical state */
|
||||
if ((cpu_irq_critical_section_counter == 0) && (cpu_irq_prev_interrupt_state)) {
|
||||
cpu_irq_enable();
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1,189 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Global interrupt management for SAM D20, SAM3 and SAM4 (NVIC based)
|
||||
*
|
||||
* Copyright (c) 2012-2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef UTILS_INTERRUPT_INTERRUPT_H
|
||||
#define UTILS_INTERRUPT_INTERRUPT_H
|
||||
|
||||
#include <compiler.h>
|
||||
#include <parts.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \weakgroup interrupt_group
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \name Interrupt Service Routine definition
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Define service routine
|
||||
*
|
||||
* \note For NVIC devices the interrupt service routines are predefined to
|
||||
* add to vector table in binary generation, so there is no service
|
||||
* register at run time. The routine collections are in exceptions.h.
|
||||
*
|
||||
* Usage:
|
||||
* \code
|
||||
ISR(foo_irq_handler)
|
||||
{
|
||||
// Function definition
|
||||
...
|
||||
}
|
||||
\endcode
|
||||
*
|
||||
* \param func Name for the function.
|
||||
*/
|
||||
# define ISR(func) \
|
||||
void func (void)
|
||||
|
||||
/**
|
||||
* \brief Initialize interrupt vectors
|
||||
*
|
||||
* For NVIC the interrupt vectors are put in vector table. So nothing
|
||||
* to do to initialize them, except defined the vector function with
|
||||
* right name.
|
||||
*
|
||||
* This must be called prior to \ref irq_register_handler.
|
||||
*/
|
||||
# define irq_initialize_vectors() \
|
||||
do { \
|
||||
} while(0)
|
||||
|
||||
/**
|
||||
* \brief Register handler for interrupt
|
||||
*
|
||||
* For NVIC the interrupt vectors are put in vector table. So nothing
|
||||
* to do to register them, except defined the vector function with
|
||||
* right name.
|
||||
*
|
||||
* Usage:
|
||||
* \code
|
||||
irq_initialize_vectors();
|
||||
irq_register_handler(foo_irq_handler);
|
||||
\endcode
|
||||
*
|
||||
* \note The function \a func must be defined with the \ref ISR macro.
|
||||
* \note The functions prototypes can be found in the device exception header
|
||||
* files (exceptions.h).
|
||||
*/
|
||||
# define irq_register_handler(int_num, int_prio) \
|
||||
NVIC_ClearPendingIRQ( (IRQn_Type)int_num); \
|
||||
NVIC_SetPriority( (IRQn_Type)int_num, int_prio); \
|
||||
NVIC_EnableIRQ( (IRQn_Type)int_num); \
|
||||
|
||||
//@}
|
||||
|
||||
# define cpu_irq_enable() \
|
||||
do { \
|
||||
g_interrupt_enabled = true; \
|
||||
__DMB(); \
|
||||
__enable_irq(); \
|
||||
} while (0)
|
||||
# define cpu_irq_disable() \
|
||||
do { \
|
||||
__disable_irq(); \
|
||||
__DMB(); \
|
||||
g_interrupt_enabled = false; \
|
||||
} while (0)
|
||||
|
||||
typedef uint32_t irqflags_t;
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
extern volatile bool g_interrupt_enabled;
|
||||
#endif
|
||||
|
||||
#define cpu_irq_is_enabled() (__get_PRIMASK() == 0)
|
||||
|
||||
static volatile uint32_t cpu_irq_critical_section_counter;
|
||||
static volatile bool cpu_irq_prev_interrupt_state;
|
||||
|
||||
static inline irqflags_t cpu_irq_save(void)
|
||||
{
|
||||
volatile irqflags_t flags = cpu_irq_is_enabled();
|
||||
cpu_irq_disable();
|
||||
return flags;
|
||||
}
|
||||
|
||||
static inline bool cpu_irq_is_enabled_flags(irqflags_t flags)
|
||||
{
|
||||
return (flags);
|
||||
}
|
||||
|
||||
static inline void cpu_irq_restore(irqflags_t flags)
|
||||
{
|
||||
if (cpu_irq_is_enabled_flags(flags))
|
||||
cpu_irq_enable();
|
||||
}
|
||||
|
||||
void cpu_irq_enter_critical(void);
|
||||
void cpu_irq_leave_critical(void);
|
||||
|
||||
/**
|
||||
* \weakgroup interrupt_deprecated_group
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define Enable_global_interrupt() cpu_irq_enable()
|
||||
#define Disable_global_interrupt() cpu_irq_disable()
|
||||
#define Is_global_interrupt_enabled() cpu_irq_is_enabled()
|
||||
|
||||
//@}
|
||||
|
||||
//@}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* UTILS_INTERRUPT_INTERRUPT_H */
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -1,90 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM D21 Xplained Pro board initialization
|
||||
*
|
||||
* Copyright (c) 2013-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#include <compiler.h>
|
||||
#include <board.h>
|
||||
#include <conf_board.h>
|
||||
#include <port.h>
|
||||
|
||||
#if defined(__GNUC__)
|
||||
void board_init(void) WEAK __attribute__((alias("system_board_init")));
|
||||
#elif defined(__ICCARM__)
|
||||
void board_init(void);
|
||||
# pragma weak board_init=system_board_init
|
||||
#endif
|
||||
|
||||
void system_board_init(void)
|
||||
{
|
||||
struct port_config pin_conf;
|
||||
port_get_config_defaults(&pin_conf);
|
||||
|
||||
/* Configure LEDs as outputs, turn them off */
|
||||
pin_conf.direction = PORT_PIN_DIR_OUTPUT;
|
||||
port_pin_set_config(LED_0_PIN, &pin_conf);
|
||||
port_pin_set_output_level(LED_0_PIN, LED_0_INACTIVE);
|
||||
|
||||
/* Set buttons as inputs */
|
||||
pin_conf.direction = PORT_PIN_DIR_INPUT;
|
||||
pin_conf.input_pull = PORT_PIN_PULL_UP;
|
||||
port_pin_set_config(BUTTON_0_PIN, &pin_conf);
|
||||
|
||||
#ifdef CONF_BOARD_AT86RFX
|
||||
port_get_config_defaults(&pin_conf);
|
||||
pin_conf.direction = PORT_PIN_DIR_OUTPUT;
|
||||
port_pin_set_config(AT86RFX_SPI_SCK, &pin_conf);
|
||||
port_pin_set_config(AT86RFX_SPI_MOSI, &pin_conf);
|
||||
port_pin_set_config(AT86RFX_SPI_CS, &pin_conf);
|
||||
port_pin_set_config(AT86RFX_RST_PIN, &pin_conf);
|
||||
port_pin_set_config(AT86RFX_SLP_PIN, &pin_conf);
|
||||
port_pin_set_output_level(AT86RFX_SPI_SCK, true);
|
||||
port_pin_set_output_level(AT86RFX_SPI_MOSI, true);
|
||||
port_pin_set_output_level(AT86RFX_SPI_CS, true);
|
||||
port_pin_set_output_level(AT86RFX_RST_PIN, true);
|
||||
port_pin_set_output_level(AT86RFX_SLP_PIN, true);
|
||||
pin_conf.direction = PORT_PIN_DIR_INPUT;
|
||||
port_pin_set_config(AT86RFX_SPI_MISO, &pin_conf);
|
||||
#endif
|
||||
}
|
||||
|
|
@ -1,709 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM D21 Xplained Pro board definition
|
||||
*
|
||||
* Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef SAMD21_XPLAINED_PRO_H_INCLUDED
|
||||
#define SAMD21_XPLAINED_PRO_H_INCLUDED
|
||||
|
||||
#include <conf_board.h>
|
||||
#include <compiler.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \ingroup group_common_boards
|
||||
* \defgroup samd21_xplained_pro_group SAM D21 Xplained Pro board
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
void system_board_init(void);
|
||||
|
||||
/**
|
||||
* \defgroup samd21_xplained_pro_features_group Features
|
||||
*
|
||||
* Symbols that describe features and capabilities of the board.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** Name string macro */
|
||||
#define BOARD_NAME "SAMD21_XPLAINED_PRO"
|
||||
|
||||
/** \name Resonator definitions
|
||||
* @{ */
|
||||
#define BOARD_FREQ_SLCK_XTAL (32768U)
|
||||
#define BOARD_FREQ_SLCK_BYPASS (32768U)
|
||||
#define BOARD_FREQ_MAINCK_XTAL 0 /* Not Mounted */
|
||||
#define BOARD_FREQ_MAINCK_BYPASS 0 /* Not Mounted */
|
||||
#define BOARD_MCK CHIP_FREQ_CPU_MAX
|
||||
#define BOARD_OSC_STARTUP_US 15625
|
||||
/** @} */
|
||||
|
||||
/** \name LED0 definitions
|
||||
* @{ */
|
||||
#define LED0_PIN PIN_PB30
|
||||
#define LED0_ACTIVE false
|
||||
#define LED0_INACTIVE !LED0_ACTIVE
|
||||
/** @} */
|
||||
|
||||
/** \name SW0 definitions
|
||||
* @{ */
|
||||
#define SW0_PIN PIN_PA15
|
||||
#define SW0_ACTIVE false
|
||||
#define SW0_INACTIVE !SW0_ACTIVE
|
||||
#define SW0_EIC_PIN PIN_PA15A_EIC_EXTINT15
|
||||
#define SW0_EIC_MUX MUX_PA15A_EIC_EXTINT15
|
||||
#define SW0_EIC_PINMUX PINMUX_PA15A_EIC_EXTINT15
|
||||
#define SW0_EIC_LINE 15
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \name LED #0 definitions
|
||||
*
|
||||
* Wrapper macros for LED0, to ensure common naming across all Xplained Pro
|
||||
* boards.
|
||||
*
|
||||
* @{ */
|
||||
#define LED_0_NAME "LED0 (yellow)"
|
||||
#define LED_0_PIN LED0_PIN
|
||||
#define LED_0_ACTIVE LED0_ACTIVE
|
||||
#define LED_0_INACTIVE LED0_INACTIVE
|
||||
#define LED0_GPIO LED0_PIN
|
||||
#define LED0 LED0_PIN
|
||||
|
||||
#define LED_0_PWM4CTRL_MODULE TCC0
|
||||
#define LED_0_PWM4CTRL_CHANNEL 0
|
||||
#define LED_0_PWM4CTRL_OUTPUT 0
|
||||
#define LED_0_PWM4CTRL_PIN PIN_PB30E_TCC0_WO0
|
||||
#define LED_0_PWM4CTRL_MUX MUX_PB30E_TCC0_WO0
|
||||
#define LED_0_PWM4CTRL_PINMUX PINMUX_PB30E_TCC0_WO0
|
||||
/** @} */
|
||||
|
||||
/** Number of on-board LEDs */
|
||||
#define LED_COUNT 1
|
||||
|
||||
/**
|
||||
* \name Serialflash definitions
|
||||
*
|
||||
* On board Serialflash definitions.
|
||||
*
|
||||
* @{ */
|
||||
#define SERIALFLASH_SPI_MODULE SERCOM5
|
||||
#define SERIALFLASH_SPI_MUX_SETTING SPI_SIGNAL_MUX_SETTING_E
|
||||
#define SERIALFLASH_SPI_PINMUX_PAD0 PINMUX_PB16C_SERCOM5_PAD0
|
||||
#define SERIALFLASH_SPI_PINMUX_PAD1 PINMUX_UNUSED
|
||||
#define SERIALFLASH_SPI_PINMUX_PAD2 PINMUX_PB22D_SERCOM5_PAD2
|
||||
#define SERIALFLASH_SPI_PINMUX_PAD3 PINMUX_PB23D_SERCOM5_PAD3
|
||||
#define SERIALFLASH_SPI_CS PIN_PA13
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \name Button #0 definitions
|
||||
*
|
||||
* Wrapper macros for SW0, to ensure common naming across all Xplained Pro
|
||||
* boards.
|
||||
*
|
||||
* @{ */
|
||||
#define BUTTON_0_NAME "SW0"
|
||||
#define BUTTON_0_PIN SW0_PIN
|
||||
#define BUTTON_0_ACTIVE SW0_ACTIVE
|
||||
#define BUTTON_0_INACTIVE SW0_INACTIVE
|
||||
#define BUTTON_0_EIC_PIN SW0_EIC_PIN
|
||||
#define BUTTON_0_EIC_MUX SW0_EIC_MUX
|
||||
#define BUTTON_0_EIC_PINMUX SW0_EIC_PINMUX
|
||||
#define BUTTON_0_EIC_LINE SW0_EIC_LINE
|
||||
/** @} */
|
||||
|
||||
/** Number of on-board buttons */
|
||||
#define BUTTON_COUNT 1
|
||||
|
||||
/** \name Extension header #1 pin definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT1_PIN_3 PIN_PB00
|
||||
#define EXT1_PIN_4 PIN_PB01
|
||||
#define EXT1_PIN_5 PIN_PB06
|
||||
#define EXT1_PIN_6 PIN_PB07
|
||||
#define EXT1_PIN_7 PIN_PB02
|
||||
#define EXT1_PIN_8 PIN_PB03
|
||||
#define EXT1_PIN_9 PIN_PB04
|
||||
#define EXT1_PIN_10 PIN_PB05
|
||||
#define EXT1_PIN_11 PIN_PA08
|
||||
#define EXT1_PIN_12 PIN_PA09
|
||||
#define EXT1_PIN_13 PIN_PB09
|
||||
#define EXT1_PIN_14 PIN_PB08
|
||||
#define EXT1_PIN_15 PIN_PA05
|
||||
#define EXT1_PIN_16 PIN_PA06
|
||||
#define EXT1_PIN_17 PIN_PA04
|
||||
#define EXT1_PIN_18 PIN_PA07
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #1 pin definitions by function
|
||||
* @{
|
||||
*/
|
||||
#define EXT1_PIN_ADC_0 EXT1_PIN_3
|
||||
#define EXT1_PIN_ADC_1 EXT1_PIN_4
|
||||
#define EXT1_PIN_GPIO_0 EXT1_PIN_5
|
||||
#define EXT1_PIN_GPIO_1 EXT1_PIN_6
|
||||
#define EXT1_PIN_PWM_0 EXT1_PIN_7
|
||||
#define EXT1_PIN_PWM_1 EXT1_PIN_8
|
||||
#define EXT1_PIN_IRQ EXT1_PIN_9
|
||||
#define EXT1_PIN_I2C_SDA EXT1_PIN_11
|
||||
#define EXT1_PIN_I2C_SCL EXT1_PIN_12
|
||||
#define EXT1_PIN_UART_RX EXT1_PIN_13
|
||||
#define EXT1_PIN_UART_TX EXT1_PIN_14
|
||||
#define EXT1_PIN_SPI_SS_1 EXT1_PIN_10
|
||||
#define EXT1_PIN_SPI_SS_0 EXT1_PIN_15
|
||||
#define EXT1_PIN_SPI_MOSI EXT1_PIN_16
|
||||
#define EXT1_PIN_SPI_MISO EXT1_PIN_17
|
||||
#define EXT1_PIN_SPI_SCK EXT1_PIN_18
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #1 ADC definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT1_ADC_MODULE ADC
|
||||
#define EXT1_ADC_0_CHANNEL 8
|
||||
#define EXT1_ADC_0_PIN PIN_PB00B_ADC_AIN8
|
||||
#define EXT1_ADC_0_MUX MUX_PB00B_ADC_AIN8
|
||||
#define EXT1_ADC_0_PINMUX PINMUX_PB00B_ADC_AIN8
|
||||
#define EXT1_ADC_1_CHANNEL 9
|
||||
#define EXT1_ADC_1_PIN PIN_PB01B_ADC_AIN9
|
||||
#define EXT1_ADC_1_MUX MUX_PB01B_ADC_AIN9
|
||||
#define EXT1_ADC_1_PINMUX PINMUX_PB01B_ADC_AIN9
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #1 PWM definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT1_PWM_MODULE TC6
|
||||
#define EXT1_PWM_0_CHANNEL 0
|
||||
#define EXT1_PWM_0_PIN PIN_PB02E_TC6_WO0
|
||||
#define EXT1_PWM_0_MUX MUX_PB02E_TC6_WO0
|
||||
#define EXT1_PWM_0_PINMUX PINMUX_PB02E_TC6_WO0
|
||||
#define EXT1_PWM_1_CHANNEL 1
|
||||
#define EXT1_PWM_1_PIN PIN_PB03E_TC6_WO1
|
||||
#define EXT1_PWM_1_MUX MUX_PB03E_TC6_WO1
|
||||
#define EXT1_PWM_1_PINMUX PINMUX_PB03E_TC6_WO1
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #1 IRQ/External interrupt definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT1_IRQ_MODULE EIC
|
||||
#define EXT1_IRQ_INPUT 4
|
||||
#define EXT1_IRQ_PIN PIN_PB04A_EIC_EXTINT4
|
||||
#define EXT1_IRQ_MUX MUX_PB04A_EIC_EXTINT4
|
||||
#define EXT1_IRQ_PINMUX PINMUX_PB04A_EIC_EXTINT4
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #1 I2C definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT1_I2C_MODULE SERCOM2
|
||||
#define EXT1_I2C_SERCOM_PINMUX_PAD0 PINMUX_PA08D_SERCOM2_PAD0
|
||||
#define EXT1_I2C_SERCOM_PINMUX_PAD1 PINMUX_PA09D_SERCOM2_PAD1
|
||||
#define EXT1_I2C_SERCOM_DMAC_ID_TX SERCOM2_DMAC_ID_TX
|
||||
#define EXT1_I2C_SERCOM_DMAC_ID_RX SERCOM2_DMAC_ID_RX
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #1 UART definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT1_UART_MODULE SERCOM4
|
||||
#define EXT1_UART_SERCOM_MUX_SETTING USART_RX_1_TX_0_XCK_1
|
||||
#define EXT1_UART_SERCOM_PINMUX_PAD0 PINMUX_PB08D_SERCOM4_PAD0
|
||||
#define EXT1_UART_SERCOM_PINMUX_PAD1 PINMUX_PB09D_SERCOM4_PAD1
|
||||
#define EXT1_UART_SERCOM_PINMUX_PAD2 PINMUX_UNUSED
|
||||
#define EXT1_UART_SERCOM_PINMUX_PAD3 PINMUX_UNUSED
|
||||
#define EXT1_UART_SERCOM_DMAC_ID_TX SERCOM4_DMAC_ID_TX
|
||||
#define EXT1_UART_SERCOM_DMAC_ID_RX SERCOM4_DMAC_ID_RX
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #1 SPI definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT1_SPI_MODULE SERCOM0
|
||||
#define EXT1_SPI_SERCOM_MUX_SETTING SPI_SIGNAL_MUX_SETTING_E
|
||||
#define EXT1_SPI_SERCOM_PINMUX_PAD0 PINMUX_PA04D_SERCOM0_PAD0
|
||||
#define EXT1_SPI_SERCOM_PINMUX_PAD1 PINMUX_PA05D_SERCOM0_PAD1
|
||||
#define EXT1_SPI_SERCOM_PINMUX_PAD2 PINMUX_PA06D_SERCOM0_PAD2
|
||||
#define EXT1_SPI_SERCOM_PINMUX_PAD3 PINMUX_PA07D_SERCOM0_PAD3
|
||||
#define EXT1_SPI_SERCOM_DMAC_ID_TX SERCOM0_DMAC_ID_TX
|
||||
#define EXT1_SPI_SERCOM_DMAC_ID_RX SERCOM0_DMAC_ID_RX
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #2 pin definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT2_PIN_3 PIN_PA10
|
||||
#define EXT2_PIN_4 PIN_PA11
|
||||
#define EXT2_PIN_5 PIN_PA20
|
||||
#define EXT2_PIN_6 PIN_PA21
|
||||
#define EXT2_PIN_7 PIN_PB12
|
||||
#define EXT2_PIN_8 PIN_PB13
|
||||
#define EXT2_PIN_9 PIN_PB14
|
||||
#define EXT2_PIN_10 PIN_PB15
|
||||
#define EXT2_PIN_11 PIN_PA08
|
||||
#define EXT2_PIN_12 PIN_PA09
|
||||
#define EXT2_PIN_13 PIN_PB11
|
||||
#define EXT2_PIN_14 PIN_PB10
|
||||
#define EXT2_PIN_15 PIN_PA17
|
||||
#define EXT2_PIN_16 PIN_PA18
|
||||
#define EXT2_PIN_17 PIN_PA16
|
||||
#define EXT2_PIN_18 PIN_PA19
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #2 pin definitions by function
|
||||
* @{
|
||||
*/
|
||||
#define EXT2_PIN_ADC_0 EXT2_PIN_3
|
||||
#define EXT2_PIN_ADC_1 EXT2_PIN_4
|
||||
#define EXT2_PIN_GPIO_0 EXT2_PIN_5
|
||||
#define EXT2_PIN_GPIO_1 EXT2_PIN_6
|
||||
#define EXT2_PIN_PWM_0 EXT2_PIN_7
|
||||
#define EXT2_PIN_PWM_1 EXT2_PIN_8
|
||||
#define EXT2_PIN_IRQ EXT2_PIN_9
|
||||
#define EXT2_PIN_I2C_SDA EXT2_PIN_11
|
||||
#define EXT2_PIN_I2C_SCL EXT2_PIN_12
|
||||
#define EXT2_PIN_UART_RX EXT2_PIN_13
|
||||
#define EXT2_PIN_UART_TX EXT2_PIN_14
|
||||
#define EXT2_PIN_SPI_SS_1 EXT2_PIN_10
|
||||
#define EXT2_PIN_SPI_SS_0 EXT2_PIN_15
|
||||
#define EXT2_PIN_SPI_MOSI EXT2_PIN_16
|
||||
#define EXT2_PIN_SPI_MISO EXT2_PIN_17
|
||||
#define EXT2_PIN_SPI_SCK EXT2_PIN_18
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #2 ADC definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT2_ADC_MODULE ADC
|
||||
#define EXT2_ADC_0_CHANNEL 18
|
||||
#define EXT2_ADC_0_PIN PIN_PA10B_ADC_AIN18
|
||||
#define EXT2_ADC_0_MUX MUX_PA10B_ADC_AIN18
|
||||
#define EXT2_ADC_0_PINMUX PINMUX_PA10B_ADC_AIN18
|
||||
#define EXT2_ADC_1_CHANNEL 19
|
||||
#define EXT2_ADC_1_PIN PIN_PA11B_ADC_AIN19
|
||||
#define EXT2_ADC_1_MUX MUX_PA11B_ADC_AIN19
|
||||
#define EXT2_ADC_1_PINMUX PINMUX_PA11B_ADC_AIN19
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #2 PWM definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT2_PWM_MODULE TC4
|
||||
#define EXT2_PWM_0_CHANNEL 0
|
||||
#define EXT2_PWM_0_PIN PIN_PB12E_TC4_WO0
|
||||
#define EXT2_PWM_0_MUX MUX_PB12E_TC4_WO0
|
||||
#define EXT2_PWM_0_PINMUX PINMUX_PB12E_TC4_WO0
|
||||
#define EXT2_PWM_1_CHANNEL 1
|
||||
#define EXT2_PWM_1_PIN PIN_PB13E_TC4_WO1
|
||||
#define EXT2_PWM_1_MUX MUX_PB13E_TC4_WO1
|
||||
#define EXT2_PWM_1_PINMUX PINMUX_PB13E_TC4_WO1
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #2 PWM for Control definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT2_PWM4CTRL_MODULE TCC0
|
||||
#define EXT2_PWM4CTRL_0_CHANNEL 2
|
||||
#define EXT2_PWM4CTRL_0_OUTPUT 6
|
||||
#define EXT2_PWM4CTRL_0_PIN PIN_PB12F_TCC0_WO6
|
||||
#define EXT2_PWM4CTRL_0_MUX MUX_PB12F_TCC0_WO6
|
||||
#define EXT2_PWM4CTRL_0_PINMUX PINMUX_PB12F_TCC0_WO6
|
||||
#define EXT2_PWM4CTRL_1_CHANNEL 3
|
||||
#define EXT2_PWM4CTRL_1_OUTPUT 7
|
||||
#define EXT2_PWM4CTRL_1_PIN PIN_PB13F_TCC0_WO7
|
||||
#define EXT2_PWM4CTRL_1_MUX MUX_PB13F_TCC0_WO7
|
||||
#define EXT2_PWM4CTRL_1_PINMUX PINMUX_PB13F_TCC0_WO7
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #2 IRQ/External interrupt definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT2_IRQ_MODULE EIC
|
||||
#define EXT2_IRQ_INPUT 14
|
||||
#define EXT2_IRQ_PIN PIN_PB14A_EIC_EXTINT14
|
||||
#define EXT2_IRQ_MUX MUX_PB14A_EIC_EXTINT14
|
||||
#define EXT2_IRQ_PINMUX PINMUX_PB14A_EIC_EXTINT14
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #2 I2C definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT2_I2C_MODULE SERCOM2
|
||||
#define EXT2_I2C_SERCOM_PINMUX_PAD0 PINMUX_PA08D_SERCOM2_PAD0
|
||||
#define EXT2_I2C_SERCOM_PINMUX_PAD1 PINMUX_PA09D_SERCOM2_PAD1
|
||||
#define EXT2_I2C_SERCOM_DMAC_ID_TX SERCOM2_DMAC_ID_TX
|
||||
#define EXT2_I2C_SERCOM_DMAC_ID_RX SERCOM2_DMAC_ID_RX
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #2 UART definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT2_UART_MODULE SERCOM4
|
||||
#define EXT2_UART_SERCOM_MUX_SETTING USART_RX_1_TX_0_XCK_1
|
||||
#define EXT2_UART_SERCOM_PINMUX_PAD0 PINMUX_PB12C_SERCOM4_PAD0
|
||||
#define EXT2_UART_SERCOM_PINMUX_PAD1 PINMUX_PB13C_SERCOM4_PAD1
|
||||
#define EXT2_UART_SERCOM_PINMUX_PAD2 PINMUX_UNUSED
|
||||
#define EXT2_UART_SERCOM_PINMUX_PAD3 PINMUX_UNUSED
|
||||
#define EXT2_UART_SERCOM_DMAC_ID_TX SERCOM4_DMAC_ID_TX
|
||||
#define EXT2_UART_SERCOM_DMAC_ID_RX SERCOM4_DMAC_ID_RX
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #2 SPI definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT2_SPI_MODULE SERCOM1
|
||||
#define EXT2_SPI_SERCOM_MUX_SETTING SPI_SIGNAL_MUX_SETTING_E
|
||||
#define EXT2_SPI_SERCOM_PINMUX_PAD0 PINMUX_PA16C_SERCOM1_PAD0
|
||||
#define EXT2_SPI_SERCOM_PINMUX_PAD1 PINMUX_PA17C_SERCOM1_PAD1
|
||||
#define EXT2_SPI_SERCOM_PINMUX_PAD2 PINMUX_PA18C_SERCOM1_PAD2
|
||||
#define EXT2_SPI_SERCOM_PINMUX_PAD3 PINMUX_PA19C_SERCOM1_PAD3
|
||||
#define EXT2_SPI_SERCOM_DMAC_ID_TX SERCOM1_DMAC_ID_TX
|
||||
#define EXT2_SPI_SERCOM_DMAC_ID_RX SERCOM1_DMAC_ID_RX
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #3 pin definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT3_PIN_3 PIN_PA02
|
||||
#define EXT3_PIN_4 PIN_PA03
|
||||
#define EXT3_PIN_5 PIN_PB30
|
||||
#define EXT3_PIN_6 PIN_PA15
|
||||
#define EXT3_PIN_7 PIN_PA12
|
||||
#define EXT3_PIN_8 PIN_PA13
|
||||
#define EXT3_PIN_9 PIN_PA28
|
||||
#define EXT3_PIN_10 PIN_PA27
|
||||
#define EXT3_PIN_11 PIN_PA08
|
||||
#define EXT3_PIN_12 PIN_PA09
|
||||
#define EXT3_PIN_13 PIN_PB11
|
||||
#define EXT3_PIN_14 PIN_PB10
|
||||
#define EXT3_PIN_15 PIN_PB17
|
||||
#define EXT3_PIN_16 PIN_PB22
|
||||
#define EXT3_PIN_17 PIN_PB16
|
||||
#define EXT3_PIN_18 PIN_PB23
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #3 pin definitions by function
|
||||
* @{
|
||||
*/
|
||||
#define EXT3_PIN_ADC_0 EXT3_PIN_3
|
||||
#define EXT3_PIN_ADC_1 EXT3_PIN_4
|
||||
#define EXT3_PIN_GPIO_0 EXT3_PIN_5
|
||||
#define EXT3_PIN_GPIO_1 EXT3_PIN_6
|
||||
#define EXT3_PIN_PWM_0 EXT3_PIN_7
|
||||
#define EXT3_PIN_PWM_1 EXT3_PIN_8
|
||||
#define EXT3_PIN_IRQ EXT3_PIN_9
|
||||
#define EXT3_PIN_I2C_SDA EXT3_PIN_11
|
||||
#define EXT3_PIN_I2C_SCL EXT3_PIN_12
|
||||
#define EXT3_PIN_UART_RX EXT3_PIN_13
|
||||
#define EXT3_PIN_UART_TX EXT3_PIN_14
|
||||
#define EXT3_PIN_SPI_SS_1 EXT3_PIN_10
|
||||
#define EXT3_PIN_SPI_SS_0 EXT3_PIN_15
|
||||
#define EXT3_PIN_SPI_MOSI EXT3_PIN_16
|
||||
#define EXT3_PIN_SPI_MISO EXT3_PIN_17
|
||||
#define EXT3_PIN_SPI_SCK EXT3_PIN_18
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #3 ADC definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT3_ADC_MODULE ADC
|
||||
#define EXT3_ADC_0_CHANNEL 0
|
||||
#define EXT3_ADC_0_PIN PIN_PA02B_ADC_AIN0
|
||||
#define EXT3_ADC_0_MUX MUX_PA02B_ADC_AIN0
|
||||
#define EXT3_ADC_0_PINMUX PINMUX_PA02B_ADC_AIN0
|
||||
#define EXT3_ADC_1_CHANNEL 1
|
||||
#define EXT3_ADC_1_PIN PIN_PA03B_ADC_AIN1
|
||||
#define EXT3_ADC_1_MUX MUX_PA03B_ADC_AIN1
|
||||
#define EXT3_ADC_1_PINMUX PINMUX_PA03B_ADC_AIN1
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #3 PWM for Control definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT3_PWM4CTRL_MODULE TCC2
|
||||
#define EXT3_PWM4CTRL_0_CHANNEL 0
|
||||
#define EXT3_PWM4CTRL_0_OUTPUT 0
|
||||
#define EXT3_PWM4CTRL_0_PIN PIN_PA12E_TCC2_WO0
|
||||
#define EXT3_PWM4CTRL_0_MUX MUX_PA12E_TCC2_WO0
|
||||
#define EXT3_PWM4CTRL_0_PINMUX PINMUX_PA12E_TCC2_WO0
|
||||
#define EXT3_PWM4CTRL_1_CHANNEL 1
|
||||
#define EXT3_PWM4CTRL_1_OUTPUT 1
|
||||
#define EXT3_PWM4CTRL_1_PIN PIN_PA13E_TCC2_WO1
|
||||
#define EXT3_PWM4CTRL_1_MUX MUX_PA13E_TCC2_WO1
|
||||
#define EXT3_PWM4CTRL_1_PINMUX PINMUX_PA13E_TCC2_WO1
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #3 IRQ/External interrupt definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT3_IRQ_MODULE EIC
|
||||
#define EXT3_IRQ_INPUT 8
|
||||
#define EXT3_IRQ_PIN PIN_PA28A_EIC_EXTINT8
|
||||
#define EXT3_IRQ_MUX MUX_PA28A_EIC_EXTINT8
|
||||
#define EXT3_IRQ_PINMUX PINMUX_PA28A_EIC_EXTINT8
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #3 I2C definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT3_I2C_MODULE SERCOM2
|
||||
#define EXT3_I2C_SERCOM_PINMUX_PAD0 PINMUX_PA08D_SERCOM2_PAD0
|
||||
#define EXT3_I2C_SERCOM_PINMUX_PAD1 PINMUX_PA09D_SERCOM2_PAD1
|
||||
#define EXT3_I2C_SERCOM_DMAC_ID_TX SERCOM2_DMAC_ID_TX
|
||||
#define EXT3_I2C_SERCOM_DMAC_ID_RX SERCOM2_DMAC_ID_RX
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #3 UART definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT3_UART_MODULE SERCOM4
|
||||
#define EXT3_UART_SERCOM_MUX_SETTING USART_RX_3_TX_2_XCK_3
|
||||
#define EXT3_UART_SERCOM_PINMUX_PAD0 PINMUX_UNUSED
|
||||
#define EXT3_UART_SERCOM_PINMUX_PAD1 PINMUX_UNUSED
|
||||
#define EXT3_UART_SERCOM_PINMUX_PAD2 PINMUX_PB10D_SERCOM4_PAD2
|
||||
#define EXT3_UART_SERCOM_PINMUX_PAD3 PINMUX_PB11D_SERCOM4_PAD3
|
||||
#define EXT3_UART_SERCOM_DMAC_ID_TX SERCOM4_DMAC_ID_TX
|
||||
#define EXT3_UART_SERCOM_DMAC_ID_RX SERCOM4_DMAC_ID_RX
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #3 SPI definitions
|
||||
* @{
|
||||
*/
|
||||
#define EXT3_SPI_MODULE SERCOM5
|
||||
#define EXT3_SPI_SERCOM_MUX_SETTING SPI_SIGNAL_MUX_SETTING_E
|
||||
#define EXT3_SPI_SERCOM_PINMUX_PAD0 PINMUX_PB16C_SERCOM5_PAD0
|
||||
#define EXT3_SPI_SERCOM_PINMUX_PAD1 PINMUX_PB17C_SERCOM5_PAD1
|
||||
#define EXT3_SPI_SERCOM_PINMUX_PAD2 PINMUX_PB22D_SERCOM5_PAD2
|
||||
#define EXT3_SPI_SERCOM_PINMUX_PAD3 PINMUX_PB23D_SERCOM5_PAD3
|
||||
#define EXT3_SPI_SERCOM_DMAC_ID_TX SERCOM5_DMAC_ID_TX
|
||||
#define EXT3_SPI_SERCOM_DMAC_ID_RX SERCOM5_DMAC_ID_RX
|
||||
/** @} */
|
||||
|
||||
/** \name Extension header #3 Dataflash
|
||||
* @{
|
||||
*/
|
||||
#define EXT3_DATAFLASH_SPI_MODULE EXT3_SPI_MODULE
|
||||
#define EXT3_DATAFLASH_SPI_MUX_SETTING EXT3_SPI_SERCOM_MUX_SETTING
|
||||
#define EXT3_DATAFLASH_SPI_PINMUX_PAD0 EXT3_SPI_SERCOM_PINMUX_PAD0
|
||||
#define EXT3_DATAFLASH_SPI_PINMUX_PAD1 EXT3_SPI_SERCOM_PINMUX_PAD1
|
||||
#define EXT3_DATAFLASH_SPI_PINMUX_PAD2 EXT3_SPI_SERCOM_PINMUX_PAD2
|
||||
#define EXT3_DATAFLASH_SPI_PINMUX_PAD3 EXT3_SPI_SERCOM_PINMUX_PAD3
|
||||
/** @} */
|
||||
|
||||
/** \name USB definitions
|
||||
* @{
|
||||
*/
|
||||
#define USB_ID
|
||||
#define USB_TARGET_DP_PIN PIN_PA25G_USB_DP
|
||||
#define USB_TARGET_DP_MUX MUX_PA25G_USB_DP
|
||||
#define USB_TARGET_DP_PINMUX PINMUX_PA25G_USB_DP
|
||||
#define USB_TARGET_DM_PIN PIN_PA24G_USB_DM
|
||||
#define USB_TARGET_DM_MUX MUX_PA24G_USB_DM
|
||||
#define USB_TARGET_DM_PINMUX PINMUX_PA24G_USB_DM
|
||||
#define USB_VBUS_PIN PIN_PA14
|
||||
#define USB_VBUS_EIC_LINE 14
|
||||
#define USB_VBUS_EIC_MUX MUX_PA14A_EIC_EXTINT14
|
||||
#define USB_VBUS_EIC_PINMUX PINMUX_PA14A_EIC_EXTINT14
|
||||
#define USB_ID_PIN PIN_PA03
|
||||
#define USB_ID_EIC_LINE 3
|
||||
#define USB_ID_EIC_MUX MUX_PA03A_EIC_EXTINT3
|
||||
#define USB_ID_EIC_PINMUX PINMUX_PA03A_EIC_EXTINT3
|
||||
/** @} */
|
||||
|
||||
/** \name Embedded debugger GPIO interface definitions
|
||||
* @{
|
||||
*/
|
||||
#define EDBG_GPIO0_PIN PIN_PA27
|
||||
#define EDBG_GPIO1_PIN PIN_PA28
|
||||
#define EDBG_GPIO2_PIN PIN_PA20
|
||||
#define EDBG_GPIO3_PIN PIN_PA21
|
||||
/** @} */
|
||||
|
||||
/** \name Embedded debugger USART interface definitions
|
||||
* @{
|
||||
*/
|
||||
#define EDBG_UART_MODULE -1 /* Not available on this board */
|
||||
#define EDBG_UART_RX_PIN -1 /* Not available on this board */
|
||||
#define EDBG_UART_RX_MUX -1 /* Not available on this board */
|
||||
#define EDBG_UART_RX_PINMUX -1 /* Not available on this board */
|
||||
#define EDBG_UART_RX_SERCOM_PAD -1 /* Not available on this board */
|
||||
#define EDBG_UART_TX_PIN -1 /* Not available on this board */
|
||||
#define EDBG_UART_TX_MUX -1 /* Not available on this board */
|
||||
#define EDBG_UART_TX_PINMUX -1 /* Not available on this board */
|
||||
#define EDBG_UART_TX_SERCOM_PAD -1 /* Not available on this board */
|
||||
/** @} */
|
||||
|
||||
/** \name Embedded debugger I2C interface definitions
|
||||
* @{
|
||||
*/
|
||||
#define EDBG_I2C_MODULE SERCOM2
|
||||
#define EDBG_I2C_SERCOM_PINMUX_PAD0 PINMUX_PA08D_SERCOM2_PAD0
|
||||
#define EDBG_I2C_SERCOM_PINMUX_PAD1 PINMUX_PA09D_SERCOM2_PAD1
|
||||
#define EDBG_I2C_SERCOM_DMAC_ID_TX SERCOM2_DMAC_ID_TX
|
||||
#define EDBG_I2C_SERCOM_DMAC_ID_RX SERCOM2_DMAC_ID_RX
|
||||
/** @} */
|
||||
|
||||
/** \name Embedded debugger SPI interface definitions
|
||||
* @{
|
||||
*/
|
||||
#define EDBG_SPI_MODULE SERCOM5
|
||||
#define EDBG_SPI_SERCOM_MUX_SETTING SPI_SIGNAL_MUX_SETTING_E
|
||||
#define EDBG_SPI_SERCOM_PINMUX_PAD0 PINMUX_PB16C_SERCOM5_PAD0
|
||||
#define EDBG_SPI_SERCOM_PINMUX_PAD1 PINMUX_PB31D_SERCOM5_PAD1
|
||||
#define EDBG_SPI_SERCOM_PINMUX_PAD2 PINMUX_PB22D_SERCOM5_PAD2
|
||||
#define EDBG_SPI_SERCOM_PINMUX_PAD3 PINMUX_PB23D_SERCOM5_PAD3
|
||||
#define EDBG_SPI_SERCOM_DMAC_ID_TX SERCOM5_DMAC_ID_TX
|
||||
#define EDBG_SPI_SERCOM_DMAC_ID_RX SERCOM5_DMAC_ID_RX
|
||||
/** @} */
|
||||
|
||||
/** \name Embedded debugger CDC Gateway USART interface definitions
|
||||
* @{
|
||||
*/
|
||||
#define EDBG_CDC_MODULE SERCOM3
|
||||
#define EDBG_CDC_SERCOM_MUX_SETTING USART_RX_1_TX_0_XCK_1
|
||||
#define EDBG_CDC_SERCOM_PINMUX_PAD0 PINMUX_PA22C_SERCOM3_PAD0
|
||||
#define EDBG_CDC_SERCOM_PINMUX_PAD1 PINMUX_PA23C_SERCOM3_PAD1
|
||||
#define EDBG_CDC_SERCOM_PINMUX_PAD2 PINMUX_UNUSED
|
||||
#define EDBG_CDC_SERCOM_PINMUX_PAD3 PINMUX_UNUSED
|
||||
#define EDBG_CDC_SERCOM_DMAC_ID_TX SERCOM3_DMAC_ID_TX
|
||||
#define EDBG_CDC_SERCOM_DMAC_ID_RX SERCOM3_DMAC_ID_RX
|
||||
/** @} */
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \name 802.15.4 TRX Interface definitions
|
||||
* @{
|
||||
*/
|
||||
#ifndef EXT2_CONFIG
|
||||
#define AT86RFX_SPI EXT1_SPI_MODULE
|
||||
#define AT86RFX_RST_PIN EXT1_PIN_7
|
||||
#define AT86RFX_MISC_PIN EXT1_PIN_12
|
||||
#define AT86RFX_IRQ_PIN EXT1_PIN_9
|
||||
#define AT86RFX_SLP_PIN EXT1_PIN_10
|
||||
#define AT86RFX_SPI_CS EXT1_PIN_15
|
||||
#define AT86RFX_SPI_MOSI EXT1_PIN_16
|
||||
#define AT86RFX_SPI_MISO EXT1_PIN_17
|
||||
#define AT86RFX_SPI_SCK EXT1_PIN_18
|
||||
#define AT86RFX_CSD EXT1_PIN_5
|
||||
#define AT86RFX_CPS EXT1_PIN_8
|
||||
|
||||
#define AT86RFX_SPI_SERCOM_MUX_SETTING EXT1_SPI_SERCOM_MUX_SETTING
|
||||
#define AT86RFX_SPI_SERCOM_PINMUX_PAD0 EXT1_SPI_SERCOM_PINMUX_PAD0
|
||||
#define AT86RFX_SPI_SERCOM_PINMUX_PAD1 PINMUX_UNUSED
|
||||
#define AT86RFX_SPI_SERCOM_PINMUX_PAD2 EXT1_SPI_SERCOM_PINMUX_PAD2
|
||||
#define AT86RFX_SPI_SERCOM_PINMUX_PAD3 EXT1_SPI_SERCOM_PINMUX_PAD3
|
||||
|
||||
#define AT86RFX_IRQ_CHAN EXT1_IRQ_INPUT
|
||||
#define AT86RFX_IRQ_PINMUX EXT1_IRQ_PINMUX
|
||||
|
||||
|
||||
#endif
|
||||
/** Enables the transceiver main interrupt. */
|
||||
#define ENABLE_TRX_IRQ() \
|
||||
extint_chan_enable_callback(AT86RFX_IRQ_CHAN, EXTINT_CALLBACK_TYPE_DETECT)
|
||||
|
||||
/** Disables the transceiver main interrupt. */
|
||||
#define DISABLE_TRX_IRQ() \
|
||||
extint_chan_disable_callback(AT86RFX_IRQ_CHAN, EXTINT_CALLBACK_TYPE_DETECT)
|
||||
|
||||
/** Clears the transceiver main interrupt. */
|
||||
#define CLEAR_TRX_IRQ() \
|
||||
extint_chan_clear_detected(AT86RFX_IRQ_CHAN);
|
||||
|
||||
/*
|
||||
* This macro saves the trx interrupt status and disables the trx interrupt.
|
||||
*/
|
||||
#define ENTER_TRX_REGION() \
|
||||
{ extint_chan_disable_callback(AT86RFX_IRQ_CHAN, EXTINT_CALLBACK_TYPE_DETECT)
|
||||
|
||||
/*
|
||||
* This macro restores the transceiver interrupt status
|
||||
*/
|
||||
#define LEAVE_TRX_REGION() \
|
||||
extint_chan_enable_callback(AT86RFX_IRQ_CHAN, EXTINT_CALLBACK_TYPE_DETECT); }
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \brief Turns off the specified LEDs.
|
||||
*
|
||||
* \param led_gpio LED to turn off (LEDx_GPIO).
|
||||
*
|
||||
* \note The pins of the specified LEDs are set to GPIO output mode.
|
||||
*/
|
||||
#define LED_Off(led_gpio) port_pin_set_output_level(led_gpio,true)
|
||||
|
||||
/**
|
||||
* \brief Turns on the specified LEDs.
|
||||
*
|
||||
* \param led_gpio LED to turn on (LEDx_GPIO).
|
||||
*
|
||||
* \note The pins of the specified LEDs are set to GPIO output mode.
|
||||
*/
|
||||
#define LED_On(led_gpio) port_pin_set_output_level(led_gpio,false)
|
||||
|
||||
/**
|
||||
* \brief Toggles the specified LEDs.
|
||||
*
|
||||
* \param led_gpio LED to toggle (LEDx_GPIO).
|
||||
*
|
||||
* \note The pins of the specified LEDs are set to GPIO output mode.
|
||||
*/
|
||||
#define LED_Toggle(led_gpio) port_pin_toggle_output_level(led_gpio)
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* SAMD21_XPLAINED_PRO_H_INCLUDED */
|
||||
|
|
@ -1,707 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM External Interrupt Driver
|
||||
*
|
||||
* Copyright (C) 2012-2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#ifndef EXTINT_H_INCLUDED
|
||||
#define EXTINT_H_INCLUDED
|
||||
|
||||
/**
|
||||
* \defgroup asfdoc_sam0_extint_group SAM External Interrupt (EXTINT) Driver
|
||||
*
|
||||
* This driver for Atmel® | SMART ARM®-based microcontrollers provides
|
||||
* an interface for the configuration and management of external interrupts
|
||||
* generated by the physical device pins, including edge detection.
|
||||
* The following driver API modes are covered by this
|
||||
* manual:
|
||||
*
|
||||
* - Polled APIs
|
||||
* \if EXTINT_CALLBACK_MODE
|
||||
* - Callback APIs
|
||||
* \endif
|
||||
*
|
||||
* The following peripheral is used by this module:
|
||||
* - EIC (External Interrupt Controller)
|
||||
*
|
||||
* The following devices can use this module:
|
||||
* - Atmel | SMART SAM D20/D21
|
||||
* - Atmel | SMART SAM R21
|
||||
* - Atmel | SMART SAM D09/D10/D11
|
||||
* - Atmel | SMART SAM L21/L22
|
||||
* - Atmel | SMART SAM DA1
|
||||
* - Atmel | SMART SAM C20/C21
|
||||
*
|
||||
* The outline of this documentation is as follows:
|
||||
* - \ref asfdoc_sam0_extint_prerequisites
|
||||
* - \ref asfdoc_sam0_extint_module_overview
|
||||
* - \ref asfdoc_sam0_extint_special_considerations
|
||||
* - \ref asfdoc_sam0_extint_extra_info
|
||||
* - \ref asfdoc_sam0_extint_examples
|
||||
* - \ref asfdoc_sam0_extint_api_overview
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_extint_prerequisites Prerequisites
|
||||
*
|
||||
* There are no prerequisites for this module.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_extint_module_overview Module Overview
|
||||
*
|
||||
* The External Interrupt (EXTINT) module provides a method of asynchronously
|
||||
* detecting rising edge, falling edge, or specific level detection on individual
|
||||
* I/O pins of a device. This detection can then be used to trigger a software
|
||||
* interrupt or event, or polled for later use if required. External interrupts
|
||||
* can also optionally be used to automatically wake up the device from sleep
|
||||
* mode, allowing the device to conserve power while still being able to react
|
||||
* to an external stimulus in a timely manner.
|
||||
*
|
||||
* \subsection asfdoc_sam0_extint_logical_channels Logical Channels
|
||||
* The External Interrupt module contains a number of logical channels, each of
|
||||
* which is capable of being individually configured for a given pin routing,
|
||||
* detection mode, and filtering/wake up characteristics.
|
||||
*
|
||||
* Each individual logical external interrupt channel may be routed to a single
|
||||
* physical device I/O pin in order to detect a particular edge or level of the
|
||||
* incoming signal.
|
||||
*
|
||||
* \subsection asfdoc_sam0_extint_module_overview_nmi_chanel NMI Channels
|
||||
*
|
||||
* One or more Non Maskable Interrupt (NMI) channels are provided within each
|
||||
* physical External Interrupt Controller module, allowing a single physical pin
|
||||
* of the device to fire a single NMI interrupt in response to a particular
|
||||
* edge or level stimulus. An NMI cannot, as the name suggests, be disabled in
|
||||
* firmware and will take precedence over any in-progress interrupt sources.
|
||||
*
|
||||
* NMIs can be used to implement critical device features such as forced
|
||||
* software reset or other functionality where the action should be executed in
|
||||
* preference to all other running code with a minimum amount of latency.
|
||||
*
|
||||
* \subsection asfdoc_sam0_extint_module_overview_filtering Input Filtering and Detection
|
||||
*
|
||||
* To reduce the possibility of noise or other transient signals causing
|
||||
* unwanted device wake-ups, interrupts, and/or events via an external interrupt
|
||||
* channel. A hardware signal filter can be enabled on individual channels. This
|
||||
* filter provides a Majority-of-Three voter filter on the incoming signal, so
|
||||
* that the input state is considered to be the majority vote of three
|
||||
* subsequent samples of the pin input buffer. The possible sampled input and
|
||||
* resulting filtered output when the filter is enabled is shown in
|
||||
* \ref asfdoc_sam0_extint_filter_table "the table below".
|
||||
*
|
||||
* \anchor asfdoc_sam0_extint_filter_table
|
||||
* <table>
|
||||
* <caption>Sampled Input and Resulting Filtered Output</caption>
|
||||
* <tr>
|
||||
* <th>Input Sample 1</th>
|
||||
* <th>Input Sample 2</th>
|
||||
* <th>Input Sample 3</th>
|
||||
* <th>Filtered Output</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>0</td> <td>0</td> <td>0</td> <td>0</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>0</td> <td>0</td> <td>1</td> <td>0</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>0</td> <td>1</td> <td>0</td> <td>0</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>0</td> <td>1</td> <td>1</td> <td>1</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>1</td> <td>0</td> <td>0</td> <td>0</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>1</td> <td>0</td> <td>1</td> <td>1</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>1</td> <td>1</td> <td>0</td> <td>1</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>1</td> <td>1</td> <td>1</td> <td>1</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*
|
||||
* \subsection asfdoc_sam0_extint_module_overview_events Events and Interrupts
|
||||
*
|
||||
* Channel detection states may be polled inside the application for synchronous
|
||||
* detection, or events and interrupts may be used for asynchronous behavior.
|
||||
* Each channel can be configured to give an asynchronous hardware event (which
|
||||
* may in turn trigger actions in other hardware modules) or an asynchronous
|
||||
* software interrupt.
|
||||
*
|
||||
* \note The connection of events between modules requires the use of the
|
||||
* \ref asfdoc_sam0_events_group "SAM Event System Driver (EVENTS)"
|
||||
* to route output event of one module to the input event of another.
|
||||
* For more information on event routing, refer to the event driver
|
||||
* documentation.
|
||||
*
|
||||
* \subsection asfdoc_sam0_extint_module_overview_physical Physical Connection
|
||||
*
|
||||
* \ref asfdoc_sam0_extint_int_connections "The diagram below" shows how this
|
||||
* module is interconnected within the device.
|
||||
*
|
||||
* \anchor asfdoc_sam0_extint_int_connections
|
||||
* \dot
|
||||
* digraph overview {
|
||||
* node [label="Port Pad" shape=square] pad;
|
||||
*
|
||||
* subgraph driver {
|
||||
* node [label="Peripheral MUX" shape=trapezium] pinmux;
|
||||
* node [label="EIC Module" shape=ellipse] eic;
|
||||
* node [label="Other Peripheral Modules" shape=ellipse style=filled fillcolor=lightgray] peripherals;
|
||||
* }
|
||||
*
|
||||
* pinmux -> eic;
|
||||
* pad -> pinmux;
|
||||
* pinmux -> peripherals;
|
||||
* }
|
||||
* \enddot
|
||||
*
|
||||
* \section asfdoc_sam0_extint_special_considerations Special Considerations
|
||||
*
|
||||
* Not all devices support disabling of the NMI channel(s) detection mode - see
|
||||
* your device datasheet.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_extint_extra_info Extra Information
|
||||
*
|
||||
* For extra information, see \ref asfdoc_sam0_extint_extra. This includes:
|
||||
* - \ref asfdoc_sam0_extint_extra_acronyms
|
||||
* - \ref asfdoc_sam0_extint_extra_dependencies
|
||||
* - \ref asfdoc_sam0_extint_extra_errata
|
||||
* - \ref asfdoc_sam0_extint_extra_history
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_extint_examples Examples
|
||||
*
|
||||
* For a list of examples related to this driver, see
|
||||
* \ref asfdoc_sam0_extint_exqsg.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_extint_api_overview API Overview
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include <compiler.h>
|
||||
#include <pinmux.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief External interrupt edge detection configuration enum.
|
||||
*
|
||||
* Enum for the possible signal edge detection modes of the External
|
||||
* Interrupt Controller module.
|
||||
*/
|
||||
enum extint_detect {
|
||||
/** No edge detection. Not allowed as a NMI detection mode on some
|
||||
* devices. */
|
||||
EXTINT_DETECT_NONE = 0,
|
||||
/** Detect rising signal edges */
|
||||
EXTINT_DETECT_RISING = 1,
|
||||
/** Detect falling signal edges */
|
||||
EXTINT_DETECT_FALLING = 2,
|
||||
/** Detect both signal edges */
|
||||
EXTINT_DETECT_BOTH = 3,
|
||||
/** Detect high signal levels */
|
||||
EXTINT_DETECT_HIGH = 4,
|
||||
/** Detect low signal levels */
|
||||
EXTINT_DETECT_LOW = 5,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief External interrupt internal pull configuration enum.
|
||||
*
|
||||
* Enum for the possible pin internal pull configurations.
|
||||
*
|
||||
* \note Disabling the internal pull resistor is not recommended if the driver
|
||||
* is used in interrupt (callback) mode, due the possibility of floating
|
||||
* inputs generating continuous interrupts.
|
||||
*/
|
||||
enum extint_pull {
|
||||
/** Internal pull-up resistor is enabled on the pin */
|
||||
EXTINT_PULL_UP = SYSTEM_PINMUX_PIN_PULL_UP,
|
||||
/** Internal pull-down resistor is enabled on the pin */
|
||||
EXTINT_PULL_DOWN = SYSTEM_PINMUX_PIN_PULL_DOWN,
|
||||
/** Internal pull resistor is disconnected from the pin */
|
||||
EXTINT_PULL_NONE = SYSTEM_PINMUX_PIN_PULL_NONE,
|
||||
};
|
||||
|
||||
/** The EIC is clocked by GCLK_EIC. */
|
||||
#define EXTINT_CLK_GCLK 0
|
||||
/** The EIC is clocked by CLK_ULP32K. */
|
||||
#define EXTINT_CLK_ULP32K 1
|
||||
|
||||
/**
|
||||
* \brief External Interrupt Controller channel configuration structure.
|
||||
*
|
||||
* Configuration structure for the edge detection mode of an external
|
||||
* interrupt channel.
|
||||
*/
|
||||
struct extint_chan_conf {
|
||||
/** GPIO pin the NMI should be connected to */
|
||||
uint32_t gpio_pin;
|
||||
/** MUX position the GPIO pin should be configured to */
|
||||
uint32_t gpio_pin_mux;
|
||||
/** Internal pull to enable on the input pin */
|
||||
enum extint_pull gpio_pin_pull;
|
||||
#if (SAML21) || (SAML22) || (SAMC20) || (SAMC21) || (SAMR30)
|
||||
/** Enable asynchronous edge detection. */
|
||||
bool enable_async_edge_detection;
|
||||
#else
|
||||
/** Wake up the device if the channel interrupt fires during sleep mode */
|
||||
bool wake_if_sleeping;
|
||||
#endif
|
||||
/** Filter the raw input signal to prevent noise from triggering an
|
||||
* interrupt accidentally, using a three sample majority filter */
|
||||
bool filter_input_signal;
|
||||
/** Edge detection mode to use */
|
||||
enum extint_detect detection_criteria;
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief External Interrupt event enable/disable structure.
|
||||
*
|
||||
* Event flags for the \ref extint_enable_events() and
|
||||
* \ref extint_disable_events().
|
||||
*/
|
||||
struct extint_events {
|
||||
/** If \c true, an event will be generated when an external interrupt
|
||||
* channel detection state changes */
|
||||
bool generate_event_on_detect[32 * EIC_INST_NUM];
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief External Interrupt Controller NMI configuration structure.
|
||||
*
|
||||
* Configuration structure for the edge detection mode of an external
|
||||
* interrupt NMI channel.
|
||||
*/
|
||||
struct extint_nmi_conf {
|
||||
/** GPIO pin the NMI should be connected to */
|
||||
uint32_t gpio_pin;
|
||||
/** MUX position the GPIO pin should be configured to */
|
||||
uint32_t gpio_pin_mux;
|
||||
/** Internal pull to enable on the input pin */
|
||||
enum extint_pull gpio_pin_pull;
|
||||
/** Filter the raw input signal to prevent noise from triggering an
|
||||
* interrupt accidentally, using a three sample majority filter */
|
||||
bool filter_input_signal;
|
||||
/** Edge detection mode to use. Not all devices support all possible
|
||||
* detection modes for NMIs.
|
||||
*/
|
||||
enum extint_detect detection_criteria;
|
||||
#if (SAML21) || (SAML22) || (SAMC20) || (SAMC21) || (SAMR30)
|
||||
/** Enable asynchronous edge detection. */
|
||||
bool enable_async_edge_detection;
|
||||
#endif
|
||||
};
|
||||
|
||||
#if EXTINT_CALLBACK_MODE == true
|
||||
/** Type definition for an EXTINT module callback function */
|
||||
typedef void (*extint_callback_t)(void);
|
||||
|
||||
#ifndef EIC_NUMBER_OF_INTERRUPTS
|
||||
# define EIC_NUMBER_OF_INTERRUPTS 16
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
/** \internal
|
||||
* Internal EXTINT module device instance structure definition.
|
||||
*/
|
||||
struct _extint_module
|
||||
{
|
||||
# if EXTINT_CALLBACK_MODE == true
|
||||
/** Asynchronous channel callback table, for user-registered handlers */
|
||||
extint_callback_t callbacks[EIC_NUMBER_OF_INTERRUPTS];
|
||||
# else
|
||||
/** Dummy value to ensure the struct has at least one member */
|
||||
uint8_t _dummy;
|
||||
# endif
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Retrieves the base EIC module address from a given channel number.
|
||||
*
|
||||
* Retrieves the base address of a EIC hardware module associated with the
|
||||
* given external interrupt channel.
|
||||
*
|
||||
* \param[in] channel External interrupt channel index to convert
|
||||
*
|
||||
* \return Base address of the associated EIC module.
|
||||
*/
|
||||
static inline Eic * _extint_get_eic_from_channel(
|
||||
const uint8_t channel)
|
||||
{
|
||||
uint8_t eic_index = (channel / 32);
|
||||
|
||||
if (eic_index < EIC_INST_NUM) {
|
||||
/* Array of available EICs */
|
||||
Eic *const eics[EIC_INST_NUM] = EIC_INSTS;
|
||||
|
||||
return eics[eic_index];
|
||||
} else {
|
||||
Assert(false);
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Retrieves the base EIC module address from a given NMI channel number.
|
||||
*
|
||||
* Retrieves the base address of a EIC hardware module associated with the
|
||||
* given non-maskable external interrupt channel.
|
||||
*
|
||||
* \param[in] nmi_channel Non-Maskable interrupt channel index to convert
|
||||
*
|
||||
* \return Base address of the associated EIC module.
|
||||
*/
|
||||
static inline Eic * _extint_get_eic_from_nmi(
|
||||
const uint8_t nmi_channel)
|
||||
{
|
||||
uint8_t eic_index = nmi_channel;
|
||||
|
||||
if (eic_index < EIC_INST_NUM) {
|
||||
/* Array of available EICs */
|
||||
Eic *const eics[EIC_INST_NUM] = EIC_INSTS;
|
||||
|
||||
return eics[eic_index];
|
||||
} else {
|
||||
Assert(false);
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/** \name Event Management
|
||||
* @{
|
||||
*/
|
||||
|
||||
void extint_enable_events(
|
||||
struct extint_events *const events);
|
||||
|
||||
void extint_disable_events(
|
||||
struct extint_events *const events);
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \name Configuration and Initialization (Channel)
|
||||
* @{
|
||||
*/
|
||||
|
||||
void extint_chan_get_config_defaults(
|
||||
struct extint_chan_conf *const config);
|
||||
|
||||
void extint_chan_set_config(
|
||||
const uint8_t channel,
|
||||
const struct extint_chan_conf *const config);
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \name Configuration and Initialization (NMI)
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Initializes an External Interrupt NMI channel configuration structure to defaults.
|
||||
*
|
||||
* Initializes a given External Interrupt NMI channel configuration structure
|
||||
* to a set of known default values. This function should be called on all new
|
||||
* instances of these configuration structures before being modified by the
|
||||
* user application.
|
||||
*
|
||||
* The default configuration is as follows:
|
||||
* \li Input filtering disabled
|
||||
* \li Detect falling edges of a signal
|
||||
* \li Asynchronous edge detection is disabled
|
||||
*
|
||||
* \param[out] config Configuration structure to initialize to default values
|
||||
*/
|
||||
static inline void extint_nmi_get_config_defaults(
|
||||
struct extint_nmi_conf *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
|
||||
/* Default configuration values */
|
||||
config->gpio_pin = 0;
|
||||
config->gpio_pin_mux = 0;
|
||||
config->gpio_pin_pull = EXTINT_PULL_UP;
|
||||
config->filter_input_signal = false;
|
||||
config->detection_criteria = EXTINT_DETECT_FALLING;
|
||||
#if (SAML21) || (SAML22) || (SAMC20) || (SAMC21) || (SAMR30)
|
||||
config->enable_async_edge_detection = false;
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
enum status_code extint_nmi_set_config(
|
||||
const uint8_t nmi_channel,
|
||||
const struct extint_nmi_conf *const config);
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \name Detection testing and clearing (channel)
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Retrieves the edge detection state of a configured channel.
|
||||
*
|
||||
* Reads the current state of a configured channel, and determines
|
||||
* if the detection criteria of the channel has been met.
|
||||
*
|
||||
* \param[in] channel External Interrupt channel index to check
|
||||
*
|
||||
* \return Status of the requested channel's edge detection state.
|
||||
* \retval true If the channel's edge/level detection criteria was met
|
||||
* \retval false If the channel has not detected its configured criteria
|
||||
*/
|
||||
static inline bool extint_chan_is_detected(
|
||||
const uint8_t channel)
|
||||
{
|
||||
Eic *const eic_module = _extint_get_eic_from_channel(channel);
|
||||
uint32_t eic_mask = (1UL << (channel % 32));
|
||||
|
||||
return (eic_module->INTFLAG.reg & eic_mask);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Clears the edge detection state of a configured channel.
|
||||
*
|
||||
* Clears the current state of a configured channel, readying it for
|
||||
* the next level or edge detection.
|
||||
*
|
||||
* \param[in] channel External Interrupt channel index to check
|
||||
*/
|
||||
static inline void extint_chan_clear_detected(
|
||||
const uint8_t channel)
|
||||
{
|
||||
Eic *const eic_module = _extint_get_eic_from_channel(channel);
|
||||
uint32_t eic_mask = (1UL << (channel % 32));
|
||||
|
||||
eic_module->INTFLAG.reg = eic_mask;
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \name Detection Testing and Clearing (NMI)
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Retrieves the edge detection state of a configured NMI channel.
|
||||
*
|
||||
* Reads the current state of a configured NMI channel, and determines
|
||||
* if the detection criteria of the NMI channel has been met.
|
||||
*
|
||||
* \param[in] nmi_channel External Interrupt NMI channel index to check
|
||||
*
|
||||
* \return Status of the requested NMI channel's edge detection state.
|
||||
* \retval true If the NMI channel's edge/level detection criteria was met
|
||||
* \retval false If the NMI channel has not detected its configured criteria
|
||||
*/
|
||||
static inline bool extint_nmi_is_detected(
|
||||
const uint8_t nmi_channel)
|
||||
{
|
||||
Eic *const eic_module = _extint_get_eic_from_nmi(nmi_channel);
|
||||
|
||||
return (eic_module->NMIFLAG.reg & EIC_NMIFLAG_NMI);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Clears the edge detection state of a configured NMI channel.
|
||||
*
|
||||
* Clears the current state of a configured NMI channel, readying it for
|
||||
* the next level or edge detection.
|
||||
*
|
||||
* \param[in] nmi_channel External Interrupt NMI channel index to check
|
||||
*/
|
||||
static inline void extint_nmi_clear_detected(
|
||||
const uint8_t nmi_channel)
|
||||
{
|
||||
Eic *const eic_module = _extint_get_eic_from_nmi(nmi_channel);
|
||||
|
||||
eic_module->NMIFLAG.reg = EIC_NMIFLAG_NMI;
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
#if EXTINT_CALLBACK_MODE == true
|
||||
# include "extint_callback.h"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_extint_extra Extra Information for EXTINT Driver
|
||||
*
|
||||
* \section asfdoc_sam0_extint_extra_acronyms Acronyms
|
||||
* The table below presents the acronyms used in this module:
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Acronym</th>
|
||||
* <th>Description</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>EIC</td>
|
||||
* <td>External Interrupt Controller</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>MUX</td>
|
||||
* <td>Multiplexer</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>NMI</td>
|
||||
* <td>Non-Maskable Interrupt</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_extint_extra_dependencies Dependencies
|
||||
* This driver has the following dependencies:
|
||||
*
|
||||
* - \ref asfdoc_sam0_system_pinmux_group "System Pin Multiplexer Driver"
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_extint_extra_errata Errata
|
||||
* There are no errata related to this driver.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_extint_extra_history Module History
|
||||
* An overview of the module history is presented in the table below, with
|
||||
* details on the enhancements and fixes made to the module since its first
|
||||
* release. The current version of this corresponds to the newest version in
|
||||
* the table.
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Changelog</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>
|
||||
* \li Driver updated to follow driver type convention
|
||||
* \li Removed \c %extint_reset(), \c %extint_disable() and
|
||||
* \c extint_enable() functions. Added internal function
|
||||
* \c %_system_extint_init().
|
||||
* \li Added configuration EXTINT_CLOCK_SOURCE in conf_extint.h
|
||||
* \li Removed configuration EXTINT_CALLBACKS_MAX in conf_extint.h, and
|
||||
* added channel parameter in the register functions
|
||||
* \c %extint_register_callback() and \c %extint_unregister_callback()
|
||||
* </td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Updated interrupt handler to clear interrupt flag before calling
|
||||
* callback function</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Updated initialization function to also enable the digital interface
|
||||
* clock to the module if it is disabled</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Initial Release</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_extint_exqsg Examples for EXTINT Driver
|
||||
*
|
||||
* This is a list of the available Quick Start guides (QSGs) and example
|
||||
* applications for \ref asfdoc_sam0_extint_group.
|
||||
* QSGs are simple examples with step-by-step instructions to configure and
|
||||
* use this driver in a selection of use cases. Note that a QSG can be compiled
|
||||
* as a standalone application or be added to the user application.
|
||||
*
|
||||
* - \subpage asfdoc_sam0_extint_basic_use_case
|
||||
* \if EXTINT_CALLBACK_MODE
|
||||
* - \subpage asfdoc_sam0_extint_callback_use_case
|
||||
* \endif
|
||||
*
|
||||
* \page asfdoc_sam0_extint_document_revision_history Document Revision History
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Doc. Rev.</th>
|
||||
* <th>Date</th>
|
||||
* <th>Comments</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42112E</td>
|
||||
* <td>12/2015</td>
|
||||
* <td>Added support for SAM L21/L22, SAM C21, SAM D09, and SAM DA1</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42112D</td>
|
||||
* <td>12/2014</td>
|
||||
* <td>Added support for SAM R21 and SAM D10/D11</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42112C</td>
|
||||
* <td>01/2014</td>
|
||||
* <td>Added support for SAM D21</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42112B</td>
|
||||
* <td>06/2013</td>
|
||||
* <td>Added additional documentation on the event system. Corrected
|
||||
* documentation typos.</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42112A</td>
|
||||
* <td>06/2013</td>
|
||||
* <td>Initial release</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*/
|
||||
|
||||
#endif
|
||||
|
|
@ -1,232 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM External Interrupt Driver
|
||||
*
|
||||
* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#include "extint.h"
|
||||
#include "extint_callback.h"
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Internal driver device instance struct, declared in the main module driver.
|
||||
*/
|
||||
extern struct _extint_module _extint_dev;
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* This is the number of the channel whose callback is currently running.
|
||||
*/
|
||||
uint8_t _current_channel;
|
||||
|
||||
/**
|
||||
* \brief Registers an asynchronous callback function with the driver.
|
||||
*
|
||||
* Registers an asynchronous callback with the EXTINT driver, fired when a
|
||||
* channel detects the configured channel detection criteria
|
||||
* (e.g. edge or level). Callbacks are fired once for each detected channel.
|
||||
*
|
||||
* \note NMI channel callbacks cannot be registered via this function; the
|
||||
* device's NMI interrupt should be hooked directly in the user
|
||||
* application and the NMI flags manually cleared via
|
||||
* \ref extint_nmi_clear_detected().
|
||||
*
|
||||
* \param[in] callback Pointer to the callback function to register
|
||||
* \param[in] channel Logical channel to register callback for
|
||||
* \param[in] type Type of callback function to register
|
||||
*
|
||||
* \return Status of the registration operation.
|
||||
* \retval STATUS_OK The callback was registered successfully
|
||||
* \retval STATUS_ERR_INVALID_ARG If an invalid callback type was supplied
|
||||
* \retval STATUS_ERR_ALREADY_INITIALIZED Callback function has been
|
||||
* registered, need unregister first
|
||||
*/
|
||||
enum status_code extint_register_callback(
|
||||
const extint_callback_t callback,
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(callback);
|
||||
|
||||
if (type != EXTINT_CALLBACK_TYPE_DETECT) {
|
||||
Assert(false);
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
if (_extint_dev.callbacks[channel] == NULL) {
|
||||
_extint_dev.callbacks[channel] = callback;
|
||||
return STATUS_OK;
|
||||
} else if (_extint_dev.callbacks[channel] == callback) {
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
return STATUS_ERR_ALREADY_INITIALIZED;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Unregisters an asynchronous callback function with the driver.
|
||||
*
|
||||
* Unregisters an asynchronous callback with the EXTINT driver, removing it
|
||||
* from the internal callback registration table.
|
||||
*
|
||||
* \param[in] callback Pointer to the callback function to unregister
|
||||
* \param[in] channel Logical channel to unregister callback for
|
||||
* \param[in] type Type of callback function to unregister
|
||||
*
|
||||
* \return Status of the de-registration operation.
|
||||
* \retval STATUS_OK The callback was unregistered successfully
|
||||
* \retval STATUS_ERR_INVALID_ARG If an invalid callback type was supplied
|
||||
* \retval STATUS_ERR_BAD_ADDRESS No matching entry was found in the
|
||||
* registration table
|
||||
*/
|
||||
enum status_code extint_unregister_callback(
|
||||
const extint_callback_t callback,
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(callback);
|
||||
|
||||
if (type != EXTINT_CALLBACK_TYPE_DETECT) {
|
||||
Assert(false);
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
if (_extint_dev.callbacks[channel] == callback) {
|
||||
_extint_dev.callbacks[channel] = NULL;
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
return STATUS_ERR_BAD_ADDRESS;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enables asynchronous callback generation for a given channel and type.
|
||||
*
|
||||
* Enables asynchronous callbacks for a given logical external interrupt channel
|
||||
* and type. This must be called before an external interrupt channel will
|
||||
* generate callback events.
|
||||
*
|
||||
* \param[in] channel Logical channel to enable callback generation for
|
||||
* \param[in] type Type of callback function callbacks to enable
|
||||
*
|
||||
* \return Status of the callback enable operation.
|
||||
* \retval STATUS_OK The callback was enabled successfully
|
||||
* \retval STATUS_ERR_INVALID_ARG If an invalid callback type was supplied
|
||||
*/
|
||||
enum status_code extint_chan_enable_callback(
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type)
|
||||
{
|
||||
if (type == EXTINT_CALLBACK_TYPE_DETECT) {
|
||||
Eic *const eic = _extint_get_eic_from_channel(channel);
|
||||
|
||||
eic->INTENSET.reg = (1UL << channel);
|
||||
}
|
||||
else {
|
||||
Assert(false);
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disables asynchronous callback generation for a given channel and type.
|
||||
*
|
||||
* Disables asynchronous callbacks for a given logical external interrupt
|
||||
* channel and type.
|
||||
*
|
||||
* \param[in] channel Logical channel to disable callback generation for
|
||||
* \param[in] type Type of callback function callbacks to disable
|
||||
*
|
||||
* \return Status of the callback disable operation.
|
||||
* \retval STATUS_OK The callback was disabled successfully
|
||||
* \retval STATUS_ERR_INVALID_ARG If an invalid callback type was supplied
|
||||
*/
|
||||
enum status_code extint_chan_disable_callback(
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type)
|
||||
{
|
||||
if (type == EXTINT_CALLBACK_TYPE_DETECT) {
|
||||
Eic *const eic = _extint_get_eic_from_channel(channel);
|
||||
|
||||
eic->INTENCLR.reg = (1UL << channel);
|
||||
}
|
||||
else {
|
||||
Assert(false);
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Find what channel caused the callback.
|
||||
*
|
||||
* Can be used in an EXTINT callback function to find what channel caused
|
||||
* the callback in case the same callback is used by multiple channels.
|
||||
*
|
||||
* \return Channel number.
|
||||
*/
|
||||
uint8_t extint_get_current_channel(void)
|
||||
{
|
||||
return _current_channel;
|
||||
}
|
||||
|
||||
/** Handler for the EXTINT hardware module interrupt. */
|
||||
void EIC_Handler(void)
|
||||
{
|
||||
/* Find any triggered channels, run associated callback handlers */
|
||||
for (_current_channel = 0; _current_channel < EIC_NUMBER_OF_INTERRUPTS ; _current_channel++) {
|
||||
if (extint_chan_is_detected(_current_channel)) {
|
||||
/* Clear flag */
|
||||
extint_chan_clear_detected(_current_channel);
|
||||
/* Find any associated callback entries in the callback table */
|
||||
if (_extint_dev.callbacks[_current_channel] != NULL) {
|
||||
/* Run the registered callback */
|
||||
_extint_dev.callbacks[_current_channel]();
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1,108 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM External Interrupt Driver
|
||||
*
|
||||
* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#ifndef EXTINT_CALLBACK_H_INCLUDED
|
||||
#define EXTINT_CALLBACK_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_extint_group
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** \name Callback Configuration and Initialization
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** Enum for the possible callback types for the EXTINT module. */
|
||||
enum extint_callback_type
|
||||
{
|
||||
/** Callback type for when an external interrupt detects the configured
|
||||
* channel criteria (i.e. edge or level detection)
|
||||
*/
|
||||
EXTINT_CALLBACK_TYPE_DETECT,
|
||||
};
|
||||
|
||||
enum status_code extint_register_callback(
|
||||
const extint_callback_t callback,
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type);
|
||||
|
||||
enum status_code extint_unregister_callback(
|
||||
const extint_callback_t callback,
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type);
|
||||
|
||||
uint8_t extint_get_current_channel(void);
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \name Callback Enabling and Disabling (Channel)
|
||||
* @{
|
||||
*/
|
||||
|
||||
enum status_code extint_chan_enable_callback(
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type);
|
||||
|
||||
enum status_code extint_chan_disable_callback(
|
||||
const uint8_t channel,
|
||||
const enum extint_callback_type type);
|
||||
|
||||
/** @} */
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
@ -1,425 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM External Interrupt Driver
|
||||
*
|
||||
* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#include <system.h>
|
||||
#include <system_interrupt.h>
|
||||
#include <extint.h>
|
||||
#include <conf_extint.h>
|
||||
|
||||
#if !defined(EXTINT_CLOCK_SOURCE) || defined(__DOXYGEN__)
|
||||
# warning EXTINT_CLOCK_SOURCE is not defined, assuming GCLK_GENERATOR_0.
|
||||
|
||||
/** Configuration option, setting the EIC clock source which can be used for
|
||||
* EIC edge detection or filtering. This option may be overridden in the module
|
||||
* configuration header file \c conf_extint.h.
|
||||
*/
|
||||
# define EXTINT_CLOCK_SOURCE GCLK_GENERATOR_0
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Internal driver device instance struct.
|
||||
*/
|
||||
struct _extint_module _extint_dev;
|
||||
|
||||
/**
|
||||
* \brief Determin if the general clock is required
|
||||
*
|
||||
* \param[in] filter_input_signal Filter the raw input signal to prevent noise
|
||||
* \param[in] detection_criteria Edge detection mode to use (\ref extint_detect)
|
||||
*/
|
||||
#define _extint_is_gclk_required(filter_input_signal, detection_criteria) \
|
||||
((filter_input_signal) ? true : (\
|
||||
(EXTINT_DETECT_RISING == (detection_criteria)) ? true : (\
|
||||
(EXTINT_DETECT_FALLING == (detection_criteria)) ? true : (\
|
||||
(EXTINT_DETECT_BOTH == (detection_criteria)) ? true : false))))
|
||||
|
||||
static void _extint_enable(void);
|
||||
static void _extint_disable(void);
|
||||
|
||||
/**
|
||||
* \brief Determines if the hardware module(s) are currently synchronizing to the bus.
|
||||
*
|
||||
* Checks to see if the underlying hardware peripheral module(s) are currently
|
||||
* synchronizing across multiple clock domains to the hardware bus, This
|
||||
* function can be used to delay further operations on a module until such time
|
||||
* that it is ready, to prevent blocking delays for synchronization in the
|
||||
* user application.
|
||||
*
|
||||
* \return Synchronization status of the underlying hardware module(s).
|
||||
*
|
||||
* \retval true If the module synchronization is ongoing
|
||||
* \retval false If the module has completed synchronization
|
||||
*/
|
||||
static inline bool extint_is_syncing(void)
|
||||
{
|
||||
Eic *const eics[EIC_INST_NUM] = EIC_INSTS;
|
||||
|
||||
for (uint32_t i = 0; i < EIC_INST_NUM; i++) {
|
||||
if (eics[i]->STATUS.reg & EIC_STATUS_SYNCBUSY) {
|
||||
return true;
|
||||
}
|
||||
}
|
||||
return false;
|
||||
}
|
||||
/**
|
||||
* \internal
|
||||
* \brief Initializes and enables the External Interrupt driver.
|
||||
*
|
||||
* Enable the clocks used by External Interrupt driver.
|
||||
*
|
||||
* Resets the External Interrupt driver, resetting all hardware
|
||||
* module registers to their power-on defaults, then enable it for further use.
|
||||
*
|
||||
* Reset the callback list if callback mode is used.
|
||||
*
|
||||
* This function must be called before attempting to use any NMI or standard
|
||||
* external interrupt channel functions.
|
||||
*
|
||||
* \note When SYSTEM module is used, this function will be invoked by
|
||||
* \ref system_init() automatically if the module is included.
|
||||
*/
|
||||
void _system_extint_init(void);
|
||||
void _system_extint_init(void)
|
||||
{
|
||||
Eic *const eics[EIC_INST_NUM] = EIC_INSTS;
|
||||
|
||||
/* Turn on the digital interface clock */
|
||||
system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBA, PM_APBAMASK_EIC);
|
||||
|
||||
/* Configure the generic clock for the module and enable it */
|
||||
struct system_gclk_chan_config gclk_chan_conf;
|
||||
system_gclk_chan_get_config_defaults(&gclk_chan_conf);
|
||||
gclk_chan_conf.source_generator = EXTINT_CLOCK_SOURCE;
|
||||
system_gclk_chan_set_config(EIC_GCLK_ID, &gclk_chan_conf);
|
||||
|
||||
/* Enable the clock anyway, since when needed it will be requested
|
||||
* by External Interrupt driver */
|
||||
system_gclk_chan_enable(EIC_GCLK_ID);
|
||||
|
||||
/* Reset all EIC hardware modules. */
|
||||
for (uint32_t i = 0; i < EIC_INST_NUM; i++) {
|
||||
eics[i]->CTRL.reg |= EIC_CTRL_SWRST;
|
||||
}
|
||||
|
||||
while (extint_is_syncing()) {
|
||||
/* Wait for all hardware modules to complete synchronization */
|
||||
}
|
||||
|
||||
/* Reset the software module */
|
||||
#if EXTINT_CALLBACK_MODE == true
|
||||
/* Clear callback registration table */
|
||||
for (uint8_t j = 0; j < EIC_NUMBER_OF_INTERRUPTS; j++) {
|
||||
_extint_dev.callbacks[j] = NULL;
|
||||
}
|
||||
system_interrupt_enable(SYSTEM_INTERRUPT_MODULE_EIC);
|
||||
#endif
|
||||
|
||||
/* Enables the driver for further use */
|
||||
_extint_enable();
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief Enables the External Interrupt driver.
|
||||
*
|
||||
* Enables EIC modules.
|
||||
* Registered callback list will not be affected if callback mode is used.
|
||||
*/
|
||||
void _extint_enable(void)
|
||||
{
|
||||
Eic *const eics[EIC_INST_NUM] = EIC_INSTS;
|
||||
|
||||
/* Enable all EIC hardware modules. */
|
||||
for (uint32_t i = 0; i < EIC_INST_NUM; i++) {
|
||||
eics[i]->CTRL.reg |= EIC_CTRL_ENABLE;
|
||||
}
|
||||
|
||||
while (extint_is_syncing()) {
|
||||
/* Wait for all hardware modules to complete synchronization */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* \brief Disables the External Interrupt driver.
|
||||
*
|
||||
* Disables EIC modules that were previously started via a call to
|
||||
* \ref _extint_enable().
|
||||
* Registered callback list will not be affected if callback mode is used.
|
||||
*/
|
||||
void _extint_disable(void)
|
||||
{
|
||||
Eic *const eics[EIC_INST_NUM] = EIC_INSTS;
|
||||
|
||||
/* Disable all EIC hardware modules. */
|
||||
for (uint32_t i = 0; i < EIC_INST_NUM; i++) {
|
||||
eics[i]->CTRL.reg &= ~EIC_CTRL_ENABLE;
|
||||
}
|
||||
|
||||
while (extint_is_syncing()) {
|
||||
/* Wait for all hardware modules to complete synchronization */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Initializes an External Interrupt channel configuration structure to defaults.
|
||||
*
|
||||
* Initializes a given External Interrupt channel configuration structure to a
|
||||
* set of known default values. This function should be called on all new
|
||||
* instances of these configuration structures before being modified by the
|
||||
* user application.
|
||||
*
|
||||
* The default configuration is as follows:
|
||||
* \li Wake the device if an edge detection occurs whilst in sleep
|
||||
* \li Input filtering disabled
|
||||
* \li Internal pull-up enabled
|
||||
* \li Detect falling edges of a signal
|
||||
*
|
||||
* \param[out] config Configuration structure to initialize to default values
|
||||
*/
|
||||
void extint_chan_get_config_defaults(
|
||||
struct extint_chan_conf *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
|
||||
/* Default configuration values */
|
||||
config->gpio_pin = 0;
|
||||
config->gpio_pin_mux = 0;
|
||||
config->gpio_pin_pull = EXTINT_PULL_UP;
|
||||
config->wake_if_sleeping = true;
|
||||
config->filter_input_signal = false;
|
||||
config->detection_criteria = EXTINT_DETECT_FALLING;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Writes an External Interrupt channel configuration to the hardware module.
|
||||
*
|
||||
* Writes out a given configuration of an External Interrupt channel
|
||||
* configuration to the hardware module. If the channel is already configured,
|
||||
* the new configuration will replace the existing one.
|
||||
*
|
||||
* \param[in] channel External Interrupt channel to configure
|
||||
* \param[in] config Configuration settings for the channel
|
||||
|
||||
*/
|
||||
void extint_chan_set_config(
|
||||
const uint8_t channel,
|
||||
const struct extint_chan_conf *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
/* Sanity check clock requirements */
|
||||
Assert(!(!system_gclk_gen_is_enabled(EXTINT_CLOCK_SOURCE) &&
|
||||
_extint_is_gclk_required(config->filter_input_signal,
|
||||
config->detection_criteria)));
|
||||
|
||||
struct system_pinmux_config pinmux_config;
|
||||
system_pinmux_get_config_defaults(&pinmux_config);
|
||||
|
||||
pinmux_config.mux_position = config->gpio_pin_mux;
|
||||
pinmux_config.direction = SYSTEM_PINMUX_PIN_DIR_INPUT;
|
||||
pinmux_config.input_pull = (enum system_pinmux_pin_pull)config->gpio_pin_pull;
|
||||
system_pinmux_pin_set_config(config->gpio_pin, &pinmux_config);
|
||||
|
||||
/* Get a pointer to the module hardware instance */
|
||||
Eic *const EIC_module = _extint_get_eic_from_channel(channel);
|
||||
|
||||
uint32_t config_pos = (4 * (channel % 8));
|
||||
uint32_t new_config;
|
||||
|
||||
/* Determine the channel's new edge detection configuration */
|
||||
new_config = (config->detection_criteria << EIC_CONFIG_SENSE0_Pos);
|
||||
|
||||
/* Enable the hardware signal filter if requested in the config */
|
||||
if (config->filter_input_signal) {
|
||||
new_config |= EIC_CONFIG_FILTEN0;
|
||||
}
|
||||
|
||||
/* Clear the existing and set the new channel configuration */
|
||||
EIC_module->CONFIG[channel / 8].reg
|
||||
= (EIC_module->CONFIG[channel / 8].reg &
|
||||
~((EIC_CONFIG_SENSE0_Msk | EIC_CONFIG_FILTEN0) << config_pos)) |
|
||||
(new_config << config_pos);
|
||||
|
||||
/* Set the channel's new wake up mode setting */
|
||||
if (config->wake_if_sleeping) {
|
||||
EIC_module->WAKEUP.reg |= (1UL << channel);
|
||||
} else {
|
||||
EIC_module->WAKEUP.reg &= ~(1UL << channel);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Writes an External Interrupt NMI channel configuration to the hardware module.
|
||||
*
|
||||
* Writes out a given configuration of an External Interrupt NMI channel
|
||||
* configuration to the hardware module. If the channel is already configured,
|
||||
* the new configuration will replace the existing one.
|
||||
*
|
||||
* \param[in] nmi_channel External Interrupt NMI channel to configure
|
||||
* \param[in] config Configuration settings for the channel
|
||||
*
|
||||
* \returns Status code indicating the success or failure of the request.
|
||||
* \retval STATUS_OK Configuration succeeded
|
||||
* \retval STATUS_ERR_PIN_MUX_INVALID An invalid pinmux value was supplied
|
||||
* \retval STATUS_ERR_BAD_FORMAT An invalid detection mode was requested
|
||||
*/
|
||||
enum status_code extint_nmi_set_config(
|
||||
const uint8_t nmi_channel,
|
||||
const struct extint_nmi_conf *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
/* Sanity check clock requirements */
|
||||
Assert(!(!system_gclk_gen_is_enabled(EXTINT_CLOCK_SOURCE) &&
|
||||
_extint_is_gclk_required(config->filter_input_signal,
|
||||
config->detection_criteria)));
|
||||
|
||||
struct system_pinmux_config pinmux_config;
|
||||
system_pinmux_get_config_defaults(&pinmux_config);
|
||||
|
||||
pinmux_config.mux_position = config->gpio_pin_mux;
|
||||
pinmux_config.direction = SYSTEM_PINMUX_PIN_DIR_INPUT;
|
||||
pinmux_config.input_pull = SYSTEM_PINMUX_PIN_PULL_UP;
|
||||
pinmux_config.input_pull = (enum system_pinmux_pin_pull)config->gpio_pin_pull;
|
||||
system_pinmux_pin_set_config(config->gpio_pin, &pinmux_config);
|
||||
|
||||
/* Get a pointer to the module hardware instance */
|
||||
Eic *const EIC_module = _extint_get_eic_from_channel(nmi_channel);
|
||||
|
||||
uint32_t new_config;
|
||||
|
||||
/* Determine the NMI's new edge detection configuration */
|
||||
new_config = (config->detection_criteria << EIC_NMICTRL_NMISENSE_Pos);
|
||||
|
||||
/* Enable the hardware signal filter if requested in the config */
|
||||
if (config->filter_input_signal) {
|
||||
new_config |= EIC_NMICTRL_NMIFILTEN;
|
||||
}
|
||||
|
||||
/* Disable EIC and general clock to configure NMI */
|
||||
_extint_disable();
|
||||
system_gclk_chan_disable(EIC_GCLK_ID);
|
||||
|
||||
EIC_module->NMICTRL.reg = new_config;
|
||||
|
||||
/* Enable the general clock and EIC after configure NMI */
|
||||
system_gclk_chan_enable(EIC_GCLK_ID);
|
||||
_extint_enable();
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enables an External Interrupt event output.
|
||||
*
|
||||
* Enables one or more output events from the External Interrupt module. See
|
||||
* \ref extint_events "here" for a list of events this module supports.
|
||||
*
|
||||
* \note Events cannot be altered while the module is enabled.
|
||||
*
|
||||
* \param[in] events Struct containing flags of events to enable
|
||||
*/
|
||||
void extint_enable_events(
|
||||
struct extint_events *const events)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(events);
|
||||
|
||||
/* Array of available EICs. */
|
||||
Eic *const eics[EIC_INST_NUM] = EIC_INSTS;
|
||||
|
||||
/* Update the event control register for each physical EIC instance */
|
||||
for (uint32_t i = 0; i < EIC_INST_NUM; i++) {
|
||||
uint32_t event_mask = 0;
|
||||
|
||||
/* Create an enable mask for the current EIC module */
|
||||
for (uint32_t j = 0; j < 32; j++) {
|
||||
if (events->generate_event_on_detect[(32 * i) + j]) {
|
||||
event_mask |= (1UL << j);
|
||||
}
|
||||
}
|
||||
|
||||
/* Enable the masked events */
|
||||
eics[i]->EVCTRL.reg |= event_mask;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disables an External Interrupt event output.
|
||||
*
|
||||
* Disables one or more output events from the External Interrupt module. See
|
||||
* \ref extint_events "here" for a list of events this module supports.
|
||||
*
|
||||
* \note Events cannot be altered while the module is enabled.
|
||||
*
|
||||
* \param[in] events Struct containing flags of events to disable
|
||||
*/
|
||||
void extint_disable_events(
|
||||
struct extint_events *const events)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(events);
|
||||
|
||||
/* Array of available EICs. */
|
||||
Eic *const eics[EIC_INST_NUM] = EIC_INSTS;
|
||||
|
||||
/* Update the event control register for each physical EIC instance */
|
||||
for (uint32_t i = 0; i < EIC_INST_NUM; i++) {
|
||||
uint32_t event_mask = 0;
|
||||
|
||||
/* Create a disable mask for the current EIC module */
|
||||
for (uint32_t j = 0; j < 32; j++) {
|
||||
if (events->generate_event_on_detect[(32 * i) + j]) {
|
||||
event_mask |= (1UL << j);
|
||||
}
|
||||
}
|
||||
|
||||
/* Disable the masked events */
|
||||
eics[i]->EVCTRL.reg &= ~event_mask;
|
||||
}
|
||||
}
|
||||
|
|
@ -1,109 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM GPIO Port Driver
|
||||
*
|
||||
* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#include <port.h>
|
||||
|
||||
/**
|
||||
* \brief Writes a Port pin configuration to the hardware module.
|
||||
*
|
||||
* Writes out a given configuration of a Port pin configuration to the hardware
|
||||
* module.
|
||||
*
|
||||
* \note If the pin direction is set as an output, the pull-up/pull-down input
|
||||
* configuration setting is ignored.
|
||||
*
|
||||
* \param[in] gpio_pin Index of the GPIO pin to configure
|
||||
* \param[in] config Configuration settings for the pin
|
||||
*/
|
||||
void port_pin_set_config(
|
||||
const uint8_t gpio_pin,
|
||||
const struct port_config *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
|
||||
struct system_pinmux_config pinmux_config;
|
||||
system_pinmux_get_config_defaults(&pinmux_config);
|
||||
|
||||
pinmux_config.mux_position = SYSTEM_PINMUX_GPIO;
|
||||
pinmux_config.direction = (enum system_pinmux_pin_dir)config->direction;
|
||||
pinmux_config.input_pull = (enum system_pinmux_pin_pull)config->input_pull;
|
||||
pinmux_config.powersave = config->powersave;
|
||||
|
||||
system_pinmux_pin_set_config(gpio_pin, &pinmux_config);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Writes a Port group configuration group to the hardware module.
|
||||
*
|
||||
* Writes out a given configuration of a Port group configuration to the
|
||||
* hardware module.
|
||||
*
|
||||
* \note If the pin direction is set as an output, the pull-up/pull-down input
|
||||
* configuration setting is ignored.
|
||||
*
|
||||
* \param[out] port Base of the PORT module to write to
|
||||
* \param[in] mask Mask of the port pin(s) to configure
|
||||
* \param[in] config Configuration settings for the pin group
|
||||
*/
|
||||
void port_group_set_config(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const struct port_config *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(port);
|
||||
Assert(config);
|
||||
|
||||
struct system_pinmux_config pinmux_config;
|
||||
system_pinmux_get_config_defaults(&pinmux_config);
|
||||
|
||||
pinmux_config.mux_position = SYSTEM_PINMUX_GPIO;
|
||||
pinmux_config.direction = (enum system_pinmux_pin_dir)config->direction;
|
||||
pinmux_config.input_pull = (enum system_pinmux_pin_pull)config->input_pull;
|
||||
pinmux_config.powersave = config->powersave;
|
||||
|
||||
system_pinmux_group_set_config(port, mask, &pinmux_config);
|
||||
}
|
||||
|
|
@ -1,792 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM GPIO Port Driver
|
||||
*
|
||||
* Copyright (C) 2012-2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#ifndef PORT_H_INCLUDED
|
||||
#define PORT_H_INCLUDED
|
||||
|
||||
/**
|
||||
* \defgroup asfdoc_sam0_port_group SAM Port (PORT) Driver
|
||||
*
|
||||
* This driver for Atmel® | SMART ARM®-based microcontrollers provides
|
||||
* an interface for the configuration and management of the device's General
|
||||
* Purpose Input/Output (GPIO) pin functionality, for manual pin state reading
|
||||
* and writing.
|
||||
*
|
||||
* The following peripheral is used by this module:
|
||||
* - PORT (GPIO Management)
|
||||
*
|
||||
* The following devices can use this module:
|
||||
* - Atmel | SMART SAM D20/D21
|
||||
* - Atmel | SMART SAM R21
|
||||
* - Atmel | SMART SAM D09/D10/D11
|
||||
* - Atmel | SMART SAM L21/L22
|
||||
* - Atmel | SMART SAM DA1
|
||||
* - Atmel | SMART SAM C20/C21
|
||||
* - Atmel | SMART SAM R30
|
||||
*
|
||||
* The outline of this documentation is as follows:
|
||||
* - \ref asfdoc_sam0_port_prerequisites
|
||||
* - \ref asfdoc_sam0_port_module_overview
|
||||
* - \ref asfdoc_sam0_port_special_considerations
|
||||
* - \ref asfdoc_sam0_port_extra_info
|
||||
* - \ref asfdoc_sam0_port_examples
|
||||
* - \ref asfdoc_sam0_port_api_overview
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_port_prerequisites Prerequisites
|
||||
*
|
||||
* There are no prerequisites for this module.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_port_module_overview Module Overview
|
||||
*
|
||||
* The device GPIO (PORT) module provides an interface between the user
|
||||
* application logic and external hardware peripherals, when general pin state
|
||||
* manipulation is required. This driver provides an easy-to-use interface to
|
||||
* the physical pin input samplers and output drivers, so that pins can be read
|
||||
* from or written to for general purpose external hardware control.
|
||||
*
|
||||
* \subsection asfdoc_sam0_port_features Driver Feature Macro Definition
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Driver Feature Macro</th>
|
||||
* <th>Supported devices</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>FEATURE_PORT_INPUT_EVENT</td>
|
||||
* <td>SAM L21/L22/C20/C21/R30</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
* \note The specific features are only available in the driver when the
|
||||
* selected device supports those features.
|
||||
*
|
||||
* \subsection asfdoc_sam0_port_module_overview_pin_numbering Physical and Logical GPIO Pins
|
||||
* SAM devices use two naming conventions for the I/O pins in the device; one
|
||||
* physical and one logical. Each physical pin on a device package is assigned
|
||||
* both a physical port and pin identifier (e.g. "PORTA.0") as well as a
|
||||
* monotonically incrementing logical GPIO number (e.g. "GPIO0"). While the
|
||||
* former is used to map physical pins to their physical internal device module
|
||||
* counterparts, for simplicity the design of this driver uses the logical GPIO
|
||||
* numbers instead.
|
||||
*
|
||||
* \subsection asfdoc_sam0_port_module_overview_physical Physical Connection
|
||||
*
|
||||
* \ref asfdoc_sam0_port_module_int_connections "The diagram below" shows how
|
||||
* this module is interconnected within the device.
|
||||
*
|
||||
* \anchor asfdoc_sam0_port_module_int_connections
|
||||
* \dot
|
||||
* digraph overview {
|
||||
* node [label="Port Pad" shape=square] pad;
|
||||
*
|
||||
* subgraph driver {
|
||||
* node [label="Peripheral MUX" shape=trapezium] pinmux;
|
||||
* node [label="GPIO Module" shape=ellipse] gpio;
|
||||
* node [label="Other Peripheral Modules" shape=ellipse style=filled fillcolor=lightgray] peripherals;
|
||||
* }
|
||||
*
|
||||
* pinmux -> gpio;
|
||||
* pad -> pinmux;
|
||||
* pinmux -> peripherals;
|
||||
* }
|
||||
* \enddot
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_port_special_considerations Special Considerations
|
||||
*
|
||||
* The SAM port pin input sampler can be disabled when the pin is configured
|
||||
* in pure output mode to save power; reading the pin state of a pin configured
|
||||
* in output-only mode will read the logical output state that was last set.
|
||||
*
|
||||
* \section asfdoc_sam0_port_extra_info Extra Information
|
||||
*
|
||||
* For extra information, see \ref asfdoc_sam0_port_extra. This includes:
|
||||
* - \ref asfdoc_sam0_port_extra_acronyms
|
||||
* - \ref asfdoc_sam0_port_extra_dependencies
|
||||
* - \ref asfdoc_sam0_port_extra_errata
|
||||
* - \ref asfdoc_sam0_port_extra_history
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_port_examples Examples
|
||||
*
|
||||
* For a list of examples related to this driver, see
|
||||
* \ref asfdoc_sam0_port_exqsg.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_port_api_overview API Overview
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include <compiler.h>
|
||||
#include <pinmux.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \name Driver Feature Definition
|
||||
* Define port features set according to different device family.
|
||||
* @{
|
||||
*/
|
||||
#if (SAML21) || (SAML22) || (SAMC20) || (SAMC21) || (SAMR30) || defined(__DOXYGEN__)
|
||||
/** Event input control feature support for PORT group. */
|
||||
# define FEATURE_PORT_INPUT_EVENT
|
||||
#endif
|
||||
/*@}*/
|
||||
|
||||
/** \name PORT Alias Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** Convenience definition for GPIO module group A on the device (if
|
||||
* available). */
|
||||
#if (PORT_GROUPS > 0) || defined(__DOXYGEN__)
|
||||
# define PORTA PORT->Group[0]
|
||||
#endif
|
||||
|
||||
#if (PORT_GROUPS > 1) || defined(__DOXYGEN__)
|
||||
/** Convenience definition for GPIO module group B on the device (if
|
||||
* available). */
|
||||
# define PORTB PORT->Group[1]
|
||||
#endif
|
||||
|
||||
#if (PORT_GROUPS > 2) || defined(__DOXYGEN__)
|
||||
/** Convenience definition for GPIO module group C on the device (if
|
||||
* available). */
|
||||
# define PORTC PORT->Group[2]
|
||||
#endif
|
||||
|
||||
#if (PORT_GROUPS > 3) || defined(__DOXYGEN__)
|
||||
/** Convenience definition for GPIO module group D on the device (if
|
||||
* available). */
|
||||
# define PORTD PORT->Group[3]
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \brief Port pin direction configuration enum.
|
||||
*
|
||||
* Enum for the possible pin direction settings of the port pin configuration
|
||||
* structure, to indicate the direction the pin should use.
|
||||
*/
|
||||
enum port_pin_dir {
|
||||
/** The pin's input buffer should be enabled, so that the pin state can
|
||||
* be read */
|
||||
PORT_PIN_DIR_INPUT = SYSTEM_PINMUX_PIN_DIR_INPUT,
|
||||
/** The pin's output buffer should be enabled, so that the pin state can
|
||||
* be set */
|
||||
PORT_PIN_DIR_OUTPUT = SYSTEM_PINMUX_PIN_DIR_OUTPUT,
|
||||
/** The pin's output and input buffers should be enabled, so that the pin
|
||||
* state can be set and read back */
|
||||
PORT_PIN_DIR_OUTPUT_WTH_READBACK = SYSTEM_PINMUX_PIN_DIR_OUTPUT_WITH_READBACK,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Port pin input pull configuration enum.
|
||||
*
|
||||
* Enum for the possible pin pull settings of the port pin configuration
|
||||
* structure, to indicate the type of logic level pull the pin should use.
|
||||
*/
|
||||
enum port_pin_pull {
|
||||
/** No logical pull should be applied to the pin */
|
||||
PORT_PIN_PULL_NONE = SYSTEM_PINMUX_PIN_PULL_NONE,
|
||||
/** Pin should be pulled up when idle */
|
||||
PORT_PIN_PULL_UP = SYSTEM_PINMUX_PIN_PULL_UP,
|
||||
/** Pin should be pulled down when idle */
|
||||
PORT_PIN_PULL_DOWN = SYSTEM_PINMUX_PIN_PULL_DOWN,
|
||||
};
|
||||
|
||||
#ifdef FEATURE_PORT_INPUT_EVENT
|
||||
/**
|
||||
* \brief Port input event action.
|
||||
*
|
||||
* List of port input events action on pin.
|
||||
*/
|
||||
enum port_input_event_action {
|
||||
/** Event out to pin */
|
||||
PORT_INPUT_EVENT_ACTION_OUT = 0,
|
||||
/** Set output register of pin on event */
|
||||
PORT_INPUT_EVENT_ACTION_SET,
|
||||
/** Clear output register pin on event */
|
||||
PORT_INPUT_EVENT_ACTION_CLR,
|
||||
/** Toggle output register pin on event */
|
||||
PORT_INPUT_EVENT_ACTION_TGL,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Port input event.
|
||||
*
|
||||
* List of port input events.
|
||||
*/
|
||||
enum port_input_event{
|
||||
/** Port input event 0 */
|
||||
PORT_INPUT_EVENT_0 = 0,
|
||||
/** Port input event 1 */
|
||||
PORT_INPUT_EVENT_1 = 1,
|
||||
/** Port input event 2 */
|
||||
PORT_INPUT_EVENT_2 = 2,
|
||||
/** Port input event 3 */
|
||||
PORT_INPUT_EVENT_3 = 3,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Port input event configuration structure.
|
||||
*
|
||||
* Configuration structure for a port input event.
|
||||
*/
|
||||
struct port_input_event_config{
|
||||
/** Port input event action */
|
||||
enum port_input_event_action action;
|
||||
/** GPIO pin */
|
||||
uint8_t gpio_pin;
|
||||
};
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief Port pin configuration structure.
|
||||
*
|
||||
* Configuration structure for a port pin instance. This structure should be
|
||||
* initialized by the \ref port_get_config_defaults() function before being
|
||||
* modified by the user application.
|
||||
*/
|
||||
struct port_config {
|
||||
/** Port buffer input/output direction */
|
||||
enum port_pin_dir direction;
|
||||
|
||||
/** Port pull-up/pull-down for input pins */
|
||||
enum port_pin_pull input_pull;
|
||||
|
||||
/** Enable lowest possible powerstate on the pin
|
||||
*
|
||||
* \note All other configurations will be ignored, the pin will be disabled.
|
||||
*/
|
||||
bool powersave;
|
||||
};
|
||||
|
||||
/** \name State Reading/Writing (Physical Group Orientated)
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Retrieves the PORT module group instance from a given GPIO pin number.
|
||||
*
|
||||
* Retrieves the PORT module group instance associated with a given logical
|
||||
* GPIO pin number.
|
||||
*
|
||||
* \param[in] gpio_pin Index of the GPIO pin to convert
|
||||
*
|
||||
* \return Base address of the associated PORT module.
|
||||
*/
|
||||
static inline PortGroup* port_get_group_from_gpio_pin(
|
||||
const uint8_t gpio_pin)
|
||||
{
|
||||
return system_pinmux_get_group_from_gpio_pin(gpio_pin);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Retrieves the state of a group of port pins that are configured as inputs.
|
||||
*
|
||||
* Reads the current logic level of a port module's pins and returns the
|
||||
* current levels as a bitmask.
|
||||
*
|
||||
* \param[in] port Base of the PORT module to read from
|
||||
* \param[in] mask Mask of the port pin(s) to read
|
||||
*
|
||||
* \return Status of the port pin(s) input buffers.
|
||||
*/
|
||||
static inline uint32_t port_group_get_input_level(
|
||||
const PortGroup *const port,
|
||||
const uint32_t mask)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(port);
|
||||
|
||||
return (port->IN.reg & mask);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Retrieves the state of a group of port pins that are configured as outputs.
|
||||
*
|
||||
* Reads the current logical output level of a port module's pins and returns
|
||||
* the current levels as a bitmask.
|
||||
*
|
||||
* \param[in] port Base of the PORT module to read from
|
||||
* \param[in] mask Mask of the port pin(s) to read
|
||||
*
|
||||
* \return Status of the port pin(s) output buffers.
|
||||
*/
|
||||
static inline uint32_t port_group_get_output_level(
|
||||
const PortGroup *const port,
|
||||
const uint32_t mask)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(port);
|
||||
|
||||
return (port->OUT.reg & mask);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Sets the state of a group of port pins that are configured as outputs.
|
||||
*
|
||||
* Sets the current output level of a port module's pins to a given logic
|
||||
* level.
|
||||
*
|
||||
* \param[out] port Base of the PORT module to write to
|
||||
* \param[in] mask Mask of the port pin(s) to change
|
||||
* \param[in] level_mask Mask of the port level(s) to set
|
||||
*/
|
||||
static inline void port_group_set_output_level(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const uint32_t level_mask)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(port);
|
||||
|
||||
port->OUTSET.reg = (mask & level_mask);
|
||||
port->OUTCLR.reg = (mask & ~level_mask);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Toggles the state of a group of port pins that are configured as an outputs.
|
||||
*
|
||||
* Toggles the current output levels of a port module's pins.
|
||||
*
|
||||
* \param[out] port Base of the PORT module to write to
|
||||
* \param[in] mask Mask of the port pin(s) to toggle
|
||||
*/
|
||||
static inline void port_group_toggle_output_level(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(port);
|
||||
|
||||
port->OUTTGL.reg = mask;
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \name Configuration and Initialization
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Initializes a Port pin/group configuration structure to defaults.
|
||||
*
|
||||
* Initializes a given Port pin/group configuration structure to a set of
|
||||
* known default values. This function should be called on all new
|
||||
* instances of these configuration structures before being modified by the
|
||||
* user application.
|
||||
*
|
||||
* The default configuration is as follows:
|
||||
* \li Input mode with internal pull-up enabled
|
||||
*
|
||||
* \param[out] config Configuration structure to initialize to default values
|
||||
*/
|
||||
static inline void port_get_config_defaults(
|
||||
struct port_config *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
|
||||
/* Default configuration values */
|
||||
config->direction = PORT_PIN_DIR_INPUT;
|
||||
config->input_pull = PORT_PIN_PULL_UP;
|
||||
config->powersave = false;
|
||||
}
|
||||
|
||||
void port_pin_set_config(
|
||||
const uint8_t gpio_pin,
|
||||
const struct port_config *const config);
|
||||
|
||||
void port_group_set_config(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const struct port_config *const config);
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \name State Reading/Writing (Logical Pin Orientated)
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Retrieves the state of a port pin that is configured as an input.
|
||||
*
|
||||
* Reads the current logic level of a port pin and returns the current
|
||||
* level as a Boolean value.
|
||||
*
|
||||
* \param[in] gpio_pin Index of the GPIO pin to read
|
||||
*
|
||||
* \return Status of the port pin's input buffer.
|
||||
*/
|
||||
static inline bool port_pin_get_input_level(
|
||||
const uint8_t gpio_pin)
|
||||
{
|
||||
PortGroup *const port_base = port_get_group_from_gpio_pin(gpio_pin);
|
||||
uint32_t pin_mask = (1UL << (gpio_pin % 32));
|
||||
|
||||
return (port_base->IN.reg & pin_mask);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Retrieves the state of a port pin that is configured as an output.
|
||||
*
|
||||
* Reads the current logical output level of a port pin and returns the current
|
||||
* level as a Boolean value.
|
||||
*
|
||||
* \param[in] gpio_pin Index of the GPIO pin to read
|
||||
*
|
||||
* \return Status of the port pin's output buffer.
|
||||
*/
|
||||
static inline bool port_pin_get_output_level(
|
||||
const uint8_t gpio_pin)
|
||||
{
|
||||
PortGroup *const port_base = port_get_group_from_gpio_pin(gpio_pin);
|
||||
uint32_t pin_mask = (1UL << (gpio_pin % 32));
|
||||
|
||||
return (port_base->OUT.reg & pin_mask);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Sets the state of a port pin that is configured as an output.
|
||||
*
|
||||
* Sets the current output level of a port pin to a given logic level.
|
||||
*
|
||||
* \param[in] gpio_pin Index of the GPIO pin to write to
|
||||
* \param[in] level Logical level to set the given pin to
|
||||
*/
|
||||
static inline void port_pin_set_output_level(
|
||||
const uint8_t gpio_pin,
|
||||
const bool level)
|
||||
{
|
||||
PortGroup *const port_base = port_get_group_from_gpio_pin(gpio_pin);
|
||||
uint32_t pin_mask = (1UL << (gpio_pin % 32));
|
||||
|
||||
/* Set the pin to high or low atomically based on the requested level */
|
||||
if (level) {
|
||||
port_base->OUTSET.reg = pin_mask;
|
||||
} else {
|
||||
port_base->OUTCLR.reg = pin_mask;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Toggles the state of a port pin that is configured as an output.
|
||||
*
|
||||
* Toggles the current output level of a port pin.
|
||||
*
|
||||
* \param[in] gpio_pin Index of the GPIO pin to toggle
|
||||
*/
|
||||
static inline void port_pin_toggle_output_level(
|
||||
const uint8_t gpio_pin)
|
||||
{
|
||||
PortGroup *const port_base = port_get_group_from_gpio_pin(gpio_pin);
|
||||
uint32_t pin_mask = (1UL << (gpio_pin % 32));
|
||||
|
||||
/* Toggle pin output level */
|
||||
port_base->OUTTGL.reg = pin_mask;
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef FEATURE_PORT_INPUT_EVENT
|
||||
|
||||
/** \name Port Input Event
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Enable the port event input.
|
||||
*
|
||||
* Enable the port event input with the given pin and event.
|
||||
*
|
||||
* \param[in] gpio_pin Index of the GPIO pin
|
||||
* \param[in] n Port input event
|
||||
*
|
||||
* \retval STATUS_ERR_INVALID_ARG Invalid parameter
|
||||
* \retval STATUS_OK Successfully
|
||||
*/
|
||||
static inline enum status_code port_enable_input_event(
|
||||
const uint8_t gpio_pin,
|
||||
const enum port_input_event n)
|
||||
{
|
||||
PortGroup *const port_base = port_get_group_from_gpio_pin(gpio_pin);
|
||||
switch (n) {
|
||||
case PORT_INPUT_EVENT_0:
|
||||
port_base->EVCTRL.reg |= PORT_EVCTRL_PORTEI0;
|
||||
break;
|
||||
case PORT_INPUT_EVENT_1:
|
||||
port_base->EVCTRL.reg |= PORT_EVCTRL_PORTEI1;
|
||||
break;
|
||||
case PORT_INPUT_EVENT_2:
|
||||
port_base->EVCTRL.reg |= PORT_EVCTRL_PORTEI2;
|
||||
break;
|
||||
case PORT_INPUT_EVENT_3:
|
||||
port_base->EVCTRL.reg |= PORT_EVCTRL_PORTEI3;
|
||||
break;
|
||||
default:
|
||||
Assert(false);
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disable the port event input.
|
||||
*
|
||||
* Disable the port event input with the given pin and event.
|
||||
*
|
||||
* \param[in] gpio_pin Index of the GPIO pin
|
||||
* \param[in] gpio_pin Port input event
|
||||
*
|
||||
* \retval STATUS_ERR_INVALID_ARG Invalid parameter
|
||||
* \retval STATUS_OK Successfully
|
||||
*/
|
||||
static inline enum status_code port_disable_input_event(
|
||||
const uint8_t gpio_pin,
|
||||
const enum port_input_event n)
|
||||
{
|
||||
PortGroup *const port_base = port_get_group_from_gpio_pin(gpio_pin);
|
||||
switch (n) {
|
||||
case PORT_INPUT_EVENT_0:
|
||||
port_base->EVCTRL.reg &= ~PORT_EVCTRL_PORTEI0;
|
||||
break;
|
||||
case PORT_INPUT_EVENT_1:
|
||||
port_base->EVCTRL.reg &= ~PORT_EVCTRL_PORTEI1;
|
||||
break;
|
||||
case PORT_INPUT_EVENT_2:
|
||||
port_base->EVCTRL.reg &= ~PORT_EVCTRL_PORTEI2;
|
||||
break;
|
||||
case PORT_INPUT_EVENT_3:
|
||||
port_base->EVCTRL.reg &= ~PORT_EVCTRL_PORTEI3;
|
||||
break;
|
||||
default:
|
||||
Assert(false);
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Retrieve the default configuration for port input event.
|
||||
*
|
||||
* Fills a configuration structure with the default configuration for port input event:
|
||||
* - Event output to pin
|
||||
* - Event action to be executed on PIN 0
|
||||
*
|
||||
* \param[out] config Configuration structure to fill with default values
|
||||
*/
|
||||
static inline void port_input_event_get_config_defaults(
|
||||
struct port_input_event_config *const config)
|
||||
{
|
||||
Assert(config);
|
||||
config->action = PORT_INPUT_EVENT_ACTION_OUT;
|
||||
config->gpio_pin = 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Configure port input event.
|
||||
*
|
||||
* Configures port input event with the given configuration settings.
|
||||
*
|
||||
* \param[in] config Port input even configuration structure containing the new config
|
||||
*
|
||||
* \retval STATUS_ERR_INVALID_ARG Invalid parameter
|
||||
* \retval STATUS_OK Successfully
|
||||
*/
|
||||
|
||||
static inline enum status_code port_input_event_set_config(
|
||||
const enum port_input_event n,
|
||||
struct port_input_event_config *const config)
|
||||
{
|
||||
Assert(config);
|
||||
PortGroup *const port_base = port_get_group_from_gpio_pin(config->gpio_pin);
|
||||
uint8_t pin_index = config->gpio_pin % 32;
|
||||
struct port_config pin_conf;
|
||||
|
||||
port_get_config_defaults(&pin_conf);
|
||||
/* Configure the GPIO pin as outputs*/
|
||||
pin_conf.direction = PORT_PIN_DIR_OUTPUT;
|
||||
port_pin_set_config(config->gpio_pin, &pin_conf);
|
||||
|
||||
switch (n) {
|
||||
case PORT_INPUT_EVENT_0:
|
||||
port_base->EVCTRL.reg |= PORT_EVCTRL_EVACT0(config->action)
|
||||
| PORT_EVCTRL_PID0(pin_index);
|
||||
break;
|
||||
case PORT_INPUT_EVENT_1:
|
||||
port_base->EVCTRL.reg |= PORT_EVCTRL_EVACT1(config->action)
|
||||
| PORT_EVCTRL_PID1(pin_index);
|
||||
break;
|
||||
case PORT_INPUT_EVENT_2:
|
||||
port_base->EVCTRL.reg |= PORT_EVCTRL_EVACT2(config->action)
|
||||
| PORT_EVCTRL_PID2(pin_index);
|
||||
break;
|
||||
case PORT_INPUT_EVENT_3:
|
||||
port_base->EVCTRL.reg |= PORT_EVCTRL_EVACT3(config->action)
|
||||
| PORT_EVCTRL_PID3(pin_index);
|
||||
break;
|
||||
default:
|
||||
Assert(false);
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_port_extra Extra Information for PORT Driver
|
||||
*
|
||||
* \section asfdoc_sam0_port_extra_acronyms Acronyms
|
||||
* Below is a table listing the acronyms used in this module, along with their
|
||||
* intended meanings.
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Acronym</th>
|
||||
* <th>Description</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>GPIO</td>
|
||||
* <td>General Purpose Input/Output</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>MUX</td>
|
||||
* <td>Multiplexer</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_port_extra_dependencies Dependencies
|
||||
* This driver has the following dependencies:
|
||||
*
|
||||
* - \ref asfdoc_sam0_system_pinmux_group "System Pin Multiplexer Driver"
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_port_extra_errata Errata
|
||||
* There are no errata related to this driver.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_port_extra_history Module History
|
||||
* An overview of the module history is presented in the table below, with
|
||||
* details on the enhancements and fixes made to the module since its first
|
||||
* release. The current version of this corresponds to the newest version in
|
||||
* the table.
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Changelog</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Added input event feature</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Initial release</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_port_exqsg Examples for PORT Driver
|
||||
*
|
||||
* This is a list of the available Quick Start guides (QSGs) and example
|
||||
* applications for \ref asfdoc_sam0_port_group. QSGs are simple examples with
|
||||
* step-by-step instructions to configure and use this driver in a selection of
|
||||
* use cases. Note that a QSG can be compiled as a standalone application or be
|
||||
* added to the user application.
|
||||
*
|
||||
* - \subpage asfdoc_sam0_port_basic_use_case
|
||||
*
|
||||
* \page asfdoc_sam0_port_document_revision_history Document Revision History
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Doc. Rev.</td>
|
||||
* <th>Date</td>
|
||||
* <th>Comments</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42113E</td>
|
||||
* <td>12/2015</td>
|
||||
* <td>Added input event feature.
|
||||
* Added support for SAM L21/L22, SAM C21, SAM D09, SAMR30 and SAM DA1.</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42113D</td>
|
||||
* <td>12/2014</td>
|
||||
* <td>Added support for SAM R21 and SAM D10/D11</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42113C</td>
|
||||
* <td>01/2014</td>
|
||||
* <td>Added support for SAM D21</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42113B</td>
|
||||
* <td>06/2013</td>
|
||||
* <td>Corrected documentation typos</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42113A</td>
|
||||
* <td>06/2013</td>
|
||||
* <td>Initial document release</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*/
|
||||
|
||||
#endif
|
||||
|
|
@ -1,108 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM GPIO Port Driver Quick Start
|
||||
*
|
||||
* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_port_basic_use_case Quick Start Guide for PORT - Basic
|
||||
*
|
||||
* In this use case, the PORT module is configured for:
|
||||
* \li One pin in input mode, with pull-up enabled
|
||||
* \li One pin in output mode
|
||||
*
|
||||
* This use case sets up the PORT to read the current state of a GPIO pin set as
|
||||
* an input, and mirrors the opposite logical state on a pin configured as an
|
||||
* output.
|
||||
*
|
||||
* \section asfdoc_sam0_port_basic_use_case_setup Setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_port_basic_use_case_setup_prereq Prerequisites
|
||||
* There are no special setup requirements for this use-case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_port_basic_use_case_setup_code Code
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_port_basic.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_port_basic.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_port_basic_use_case_setup_flow Workflow
|
||||
* -# Create a PORT module pin configuration struct, which can be filled out to
|
||||
* adjust the configuration of a single port pin.
|
||||
* \snippet qs_port_basic.c setup_1
|
||||
* -# Initialize the pin configuration struct with the module's default values.
|
||||
* \snippet qs_port_basic.c setup_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Adjust the configuration struct to request an input pin.
|
||||
* \snippet qs_port_basic.c setup_3
|
||||
* -# Configure push button pin with the initialized pin configuration struct, to enable
|
||||
* the input sampler on the pin.
|
||||
* \snippet qs_port_basic.c setup_4
|
||||
* -# Adjust the configuration struct to request an output pin.
|
||||
* \snippet qs_port_basic.c setup_5
|
||||
* \note The existing configuration struct may be re-used, as long as any
|
||||
* values that have been altered from the default settings are taken
|
||||
* into account by the user application.
|
||||
*
|
||||
* -# Configure LED pin with the initialized pin configuration struct, to enable
|
||||
* the output driver on the pin.
|
||||
* \snippet qs_port_basic.c setup_6
|
||||
*
|
||||
* \section asfdoc_sam0_port_basic_use_case_use_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_port_basic_use_case_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_port_basic.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_port_basic_use_case_flow Workflow
|
||||
* -# Read in the current input sampler state of push button pin, which has been
|
||||
* configured as an input in the use-case setup code.
|
||||
* \snippet qs_port_basic.c main_1
|
||||
* -# Write the inverted pin level state to LED pin, which has been configured as
|
||||
* an output in the use-case setup code.
|
||||
* \snippet qs_port_basic.c main_2
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
|
@ -1,296 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Serial Peripheral Interface Driver
|
||||
*
|
||||
* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#include "sercom.h"
|
||||
|
||||
#define SHIFT 32
|
||||
#define BAUD_INT_MAX 8192
|
||||
#define BAUD_FP_MAX 8
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
/**
|
||||
* \internal Configuration structure to save current gclk status.
|
||||
*/
|
||||
struct _sercom_conf {
|
||||
/* Status of gclk generator initialization */
|
||||
bool generator_is_set;
|
||||
/* Sercom gclk generator used */
|
||||
enum gclk_generator generator_source;
|
||||
};
|
||||
|
||||
static struct _sercom_conf _sercom_config;
|
||||
|
||||
|
||||
/**
|
||||
* \internal Calculate 64 bit division, ref can be found in
|
||||
* http://en.wikipedia.org/wiki/Division_algorithm#Long_division
|
||||
*/
|
||||
static uint64_t long_division(uint64_t n, uint64_t d)
|
||||
{
|
||||
int32_t i;
|
||||
uint64_t q = 0, r = 0, bit_shift;
|
||||
for (i = 63; i >= 0; i--) {
|
||||
bit_shift = (uint64_t)1 << i;
|
||||
|
||||
r = r << 1;
|
||||
|
||||
if (n & bit_shift) {
|
||||
r |= 0x01;
|
||||
}
|
||||
|
||||
if (r >= d) {
|
||||
r = r - d;
|
||||
q |= bit_shift;
|
||||
}
|
||||
}
|
||||
|
||||
return q;
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal Calculate synchronous baudrate value (SPI/UART)
|
||||
*/
|
||||
enum status_code _sercom_get_sync_baud_val(
|
||||
const uint32_t baudrate,
|
||||
const uint32_t external_clock,
|
||||
uint16_t *const baudvalue)
|
||||
{
|
||||
/* Baud value variable */
|
||||
uint16_t baud_calculated = 0;
|
||||
uint32_t clock_value = external_clock;
|
||||
|
||||
|
||||
/* Check if baudrate is outside of valid range */
|
||||
if (baudrate > (external_clock / 2)) {
|
||||
/* Return with error code */
|
||||
return STATUS_ERR_BAUDRATE_UNAVAILABLE;
|
||||
}
|
||||
|
||||
/* Calculate BAUD value from clock frequency and baudrate */
|
||||
clock_value = external_clock / 2;
|
||||
while (clock_value >= baudrate) {
|
||||
clock_value = clock_value - baudrate;
|
||||
baud_calculated++;
|
||||
}
|
||||
baud_calculated = baud_calculated - 1;
|
||||
|
||||
/* Check if BAUD value is more than 255, which is maximum
|
||||
* for synchronous mode */
|
||||
if (baud_calculated > 0xFF) {
|
||||
/* Return with an error code */
|
||||
return STATUS_ERR_BAUDRATE_UNAVAILABLE;
|
||||
} else {
|
||||
*baudvalue = baud_calculated;
|
||||
return STATUS_OK;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal Calculate asynchronous baudrate value (UART)
|
||||
*/
|
||||
enum status_code _sercom_get_async_baud_val(
|
||||
const uint32_t baudrate,
|
||||
const uint32_t peripheral_clock,
|
||||
uint16_t *const baudval,
|
||||
enum sercom_asynchronous_operation_mode mode,
|
||||
enum sercom_asynchronous_sample_num sample_num)
|
||||
{
|
||||
/* Temporary variables */
|
||||
uint64_t ratio = 0;
|
||||
uint64_t scale = 0;
|
||||
uint64_t baud_calculated = 0;
|
||||
uint8_t baud_fp;
|
||||
uint32_t baud_int = 0;
|
||||
uint64_t temp1, temp2;
|
||||
|
||||
/* Check if the baudrate is outside of valid range */
|
||||
if ((baudrate * sample_num) > peripheral_clock) {
|
||||
/* Return with error code */
|
||||
return STATUS_ERR_BAUDRATE_UNAVAILABLE;
|
||||
}
|
||||
|
||||
if(mode == SERCOM_ASYNC_OPERATION_MODE_ARITHMETIC) {
|
||||
/* Calculate the BAUD value */
|
||||
temp1 = ((sample_num * (uint64_t)baudrate) << SHIFT);
|
||||
ratio = long_division(temp1, peripheral_clock);
|
||||
scale = ((uint64_t)1 << SHIFT) - ratio;
|
||||
baud_calculated = (65536 * scale) >> SHIFT;
|
||||
} else if(mode == SERCOM_ASYNC_OPERATION_MODE_FRACTIONAL) {
|
||||
for(baud_fp = 0; baud_fp < BAUD_FP_MAX; baud_fp++) {
|
||||
temp1 = BAUD_FP_MAX * (uint64_t)peripheral_clock;
|
||||
temp2 = ((uint64_t)baudrate * sample_num);
|
||||
baud_int = long_division(temp1, temp2);
|
||||
baud_int -= baud_fp;
|
||||
baud_int = baud_int / BAUD_FP_MAX;
|
||||
if(baud_int < BAUD_INT_MAX) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
if(baud_fp == BAUD_FP_MAX) {
|
||||
return STATUS_ERR_BAUDRATE_UNAVAILABLE;
|
||||
}
|
||||
baud_calculated = baud_int | (baud_fp << 13);
|
||||
}
|
||||
|
||||
*baudval = baud_calculated;
|
||||
return STATUS_OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief Set GCLK channel to generator.
|
||||
*
|
||||
* This will set the appropriate GCLK channel to the requested GCLK generator.
|
||||
* This will set the generator for all SERCOM instances, and the user will thus
|
||||
* only be able to set the same generator that has previously been set, if any.
|
||||
*
|
||||
* After the generator has been set the first time, the generator can be changed
|
||||
* using the \c force_change flag.
|
||||
*
|
||||
* \param[in] generator_source The generator to use for SERCOM.
|
||||
* \param[in] force_change Force change the generator.
|
||||
*
|
||||
* \return Status code indicating the GCLK generator change operation.
|
||||
* \retval STATUS_OK If the generator update request was
|
||||
* successful.
|
||||
* \retval STATUS_ERR_ALREADY_INITIALIZED If a generator was already configured
|
||||
* and the new configuration was not
|
||||
* forced.
|
||||
*/
|
||||
enum status_code sercom_set_gclk_generator(
|
||||
const enum gclk_generator generator_source,
|
||||
const bool force_change)
|
||||
{
|
||||
/* Check if valid option */
|
||||
if (!_sercom_config.generator_is_set || force_change) {
|
||||
/* Create and fill a GCLK configuration structure for the new config */
|
||||
struct system_gclk_chan_config gclk_chan_conf;
|
||||
system_gclk_chan_get_config_defaults(&gclk_chan_conf);
|
||||
gclk_chan_conf.source_generator = generator_source;
|
||||
system_gclk_chan_set_config(SERCOM_GCLK_ID, &gclk_chan_conf);
|
||||
system_gclk_chan_enable(SERCOM_GCLK_ID);
|
||||
|
||||
/* Save config */
|
||||
_sercom_config.generator_source = generator_source;
|
||||
_sercom_config.generator_is_set = true;
|
||||
|
||||
return STATUS_OK;
|
||||
} else if (generator_source == _sercom_config.generator_source) {
|
||||
/* Return status OK if same config */
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/* Return invalid config to already initialized GCLK */
|
||||
return STATUS_ERR_ALREADY_INITIALIZED;
|
||||
}
|
||||
|
||||
/** \internal
|
||||
* Creates a switch statement case entry to convert a SERCOM instance and pad
|
||||
* index to the default SERCOM pad MUX setting.
|
||||
*/
|
||||
#define _SERCOM_PAD_DEFAULTS_CASE(n, pad) \
|
||||
case (uintptr_t)SERCOM##n: \
|
||||
switch (pad) { \
|
||||
case 0: \
|
||||
return SERCOM##n##_PAD0_DEFAULT; \
|
||||
case 1: \
|
||||
return SERCOM##n##_PAD1_DEFAULT; \
|
||||
case 2: \
|
||||
return SERCOM##n##_PAD2_DEFAULT; \
|
||||
case 3: \
|
||||
return SERCOM##n##_PAD3_DEFAULT; \
|
||||
} \
|
||||
break;
|
||||
|
||||
/**
|
||||
* \internal Gets the default PAD pinout for a given SERCOM.
|
||||
*
|
||||
* Returns the pinmux settings for the given SERCOM and pad. This is used
|
||||
* for default configuration of pins.
|
||||
*
|
||||
* \param[in] sercom_module Pointer to the SERCOM module
|
||||
* \param[in] pad PAD to get default pinout for
|
||||
*
|
||||
* \returns The default pinmux for the given SERCOM instance and PAD
|
||||
*
|
||||
*/
|
||||
uint32_t _sercom_get_default_pad(
|
||||
Sercom *const sercom_module,
|
||||
const uint8_t pad)
|
||||
{
|
||||
switch ((uintptr_t)sercom_module) {
|
||||
/* Auto-generate a lookup table for the default SERCOM pad defaults */
|
||||
MREPEAT(SERCOM_INST_NUM, _SERCOM_PAD_DEFAULTS_CASE, pad)
|
||||
}
|
||||
|
||||
Assert(false);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Find index of given instance.
|
||||
*
|
||||
* \param[in] sercom_instance Instance pointer.
|
||||
*
|
||||
* \return Index of given instance.
|
||||
*/
|
||||
uint8_t _sercom_get_sercom_inst_index(
|
||||
Sercom *const sercom_instance)
|
||||
{
|
||||
/* Save all available SERCOM instances for compare */
|
||||
Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS;
|
||||
|
||||
/* Find index for sercom instance */
|
||||
for (uint32_t i = 0; i < SERCOM_INST_NUM; i++) {
|
||||
if ((uintptr_t)sercom_instance == (uintptr_t)sercom_instances[i]) {
|
||||
return i;
|
||||
}
|
||||
}
|
||||
|
||||
/* Invalid data given */
|
||||
Assert(false);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -1,118 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Serial Peripheral Interface Driver
|
||||
*
|
||||
* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef SERCOM_H_INCLUDED
|
||||
#define SERCOM_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
#include <system.h>
|
||||
#include <clock.h>
|
||||
#include <system_interrupt.h>
|
||||
#include "sercom_pinout.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* SERCOM modules should share same slow GCLK channel ID */
|
||||
#define SERCOM_GCLK_ID SERCOM0_GCLK_ID_SLOW
|
||||
|
||||
#if (0x1ff >= REV_SERCOM)
|
||||
# define FEATURE_SERCOM_SYNCBUSY_SCHEME_VERSION_1
|
||||
#elif (0x400 >= REV_SERCOM)
|
||||
# define FEATURE_SERCOM_SYNCBUSY_SCHEME_VERSION_2
|
||||
#else
|
||||
# error "Unknown SYNCBUSY scheme for this SERCOM revision"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief sercom asynchronous operation mode
|
||||
*
|
||||
* Select sercom asynchronous operation mode
|
||||
*/
|
||||
enum sercom_asynchronous_operation_mode {
|
||||
SERCOM_ASYNC_OPERATION_MODE_ARITHMETIC = 0,
|
||||
SERCOM_ASYNC_OPERATION_MODE_FRACTIONAL,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief sercom asynchronous samples per bit
|
||||
*
|
||||
* Select number of samples per bit
|
||||
*/
|
||||
enum sercom_asynchronous_sample_num {
|
||||
SERCOM_ASYNC_SAMPLE_NUM_3 = 3,
|
||||
SERCOM_ASYNC_SAMPLE_NUM_8 = 8,
|
||||
SERCOM_ASYNC_SAMPLE_NUM_16 = 16,
|
||||
};
|
||||
|
||||
enum status_code sercom_set_gclk_generator(
|
||||
const enum gclk_generator generator_source,
|
||||
const bool force_change);
|
||||
|
||||
enum status_code _sercom_get_sync_baud_val(
|
||||
const uint32_t baudrate,
|
||||
const uint32_t external_clock,
|
||||
uint16_t *const baudval);
|
||||
|
||||
enum status_code _sercom_get_async_baud_val(
|
||||
const uint32_t baudrate,
|
||||
const uint32_t peripheral_clock,
|
||||
uint16_t *const baudval,
|
||||
enum sercom_asynchronous_operation_mode mode,
|
||||
enum sercom_asynchronous_sample_num sample_num);
|
||||
|
||||
uint32_t _sercom_get_default_pad(
|
||||
Sercom *const sercom_module,
|
||||
const uint8_t pad);
|
||||
|
||||
uint8_t _sercom_get_sercom_inst_index(
|
||||
Sercom *const sercom_instance);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif //__SERCOM_H_INCLUDED
|
||||
|
|
@ -1,141 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Serial Peripheral Interface Driver
|
||||
*
|
||||
* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#include "sercom_interrupt.h"
|
||||
|
||||
void *_sercom_instances[SERCOM_INST_NUM];
|
||||
|
||||
/** Save status of initialized handlers */
|
||||
static bool _handler_table_initialized = false;
|
||||
|
||||
/** Void pointers for saving device instance structures */
|
||||
static void (*_sercom_interrupt_handlers[SERCOM_INST_NUM])(const uint8_t instance);
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Default interrupt handler.
|
||||
*
|
||||
* \param[in] instance SERCOM instance used.
|
||||
*/
|
||||
static void _sercom_default_handler(
|
||||
const uint8_t instance)
|
||||
{
|
||||
Assert(false);
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Saves the given callback handler.
|
||||
*
|
||||
* \param[in] instance Instance index.
|
||||
* \param[in] interrupt_handler Pointer to instance callback handler.
|
||||
*/
|
||||
void _sercom_set_handler(
|
||||
const uint8_t instance,
|
||||
const sercom_handler_t interrupt_handler)
|
||||
{
|
||||
/* Initialize handlers with default handler and device instances with 0 */
|
||||
if (_handler_table_initialized == false) {
|
||||
for (uint32_t i = 0; i < SERCOM_INST_NUM; i++) {
|
||||
_sercom_interrupt_handlers[i] = &_sercom_default_handler;
|
||||
_sercom_instances[i] = NULL;
|
||||
}
|
||||
|
||||
_handler_table_initialized = true;
|
||||
}
|
||||
|
||||
/* Save interrupt handler */
|
||||
_sercom_interrupt_handlers[instance] = interrupt_handler;
|
||||
}
|
||||
|
||||
|
||||
/** \internal
|
||||
* Converts a given SERCOM index to its interrupt vector index.
|
||||
*/
|
||||
#define _SERCOM_INTERRUPT_VECT_NUM(n, unused) \
|
||||
SYSTEM_INTERRUPT_MODULE_SERCOM##n,
|
||||
|
||||
/** \internal
|
||||
* Generates a SERCOM interrupt handler function for a given SERCOM index.
|
||||
*/
|
||||
#define _SERCOM_INTERRUPT_HANDLER(n, unused) \
|
||||
void SERCOM##n##_Handler(void) \
|
||||
{ \
|
||||
_sercom_interrupt_handlers[n](n); \
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Returns the system interrupt vector.
|
||||
*
|
||||
* \param[in] sercom_instance Instance pointer
|
||||
*
|
||||
* \return Enum of system interrupt vector
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM0
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM1
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM2
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM3
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM4
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM5
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM6
|
||||
* \retval SYSTEM_INTERRUPT_MODULE_SERCOM7
|
||||
*/
|
||||
enum system_interrupt_vector _sercom_get_interrupt_vector(
|
||||
Sercom *const sercom_instance)
|
||||
{
|
||||
const uint8_t sercom_int_vectors[SERCOM_INST_NUM] =
|
||||
{
|
||||
MREPEAT(SERCOM_INST_NUM, _SERCOM_INTERRUPT_VECT_NUM, ~)
|
||||
};
|
||||
|
||||
/* Retrieve the index of the SERCOM being requested */
|
||||
uint8_t instance_index = _sercom_get_sercom_inst_index(sercom_instance);
|
||||
|
||||
/* Get the vector number from the lookup table for the requested SERCOM */
|
||||
return (enum system_interrupt_vector)sercom_int_vectors[instance_index];
|
||||
}
|
||||
|
||||
/** Auto-generate a set of interrupt handlers for each SERCOM in the device */
|
||||
MREPEAT(SERCOM_INST_NUM, _SERCOM_INTERRUPT_HANDLER, ~)
|
||||
|
|
@ -1,526 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM SERCOM Module Pinout Definitions
|
||||
*
|
||||
* Copyright (C) 2012-2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#ifndef SERCOM_PINOUT_H_INCLUDED
|
||||
#define SERCOM_PINOUT_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
|
||||
#if SAMR21E
|
||||
/* SERCOM0 */
|
||||
#define SERCOM0_PAD0_DEFAULT PINMUX_PA08C_SERCOM0_PAD0
|
||||
#define SERCOM0_PAD1_DEFAULT PINMUX_PA09C_SERCOM0_PAD1
|
||||
#define SERCOM0_PAD2_DEFAULT PINMUX_PA06D_SERCOM0_PAD2
|
||||
#define SERCOM0_PAD3_DEFAULT PINMUX_PA07D_SERCOM0_PAD3
|
||||
|
||||
/* SERCOM1 */
|
||||
#define SERCOM1_PAD0_DEFAULT PINMUX_PA16C_SERCOM1_PAD0
|
||||
#define SERCOM1_PAD1_DEFAULT PINMUX_PA17C_SERCOM1_PAD1
|
||||
#define SERCOM1_PAD2_DEFAULT PINMUX_PA18C_SERCOM1_PAD2
|
||||
#define SERCOM1_PAD3_DEFAULT PINMUX_PA19C_SERCOM1_PAD3
|
||||
|
||||
/* SERCOM2 */
|
||||
#define SERCOM2_PAD0_DEFAULT PINMUX_PA08D_SERCOM2_PAD0
|
||||
#define SERCOM2_PAD1_DEFAULT PINMUX_PA09D_SERCOM2_PAD1
|
||||
#define SERCOM2_PAD2_DEFAULT PINMUX_PA14C_SERCOM2_PAD2
|
||||
#define SERCOM2_PAD3_DEFAULT PINMUX_PA15C_SERCOM2_PAD3
|
||||
|
||||
/* SERCOM3 */
|
||||
# if SAM_PART_IS_DEFINED(SAMR21E19A)
|
||||
#define SERCOM3_PAD0_DEFAULT PINMUX_PA16D_SERCOM3_PAD0
|
||||
#define SERCOM3_PAD1_DEFAULT PINMUX_PA17D_SERCOM3_PAD1
|
||||
# else
|
||||
#define SERCOM3_PAD0_DEFAULT PINMUX_PA27F_SERCOM3_PAD0
|
||||
#define SERCOM3_PAD1_DEFAULT PINMUX_PA28F_SERCOM3_PAD1
|
||||
#endif
|
||||
#define SERCOM3_PAD2_DEFAULT PINMUX_PA24C_SERCOM3_PAD2
|
||||
#define SERCOM3_PAD3_DEFAULT PINMUX_PA25C_SERCOM3_PAD3
|
||||
|
||||
/* SERCOM4 */
|
||||
# if SAM_PART_IS_DEFINED(SAMR21E19A)
|
||||
#define SERCOM4_PAD0_DEFAULT PINMUX_PB08D_SERCOM4_PAD0
|
||||
#define SERCOM4_PAD1_DEFAULT PINMUX_PB09D_SERCOM4_PAD1
|
||||
#define SERCOM4_PAD2_DEFAULT PINMUX_PA14D_SERCOM4_PAD2
|
||||
#define SERCOM4_PAD3_DEFAULT PINMUX_PA15D_SERCOM4_PAD3
|
||||
# else
|
||||
#define SERCOM4_PAD0_DEFAULT PINMUX_PC19F_SERCOM4_PAD0
|
||||
#define SERCOM4_PAD1_DEFAULT PINMUX_PB31F_SERCOM4_PAD1
|
||||
#define SERCOM4_PAD2_DEFAULT PINMUX_PB30F_SERCOM4_PAD2
|
||||
#define SERCOM4_PAD3_DEFAULT PINMUX_PC18F_SERCOM4_PAD3
|
||||
# endif
|
||||
|
||||
/* SERCOM5 */
|
||||
#define SERCOM5_PAD0_DEFAULT PINMUX_PB30D_SERCOM5_PAD0
|
||||
#define SERCOM5_PAD1_DEFAULT PINMUX_PB31D_SERCOM5_PAD1
|
||||
#define SERCOM5_PAD2_DEFAULT PINMUX_PA24D_SERCOM5_PAD2
|
||||
#define SERCOM5_PAD3_DEFAULT PINMUX_PA25D_SERCOM5_PAD3
|
||||
|
||||
#elif SAMR21G
|
||||
/* SERCOM0 */
|
||||
#define SERCOM0_PAD0_DEFAULT PINMUX_PA04D_SERCOM0_PAD0
|
||||
#define SERCOM0_PAD1_DEFAULT PINMUX_PA05D_SERCOM0_PAD1
|
||||
#define SERCOM0_PAD2_DEFAULT PINMUX_PA06D_SERCOM0_PAD2
|
||||
#define SERCOM0_PAD3_DEFAULT PINMUX_PA07D_SERCOM0_PAD3
|
||||
|
||||
/* SERCOM1 */
|
||||
#define SERCOM1_PAD0_DEFAULT PINMUX_PA00D_SERCOM1_PAD0
|
||||
#define SERCOM1_PAD1_DEFAULT PINMUX_PA01D_SERCOM1_PAD1
|
||||
#define SERCOM1_PAD2_DEFAULT PINMUX_PA30D_SERCOM1_PAD2
|
||||
#define SERCOM1_PAD3_DEFAULT PINMUX_PA31D_SERCOM1_PAD3
|
||||
|
||||
/* SERCOM2 */
|
||||
#define SERCOM2_PAD0_DEFAULT PINMUX_PA12C_SERCOM2_PAD0
|
||||
#define SERCOM2_PAD1_DEFAULT PINMUX_PA13C_SERCOM2_PAD1
|
||||
#define SERCOM2_PAD2_DEFAULT PINMUX_PA14C_SERCOM2_PAD2
|
||||
#define SERCOM2_PAD3_DEFAULT PINMUX_PA15C_SERCOM2_PAD3
|
||||
|
||||
/* SERCOM3 */
|
||||
#define SERCOM3_PAD0_DEFAULT PINMUX_PA16D_SERCOM3_PAD0
|
||||
#define SERCOM3_PAD1_DEFAULT PINMUX_PA17D_SERCOM3_PAD1
|
||||
#define SERCOM3_PAD2_DEFAULT PINMUX_PA18D_SERCOM3_PAD2
|
||||
#define SERCOM3_PAD3_DEFAULT PINMUX_PA19D_SERCOM3_PAD3
|
||||
|
||||
/* SERCOM4 */
|
||||
#define SERCOM4_PAD0_DEFAULT PINMUX_PC19F_SERCOM4_PAD0
|
||||
#define SERCOM4_PAD1_DEFAULT PINMUX_PB31F_SERCOM4_PAD1
|
||||
#define SERCOM4_PAD2_DEFAULT PINMUX_PB30F_SERCOM4_PAD2
|
||||
#define SERCOM4_PAD3_DEFAULT PINMUX_PC18F_SERCOM4_PAD3
|
||||
|
||||
/* SERCOM5 */
|
||||
#define SERCOM5_PAD0_DEFAULT PINMUX_PA22D_SERCOM5_PAD0
|
||||
#define SERCOM5_PAD1_DEFAULT PINMUX_PA23D_SERCOM5_PAD1
|
||||
#define SERCOM5_PAD2_DEFAULT PINMUX_PA24D_SERCOM5_PAD2
|
||||
#define SERCOM5_PAD3_DEFAULT PINMUX_PA25D_SERCOM5_PAD3
|
||||
|
||||
#elif (SAMD09)
|
||||
/* SERCOM0 */
|
||||
#define SERCOM0_PAD0_DEFAULT PINMUX_PA04D_SERCOM0_PAD0
|
||||
#define SERCOM0_PAD1_DEFAULT PINMUX_PA05D_SERCOM0_PAD1
|
||||
#define SERCOM0_PAD2_DEFAULT PINMUX_PA08D_SERCOM0_PAD2
|
||||
#define SERCOM0_PAD3_DEFAULT PINMUX_PA09D_SERCOM0_PAD3
|
||||
|
||||
/* SERCOM1 */
|
||||
#define SERCOM1_PAD0_DEFAULT PINMUX_PA30C_SERCOM1_PAD0
|
||||
#define SERCOM1_PAD1_DEFAULT PINMUX_PA31C_SERCOM1_PAD1
|
||||
#define SERCOM1_PAD2_DEFAULT PINMUX_PA24C_SERCOM1_PAD2
|
||||
#define SERCOM1_PAD3_DEFAULT PINMUX_PA25C_SERCOM1_PAD3
|
||||
|
||||
#elif (SAMD10DS) || (SAMD10DM) || (SAMD10DU) || (SAMD11DS) || (SAMD11DM) || (SAMD11DU)
|
||||
/* SERCOM0 */
|
||||
#define SERCOM0_PAD0_DEFAULT PINMUX_PA04D_SERCOM0_PAD0
|
||||
#define SERCOM0_PAD1_DEFAULT PINMUX_PA05D_SERCOM0_PAD1
|
||||
#define SERCOM0_PAD2_DEFAULT PINMUX_PA06D_SERCOM0_PAD2
|
||||
#define SERCOM0_PAD3_DEFAULT PINMUX_PA07D_SERCOM0_PAD3
|
||||
|
||||
/* SERCOM1 */
|
||||
#define SERCOM1_PAD0_DEFAULT PINMUX_PA22C_SERCOM1_PAD0
|
||||
#define SERCOM1_PAD1_DEFAULT PINMUX_PA23C_SERCOM1_PAD1
|
||||
#define SERCOM1_PAD2_DEFAULT PINMUX_PA30D_SERCOM1_PAD2
|
||||
#define SERCOM1_PAD3_DEFAULT PINMUX_PA31D_SERCOM1_PAD3
|
||||
|
||||
/* SERCOM2 */
|
||||
#define SERCOM2_PAD0_DEFAULT PINMUX_PA22D_SERCOM2_PAD0
|
||||
#define SERCOM2_PAD1_DEFAULT PINMUX_PA23D_SERCOM2_PAD1
|
||||
#define SERCOM2_PAD2_DEFAULT PINMUX_PA16D_SERCOM2_PAD2
|
||||
#define SERCOM2_PAD3_DEFAULT PINMUX_PA25D_SERCOM2_PAD3
|
||||
|
||||
#elif (SAMD10C) || (SAMD11C)
|
||||
/* SERCOM0 */
|
||||
#define SERCOM0_PAD0_DEFAULT PINMUX_PA04D_SERCOM0_PAD0
|
||||
#define SERCOM0_PAD1_DEFAULT PINMUX_PA05D_SERCOM0_PAD1
|
||||
#define SERCOM0_PAD2_DEFAULT PINMUX_PA08D_SERCOM0_PAD2
|
||||
#define SERCOM0_PAD3_DEFAULT PINMUX_PA09D_SERCOM0_PAD3
|
||||
|
||||
/* SERCOM1 */
|
||||
#define SERCOM1_PAD0_DEFAULT PINMUX_PA30C_SERCOM1_PAD0
|
||||
#define SERCOM1_PAD1_DEFAULT PINMUX_PA31C_SERCOM1_PAD1
|
||||
#define SERCOM1_PAD2_DEFAULT PINMUX_PA24C_SERCOM1_PAD2
|
||||
#define SERCOM1_PAD3_DEFAULT PINMUX_PA25C_SERCOM1_PAD3
|
||||
|
||||
#elif SAM_PART_IS_DEFINED(SAMD21E15L) || SAM_PART_IS_DEFINED(SAMD21E16L)
|
||||
|
||||
/* SERCOM0 */
|
||||
#define SERCOM0_PAD0_DEFAULT PINMUX_PA04D_SERCOM0_PAD0
|
||||
#define SERCOM0_PAD1_DEFAULT PINMUX_PA05D_SERCOM0_PAD1
|
||||
#define SERCOM0_PAD2_DEFAULT PINMUX_PA06D_SERCOM0_PAD2
|
||||
#define SERCOM0_PAD3_DEFAULT PINMUX_PA07D_SERCOM0_PAD3
|
||||
|
||||
/* SERCOM1 */
|
||||
#define SERCOM1_PAD0_DEFAULT PINMUX_PA16C_SERCOM1_PAD0
|
||||
#define SERCOM1_PAD1_DEFAULT PINMUX_PA17C_SERCOM1_PAD1
|
||||
#define SERCOM1_PAD2_DEFAULT PINMUX_PA18C_SERCOM1_PAD2
|
||||
#define SERCOM1_PAD3_DEFAULT PINMUX_PA19C_SERCOM1_PAD3
|
||||
|
||||
/* SERCOM2 */
|
||||
#define SERCOM2_PAD0_DEFAULT PINMUX_PA08D_SERCOM2_PAD0
|
||||
#define SERCOM2_PAD1_DEFAULT PINMUX_PA09D_SERCOM2_PAD1
|
||||
#define SERCOM2_PAD2_DEFAULT PINMUX_PA10D_SERCOM2_PAD2
|
||||
#define SERCOM2_PAD3_DEFAULT PINMUX_PA11D_SERCOM2_PAD3
|
||||
|
||||
/* SERCOM3 */
|
||||
#define SERCOM3_PAD0_DEFAULT PINMUX_PA22C_SERCOM3_PAD0
|
||||
#define SERCOM3_PAD1_DEFAULT PINMUX_PA23C_SERCOM3_PAD1
|
||||
#define SERCOM3_PAD2_DEFAULT PINMUX_PA24C_SERCOM3_PAD2
|
||||
#define SERCOM3_PAD3_DEFAULT PINMUX_PA25C_SERCOM3_PAD3
|
||||
|
||||
#elif (SAML22N)
|
||||
/* SERCOM0 */
|
||||
#define SERCOM0_PAD0_DEFAULT PINMUX_PA08C_SERCOM0_PAD0
|
||||
#define SERCOM0_PAD1_DEFAULT PINMUX_PA09C_SERCOM0_PAD1
|
||||
#define SERCOM0_PAD2_DEFAULT PINMUX_PA10C_SERCOM0_PAD2
|
||||
#define SERCOM0_PAD3_DEFAULT PINMUX_PA11C_SERCOM0_PAD3
|
||||
|
||||
/* SERCOM1 */
|
||||
#define SERCOM1_PAD0_DEFAULT PINMUX_PA16C_SERCOM1_PAD0
|
||||
#define SERCOM1_PAD1_DEFAULT PINMUX_PA17C_SERCOM1_PAD1
|
||||
#define SERCOM1_PAD2_DEFAULT PINMUX_PA18C_SERCOM1_PAD2
|
||||
#define SERCOM1_PAD3_DEFAULT PINMUX_PA19C_SERCOM1_PAD3
|
||||
|
||||
/* SERCOM2 */
|
||||
#define SERCOM2_PAD0_DEFAULT PINMUX_PA22D_SERCOM2_PAD0
|
||||
#define SERCOM2_PAD1_DEFAULT PINMUX_PA23D_SERCOM2_PAD1
|
||||
#define SERCOM2_PAD2_DEFAULT PINMUX_PA20D_SERCOM2_PAD2
|
||||
#define SERCOM2_PAD3_DEFAULT PINMUX_PA21D_SERCOM2_PAD3
|
||||
|
||||
/* SERCOM3 */
|
||||
#define SERCOM3_PAD0_DEFAULT PINMUX_PB02C_SERCOM3_PAD0
|
||||
#define SERCOM3_PAD1_DEFAULT PINMUX_PB21C_SERCOM3_PAD1
|
||||
#define SERCOM3_PAD2_DEFAULT PINMUX_PB00C_SERCOM3_PAD2
|
||||
#define SERCOM3_PAD3_DEFAULT PINMUX_PB01C_SERCOM3_PAD3
|
||||
|
||||
/* SERCOM4 */
|
||||
#define SERCOM4_PAD0_DEFAULT PINMUX_PA12C_SERCOM4_PAD0
|
||||
#define SERCOM4_PAD1_DEFAULT PINMUX_PA13C_SERCOM4_PAD1
|
||||
#define SERCOM4_PAD2_DEFAULT PINMUX_PA14C_SERCOM4_PAD2
|
||||
#define SERCOM4_PAD3_DEFAULT PINMUX_PA15C_SERCOM4_PAD3
|
||||
|
||||
/* SERCOM5 */
|
||||
#define SERCOM5_PAD0_DEFAULT PINMUX_PB30D_SERCOM5_PAD0
|
||||
#define SERCOM5_PAD1_DEFAULT PINMUX_PB31D_SERCOM5_PAD1
|
||||
#define SERCOM5_PAD2_DEFAULT PINMUX_PB22D_SERCOM5_PAD2
|
||||
#define SERCOM5_PAD3_DEFAULT PINMUX_PB23D_SERCOM5_PAD3
|
||||
#elif (SAML22J)
|
||||
/* SERCOM0 */
|
||||
#define SERCOM0_PAD0_DEFAULT PINMUX_PA08C_SERCOM0_PAD0
|
||||
#define SERCOM0_PAD1_DEFAULT PINMUX_PA09C_SERCOM0_PAD1
|
||||
#define SERCOM0_PAD2_DEFAULT PINMUX_PA10C_SERCOM0_PAD2
|
||||
#define SERCOM0_PAD3_DEFAULT PINMUX_PA11C_SERCOM0_PAD3
|
||||
|
||||
/* SERCOM1 */
|
||||
#define SERCOM1_PAD0_DEFAULT PINMUX_PA16C_SERCOM1_PAD0
|
||||
#define SERCOM1_PAD1_DEFAULT PINMUX_PA17C_SERCOM1_PAD1
|
||||
#define SERCOM1_PAD2_DEFAULT PINMUX_PA18C_SERCOM1_PAD2
|
||||
#define SERCOM1_PAD3_DEFAULT PINMUX_PA19C_SERCOM1_PAD3
|
||||
|
||||
/* SERCOM2 */
|
||||
#define SERCOM2_PAD0_DEFAULT PINMUX_PA22D_SERCOM2_PAD0
|
||||
#define SERCOM2_PAD1_DEFAULT PINMUX_PA23D_SERCOM2_PAD1
|
||||
#define SERCOM2_PAD2_DEFAULT PINMUX_PA20D_SERCOM2_PAD2
|
||||
#define SERCOM2_PAD3_DEFAULT PINMUX_PA21D_SERCOM2_PAD3
|
||||
|
||||
/* SERCOM3 */
|
||||
#define SERCOM3_PAD0_DEFAULT PINMUX_PB02C_SERCOM3_PAD0
|
||||
#define SERCOM3_PAD1_DEFAULT PINMUX_PB13C_SERCOM3_PAD1
|
||||
#define SERCOM3_PAD2_DEFAULT PINMUX_PB00C_SERCOM3_PAD2
|
||||
#define SERCOM3_PAD3_DEFAULT PINMUX_PB01C_SERCOM3_PAD3
|
||||
#elif (SAML22G)
|
||||
/* SERCOM0 */
|
||||
#define SERCOM0_PAD0_DEFAULT PINMUX_PA08C_SERCOM0_PAD0
|
||||
#define SERCOM0_PAD1_DEFAULT PINMUX_PA09C_SERCOM0_PAD1
|
||||
#define SERCOM0_PAD2_DEFAULT PINMUX_PA10C_SERCOM0_PAD2
|
||||
#define SERCOM0_PAD3_DEFAULT PINMUX_PA11C_SERCOM0_PAD3
|
||||
|
||||
/* SERCOM1 */
|
||||
#define SERCOM1_PAD0_DEFAULT PINMUX_PA16C_SERCOM1_PAD0
|
||||
#define SERCOM1_PAD1_DEFAULT PINMUX_PA17C_SERCOM1_PAD1
|
||||
#define SERCOM1_PAD2_DEFAULT PINMUX_PA18C_SERCOM1_PAD2
|
||||
#define SERCOM1_PAD3_DEFAULT PINMUX_PA19C_SERCOM1_PAD3
|
||||
|
||||
/* SERCOM2 */
|
||||
#define SERCOM2_PAD0_DEFAULT PINMUX_PA22D_SERCOM2_PAD0
|
||||
#define SERCOM2_PAD1_DEFAULT PINMUX_PA23D_SERCOM2_PAD1
|
||||
#define SERCOM2_PAD2_DEFAULT PINMUX_PA20D_SERCOM2_PAD2
|
||||
#define SERCOM2_PAD3_DEFAULT PINMUX_PA21D_SERCOM2_PAD3
|
||||
#elif (SAMC20E) || (SAMC21E)
|
||||
/* SERCOM0 */
|
||||
#define SERCOM0_PAD0_DEFAULT PINMUX_PA04D_SERCOM0_PAD0
|
||||
#define SERCOM0_PAD1_DEFAULT PINMUX_PA05D_SERCOM0_PAD1
|
||||
#define SERCOM0_PAD2_DEFAULT PINMUX_PA06D_SERCOM0_PAD2
|
||||
#define SERCOM0_PAD3_DEFAULT PINMUX_PA07D_SERCOM0_PAD3
|
||||
|
||||
/* SERCOM1 */
|
||||
#define SERCOM1_PAD0_DEFAULT PINMUX_PA16C_SERCOM1_PAD0
|
||||
#define SERCOM1_PAD1_DEFAULT PINMUX_PA17C_SERCOM1_PAD1
|
||||
#define SERCOM1_PAD2_DEFAULT PINMUX_PA18C_SERCOM1_PAD2
|
||||
#define SERCOM1_PAD3_DEFAULT PINMUX_PA19C_SERCOM1_PAD3
|
||||
|
||||
/* SERCOM2 */
|
||||
#define SERCOM2_PAD0_DEFAULT PINMUX_PA08D_SERCOM2_PAD0
|
||||
#define SERCOM2_PAD1_DEFAULT PINMUX_PA09D_SERCOM2_PAD1
|
||||
#define SERCOM2_PAD2_DEFAULT PINMUX_PA10D_SERCOM2_PAD2
|
||||
#define SERCOM2_PAD3_DEFAULT PINMUX_PA11D_SERCOM2_PAD3
|
||||
|
||||
/* SERCOM3 */
|
||||
#define SERCOM3_PAD0_DEFAULT PINMUX_PA22C_SERCOM3_PAD0
|
||||
#define SERCOM3_PAD1_DEFAULT PINMUX_PA23C_SERCOM3_PAD1
|
||||
#define SERCOM3_PAD2_DEFAULT PINMUX_PA24C_SERCOM3_PAD2
|
||||
#define SERCOM3_PAD3_DEFAULT PINMUX_PA25C_SERCOM3_PAD3
|
||||
|
||||
#elif (SAMC20G) || (SAMC21G)
|
||||
/* SERCOM0 */
|
||||
#define SERCOM0_PAD0_DEFAULT PINMUX_PA04D_SERCOM0_PAD0
|
||||
#define SERCOM0_PAD1_DEFAULT PINMUX_PA05D_SERCOM0_PAD1
|
||||
#define SERCOM0_PAD2_DEFAULT PINMUX_PA06D_SERCOM0_PAD2
|
||||
#define SERCOM0_PAD3_DEFAULT PINMUX_PA07D_SERCOM0_PAD3
|
||||
|
||||
/* SERCOM1 */
|
||||
#define SERCOM1_PAD0_DEFAULT PINMUX_PA16C_SERCOM1_PAD0
|
||||
#define SERCOM1_PAD1_DEFAULT PINMUX_PA17C_SERCOM1_PAD1
|
||||
#define SERCOM1_PAD2_DEFAULT PINMUX_PA18C_SERCOM1_PAD2
|
||||
#define SERCOM1_PAD3_DEFAULT PINMUX_PA19C_SERCOM1_PAD3
|
||||
|
||||
/* SERCOM2 */
|
||||
#define SERCOM2_PAD0_DEFAULT PINMUX_PA12C_SERCOM2_PAD0
|
||||
#define SERCOM2_PAD1_DEFAULT PINMUX_PA13C_SERCOM2_PAD1
|
||||
#define SERCOM2_PAD2_DEFAULT PINMUX_PA14C_SERCOM2_PAD2
|
||||
#define SERCOM2_PAD3_DEFAULT PINMUX_PA15C_SERCOM2_PAD3
|
||||
|
||||
/* SERCOM3 */
|
||||
#define SERCOM3_PAD0_DEFAULT PINMUX_PA22C_SERCOM3_PAD0
|
||||
#define SERCOM3_PAD1_DEFAULT PINMUX_PA23C_SERCOM3_PAD1
|
||||
#define SERCOM3_PAD2_DEFAULT PINMUX_PA24C_SERCOM3_PAD2
|
||||
#define SERCOM3_PAD3_DEFAULT PINMUX_PA25C_SERCOM3_PAD3
|
||||
|
||||
#ifdef ID_SERCOM4
|
||||
/* SERCOM4 */
|
||||
#define SERCOM4_PAD0_DEFAULT PINMUX_PB08D_SERCOM4_PAD0
|
||||
#define SERCOM4_PAD1_DEFAULT PINMUX_PB09D_SERCOM4_PAD1
|
||||
#define SERCOM4_PAD2_DEFAULT PINMUX_PB10D_SERCOM4_PAD2
|
||||
#define SERCOM4_PAD3_DEFAULT PINMUX_PB11D_SERCOM4_PAD3
|
||||
#endif
|
||||
|
||||
#ifdef ID_SERCOM5
|
||||
/* SERCOM5 */
|
||||
#define SERCOM5_PAD0_DEFAULT PINMUX_PB02D_SERCOM5_PAD0
|
||||
#define SERCOM5_PAD1_DEFAULT PINMUX_PB03D_SERCOM5_PAD1
|
||||
#define SERCOM5_PAD2_DEFAULT PINMUX_PB22D_SERCOM5_PAD2
|
||||
#define SERCOM5_PAD3_DEFAULT PINMUX_PB23D_SERCOM5_PAD3
|
||||
#endif
|
||||
|
||||
#elif (SAMC20J) || (SAMC21J)
|
||||
/* SERCOM0 */
|
||||
#define SERCOM0_PAD0_DEFAULT PINMUX_PA04D_SERCOM0_PAD0
|
||||
#define SERCOM0_PAD1_DEFAULT PINMUX_PA05D_SERCOM0_PAD1
|
||||
#define SERCOM0_PAD2_DEFAULT PINMUX_PA06D_SERCOM0_PAD2
|
||||
#define SERCOM0_PAD3_DEFAULT PINMUX_PA07D_SERCOM0_PAD3
|
||||
|
||||
/* SERCOM1 */
|
||||
#define SERCOM1_PAD0_DEFAULT PINMUX_PA16C_SERCOM1_PAD0
|
||||
#define SERCOM1_PAD1_DEFAULT PINMUX_PA17C_SERCOM1_PAD1
|
||||
#define SERCOM1_PAD2_DEFAULT PINMUX_PA18C_SERCOM1_PAD2
|
||||
#define SERCOM1_PAD3_DEFAULT PINMUX_PA19C_SERCOM1_PAD3
|
||||
|
||||
/* SERCOM2 */
|
||||
#define SERCOM2_PAD0_DEFAULT PINMUX_PA12C_SERCOM2_PAD0
|
||||
#define SERCOM2_PAD1_DEFAULT PINMUX_PA13C_SERCOM2_PAD1
|
||||
#define SERCOM2_PAD2_DEFAULT PINMUX_PA14C_SERCOM2_PAD2
|
||||
#define SERCOM2_PAD3_DEFAULT PINMUX_PA15C_SERCOM2_PAD3
|
||||
|
||||
/* SERCOM3 */
|
||||
#define SERCOM3_PAD0_DEFAULT PINMUX_PA22C_SERCOM3_PAD0
|
||||
#define SERCOM3_PAD1_DEFAULT PINMUX_PA23C_SERCOM3_PAD1
|
||||
#define SERCOM3_PAD2_DEFAULT PINMUX_PA24C_SERCOM3_PAD2
|
||||
#define SERCOM3_PAD3_DEFAULT PINMUX_PA25C_SERCOM3_PAD3
|
||||
|
||||
#ifdef ID_SERCOM4
|
||||
/* SERCOM4 */
|
||||
#define SERCOM4_PAD0_DEFAULT PINMUX_PB08D_SERCOM4_PAD0
|
||||
#define SERCOM4_PAD1_DEFAULT PINMUX_PB09D_SERCOM4_PAD1
|
||||
#define SERCOM4_PAD2_DEFAULT PINMUX_PB10D_SERCOM4_PAD2
|
||||
#define SERCOM4_PAD3_DEFAULT PINMUX_PB11D_SERCOM4_PAD3
|
||||
#endif
|
||||
|
||||
#ifdef ID_SERCOM5
|
||||
/* SERCOM5 */
|
||||
#define SERCOM5_PAD0_DEFAULT PINMUX_PB02D_SERCOM5_PAD0
|
||||
#define SERCOM5_PAD1_DEFAULT PINMUX_PB03D_SERCOM5_PAD1
|
||||
#define SERCOM5_PAD2_DEFAULT PINMUX_PB00D_SERCOM5_PAD2
|
||||
#define SERCOM5_PAD3_DEFAULT PINMUX_PB01D_SERCOM5_PAD3
|
||||
#endif
|
||||
|
||||
#elif (SAMDA1)
|
||||
/* SERCOM0 */
|
||||
#define SERCOM0_PAD0_DEFAULT PINMUX_PA04D_SERCOM0_PAD0
|
||||
#define SERCOM0_PAD1_DEFAULT PINMUX_PA05D_SERCOM0_PAD1
|
||||
#define SERCOM0_PAD2_DEFAULT PINMUX_PA06D_SERCOM0_PAD2
|
||||
#define SERCOM0_PAD3_DEFAULT PINMUX_PA07D_SERCOM0_PAD3
|
||||
|
||||
/* SERCOM1 */
|
||||
#define SERCOM1_PAD0_DEFAULT PINMUX_PA00D_SERCOM1_PAD0
|
||||
#define SERCOM1_PAD1_DEFAULT PINMUX_PA01D_SERCOM1_PAD1
|
||||
#define SERCOM1_PAD2_DEFAULT PINMUX_PA30D_SERCOM1_PAD2
|
||||
#define SERCOM1_PAD3_DEFAULT PINMUX_PA31D_SERCOM1_PAD3
|
||||
|
||||
/* SERCOM2 */
|
||||
#define SERCOM2_PAD0_DEFAULT PINMUX_PA08D_SERCOM2_PAD0
|
||||
#define SERCOM2_PAD1_DEFAULT PINMUX_PA09D_SERCOM2_PAD1
|
||||
#define SERCOM2_PAD2_DEFAULT PINMUX_PA10D_SERCOM2_PAD2
|
||||
#define SERCOM2_PAD3_DEFAULT PINMUX_PA11D_SERCOM2_PAD3
|
||||
|
||||
/* SERCOM3 */
|
||||
#define SERCOM3_PAD0_DEFAULT PINMUX_PA16D_SERCOM3_PAD0
|
||||
#define SERCOM3_PAD1_DEFAULT PINMUX_PA17D_SERCOM3_PAD1
|
||||
#define SERCOM3_PAD2_DEFAULT PINMUX_PA18D_SERCOM3_PAD2
|
||||
#define SERCOM3_PAD3_DEFAULT PINMUX_PA19D_SERCOM3_PAD3
|
||||
|
||||
#if (SAMDA1E)
|
||||
/* SERCOM4 */
|
||||
#define SERCOM4_PAD0_DEFAULT 0 /* No available pin */
|
||||
#define SERCOM4_PAD1_DEFAULT 0 /* No available pin */
|
||||
#define SERCOM4_PAD2_DEFAULT PINMUX_PA14D_SERCOM4_PAD2
|
||||
#define SERCOM4_PAD3_DEFAULT PINMUX_PA15D_SERCOM4_PAD3
|
||||
#else
|
||||
/* SERCOM4 */
|
||||
#define SERCOM4_PAD0_DEFAULT PINMUX_PA12D_SERCOM4_PAD0
|
||||
#define SERCOM4_PAD1_DEFAULT PINMUX_PA13D_SERCOM4_PAD1
|
||||
#define SERCOM4_PAD2_DEFAULT PINMUX_PA14D_SERCOM4_PAD2
|
||||
#define SERCOM4_PAD3_DEFAULT PINMUX_PA15D_SERCOM4_PAD3
|
||||
#endif
|
||||
|
||||
/* SERCOM5 */
|
||||
#define SERCOM5_PAD0_DEFAULT PINMUX_PA22D_SERCOM5_PAD0
|
||||
#define SERCOM5_PAD1_DEFAULT PINMUX_PA23D_SERCOM5_PAD1
|
||||
#define SERCOM5_PAD2_DEFAULT PINMUX_PA24D_SERCOM5_PAD2
|
||||
#define SERCOM5_PAD3_DEFAULT PINMUX_PA25D_SERCOM5_PAD3
|
||||
|
||||
#elif (SAML21E) || (SAMR30E)
|
||||
|
||||
/* SERCOM0 */
|
||||
#define SERCOM0_PAD0_DEFAULT PINMUX_PA04D_SERCOM0_PAD0
|
||||
#define SERCOM0_PAD1_DEFAULT PINMUX_PA05D_SERCOM0_PAD1
|
||||
#define SERCOM0_PAD2_DEFAULT PINMUX_PA06D_SERCOM0_PAD2
|
||||
#define SERCOM0_PAD3_DEFAULT PINMUX_PA07D_SERCOM0_PAD3
|
||||
|
||||
/* SERCOM1 */
|
||||
#define SERCOM1_PAD0_DEFAULT PINMUX_PA00D_SERCOM1_PAD0
|
||||
#define SERCOM1_PAD1_DEFAULT PINMUX_PA01D_SERCOM1_PAD1
|
||||
#define SERCOM1_PAD2_DEFAULT PINMUX_PA30D_SERCOM1_PAD2
|
||||
#define SERCOM1_PAD3_DEFAULT PINMUX_PA31D_SERCOM1_PAD3
|
||||
|
||||
/* SERCOM2 */
|
||||
#define SERCOM2_PAD0_DEFAULT PINMUX_PA08D_SERCOM2_PAD0
|
||||
#define SERCOM2_PAD1_DEFAULT PINMUX_PA09D_SERCOM2_PAD1
|
||||
#define SERCOM2_PAD2_DEFAULT PINMUX_PA10D_SERCOM2_PAD2
|
||||
#define SERCOM2_PAD3_DEFAULT PINMUX_PA11D_SERCOM2_PAD3
|
||||
|
||||
/* SERCOM3 */
|
||||
#define SERCOM3_PAD0_DEFAULT PINMUX_PA16D_SERCOM3_PAD0
|
||||
#define SERCOM3_PAD1_DEFAULT PINMUX_PA17D_SERCOM3_PAD1
|
||||
#define SERCOM3_PAD2_DEFAULT PINMUX_PA18D_SERCOM3_PAD2
|
||||
#define SERCOM3_PAD3_DEFAULT PINMUX_PA19D_SERCOM3_PAD3
|
||||
|
||||
#if !SAM_PART_IS_DEFINED(SAML21E18A) && !SAM_PART_IS_DEFINED(SAMR30E18A)
|
||||
/* SERCOM4 */
|
||||
#define SERCOM4_PAD0_DEFAULT 0 /* No available pin */
|
||||
#define SERCOM4_PAD1_DEFAULT 0 /* No available pin */
|
||||
#define SERCOM4_PAD2_DEFAULT PINMUX_PA14D_SERCOM4_PAD2
|
||||
#define SERCOM4_PAD3_DEFAULT PINMUX_PA15D_SERCOM4_PAD3
|
||||
|
||||
/* SERCOM5 */
|
||||
#define SERCOM5_PAD0_DEFAULT PINMUX_PA22D_SERCOM5_PAD0
|
||||
#define SERCOM5_PAD1_DEFAULT PINMUX_PA23D_SERCOM5_PAD1
|
||||
#define SERCOM5_PAD2_DEFAULT PINMUX_PA24D_SERCOM5_PAD2
|
||||
#define SERCOM5_PAD3_DEFAULT PINMUX_PA25D_SERCOM5_PAD3
|
||||
#endif
|
||||
|
||||
#else
|
||||
/* SERCOM0 */
|
||||
#define SERCOM0_PAD0_DEFAULT PINMUX_PA04D_SERCOM0_PAD0
|
||||
#define SERCOM0_PAD1_DEFAULT PINMUX_PA05D_SERCOM0_PAD1
|
||||
#define SERCOM0_PAD2_DEFAULT PINMUX_PA06D_SERCOM0_PAD2
|
||||
#define SERCOM0_PAD3_DEFAULT PINMUX_PA07D_SERCOM0_PAD3
|
||||
|
||||
/* SERCOM1 */
|
||||
#if SAM_PART_IS_DEFINED(SAMD21G15L) || SAM_PART_IS_DEFINED(SAMD21G16L)
|
||||
#define SERCOM1_PAD0_DEFAULT PINMUX_PA16C_SERCOM1_PAD0
|
||||
#define SERCOM1_PAD1_DEFAULT PINMUX_PA17C_SERCOM1_PAD1
|
||||
#define SERCOM1_PAD2_DEFAULT PINMUX_PA18C_SERCOM1_PAD2
|
||||
#define SERCOM1_PAD3_DEFAULT PINMUX_PA19C_SERCOM1_PAD3
|
||||
#else
|
||||
#define SERCOM1_PAD0_DEFAULT PINMUX_PA00D_SERCOM1_PAD0
|
||||
#define SERCOM1_PAD1_DEFAULT PINMUX_PA01D_SERCOM1_PAD1
|
||||
#define SERCOM1_PAD2_DEFAULT PINMUX_PA30D_SERCOM1_PAD2
|
||||
#define SERCOM1_PAD3_DEFAULT PINMUX_PA31D_SERCOM1_PAD3
|
||||
#endif
|
||||
|
||||
/* SERCOM2 */
|
||||
#define SERCOM2_PAD0_DEFAULT PINMUX_PA08D_SERCOM2_PAD0
|
||||
#define SERCOM2_PAD1_DEFAULT PINMUX_PA09D_SERCOM2_PAD1
|
||||
#define SERCOM2_PAD2_DEFAULT PINMUX_PA10D_SERCOM2_PAD2
|
||||
#define SERCOM2_PAD3_DEFAULT PINMUX_PA11D_SERCOM2_PAD3
|
||||
|
||||
/* SERCOM3 */
|
||||
#define SERCOM3_PAD0_DEFAULT PINMUX_PA16D_SERCOM3_PAD0
|
||||
#define SERCOM3_PAD1_DEFAULT PINMUX_PA17D_SERCOM3_PAD1
|
||||
#define SERCOM3_PAD2_DEFAULT PINMUX_PA18D_SERCOM3_PAD2
|
||||
#define SERCOM3_PAD3_DEFAULT PINMUX_PA19D_SERCOM3_PAD3
|
||||
|
||||
#if !(SAMD20E || SAMD21E)
|
||||
/* SERCOM4 */
|
||||
#define SERCOM4_PAD0_DEFAULT PINMUX_PA12D_SERCOM4_PAD0
|
||||
#define SERCOM4_PAD1_DEFAULT PINMUX_PA13D_SERCOM4_PAD1
|
||||
#define SERCOM4_PAD2_DEFAULT PINMUX_PA14D_SERCOM4_PAD2
|
||||
#define SERCOM4_PAD3_DEFAULT PINMUX_PA15D_SERCOM4_PAD3
|
||||
|
||||
/* SERCOM5 */
|
||||
#define SERCOM5_PAD0_DEFAULT PINMUX_PA22D_SERCOM5_PAD0
|
||||
#define SERCOM5_PAD1_DEFAULT PINMUX_PA23D_SERCOM5_PAD1
|
||||
#define SERCOM5_PAD2_DEFAULT PINMUX_PA24D_SERCOM5_PAD2
|
||||
#define SERCOM5_PAD3_DEFAULT PINMUX_PA25D_SERCOM5_PAD3
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* SERCOM_PINOUT_H_INCLUDED */
|
||||
|
|
@ -1,116 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM USART Quick Start
|
||||
*
|
||||
* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_sercom_usart_basic_use_case Quick Start Guide for SERCOM USART - Basic
|
||||
*
|
||||
* This quick start will echo back characters typed into the terminal. In this
|
||||
* use case the USART will be configured with the following settings:
|
||||
* - Asynchronous mode
|
||||
* - 9600 Baudrate
|
||||
* - 8-bits, No Parity and one Stop Bit
|
||||
* - TX and RX enabled and connected to the Xplained Pro Embedded Debugger virtual COM port
|
||||
*
|
||||
* \section asfdoc_sam0_sercom_usart_basic_use_case_setup Setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_sercom_usart_basic_use_case_prereq Prerequisites
|
||||
* There are no special setup requirements for this use-case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_basic_use_case_setup_code Code
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_usart_basic_use.c module_inst
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_usart_basic_use.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_usart_basic_use.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_basic_use_case_setup_flow Workflow
|
||||
* -# Create a module software instance structure for the USART module to store
|
||||
* the USART driver state while it is in use.
|
||||
* \snippet qs_usart_basic_use.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Configure the USART module.
|
||||
* -# Create a USART module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical USART peripheral.
|
||||
* \snippet qs_usart_basic_use.c setup_config
|
||||
* -# Initialize the USART configuration struct with the module's default values.
|
||||
* \snippet qs_usart_basic_use.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the USART settings to configure the physical pinout, baudrate, and
|
||||
* other relevant parameters.
|
||||
* \snippet qs_usart_basic_use.c setup_change_config
|
||||
* -# Configure the USART module with the desired settings, retrying while the
|
||||
* driver is busy until the configuration is stressfully set.
|
||||
* \snippet qs_usart_basic_use.c setup_set_config
|
||||
* -# Enable the USART module.
|
||||
* \snippet qs_usart_basic_use.c setup_enable
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_usart_basic_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_basic_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_usart_basic_use.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_basic_use_case_main_flow Workflow
|
||||
* -# Send a string to the USART to show the demo is running, blocking until
|
||||
* all characters have been sent.
|
||||
* \snippet qs_usart_basic_use.c main_send_string
|
||||
* -# Enter an infinite loop to continuously echo received values on the USART.
|
||||
* \snippet qs_usart_basic_use.c main_loop
|
||||
* -# Perform a blocking read of the USART, storing the received character into
|
||||
* the previously declared temporary variable.
|
||||
* \snippet qs_usart_basic_use.c main_read
|
||||
* -# Echo the received variable back to the USART via a blocking write.
|
||||
* \snippet qs_usart_basic_use.c main_write
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
|
@ -1,130 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM USART Quick Start
|
||||
*
|
||||
* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_sercom_usart_callback_use_case Quick Start Guide for SERCOM USART - Callback
|
||||
*
|
||||
* This quick start will echo back characters typed into the terminal, using
|
||||
* asynchronous TX and RX callbacks from the USART peripheral. In this use case
|
||||
* the USART will be configured with the following settings:
|
||||
* - Asynchronous mode
|
||||
* - 9600 Baudrate
|
||||
* - 8-bits, No Parity and one Stop Bit
|
||||
* - TX and RX enabled and connected to the Xplained Pro Embedded Debugger virtual COM port
|
||||
*
|
||||
* \section asfdoc_sam0_sercom_usart_callback_use_case_setup Setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_sercom_usart_callback_use_case_prereq Prerequisites
|
||||
* There are no special setup requirements for this use-case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_callback_use_case_setup_code Code
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_usart_callback.c module_inst
|
||||
* \snippet qs_usart_callback.c rx_buffer_var
|
||||
*
|
||||
* Copy-paste the following callback function code to your user application:
|
||||
* \snippet qs_usart_callback.c callback_funcs
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_usart_callback.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_usart_callback.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_callback_use_case_setup_flow Workflow
|
||||
* -# Create a module software instance structure for the USART module to store
|
||||
* the USART driver state while it is in use.
|
||||
* \snippet qs_usart_callback.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Configure the USART module.
|
||||
* -# Create a USART module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical USART peripheral.
|
||||
* \snippet qs_usart_callback.c setup_config
|
||||
* -# Initialize the USART configuration struct with the module's default values.
|
||||
* \snippet qs_usart_callback.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the USART settings to configure the physical pinout, baudrate, and
|
||||
* other relevant parameters.
|
||||
* \snippet qs_usart_callback.c setup_change_config
|
||||
* -# Configure the USART module with the desired settings, retrying while the
|
||||
* driver is busy until the configuration is stressfully set.
|
||||
* \snippet qs_usart_callback.c setup_set_config
|
||||
* -# Enable the USART module.
|
||||
* \snippet qs_usart_callback.c setup_enable
|
||||
* -# Configure the USART callbacks.
|
||||
* -# Register the TX and RX callback functions with the driver.
|
||||
* \snippet qs_usart_callback.c setup_register_callbacks
|
||||
* -# Enable the TX and RX callbacks so that they will be called by the driver
|
||||
* when appropriate.
|
||||
* \snippet qs_usart_callback.c setup_enable_callbacks
|
||||
*
|
||||
* \section asfdoc_sam0_usart_callback_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_callback_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_usart_callback.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_callback_use_case_main_flow Workflow
|
||||
* -# Enable global interrupts, so that the callbacks can be fired.
|
||||
* \snippet qs_usart_callback.c enable_global_interrupts
|
||||
* -# Send a string to the USART to show the demo is running, blocking until
|
||||
* all characters have been sent.
|
||||
* \snippet qs_usart_callback.c main_send_string
|
||||
* -# Enter an infinite loop to continuously echo received values on the USART.
|
||||
* \snippet qs_usart_callback.c main_loop
|
||||
* -# Perform an asynchronous read of the USART, which will fire the registered
|
||||
* callback when characters are received.
|
||||
* \snippet qs_usart_callback.c main_read
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#include <asf.h>
|
||||
#include <conf_clocks.h>
|
||||
|
||||
|
|
@ -1,217 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Quick Start Guide for Using Usart driver with DMA
|
||||
*
|
||||
* Copyright (C) 2014-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_sercom_usart_dma_use_case Quick Start Guide for Using DMA with SERCOM USART
|
||||
*
|
||||
* The supported board list:
|
||||
* - SAM D21 Xplained Pro
|
||||
* - SAM R21 Xplained Pro
|
||||
* - SAM D11 Xplained Pro
|
||||
* - SAM DA1 Xplained Pro
|
||||
* - SAM L21 Xplained Pro
|
||||
* - SAM L22 Xplained Pro
|
||||
* - SAM C21 Xplained Pro
|
||||
*
|
||||
* This quick start will receive eight bytes of data from the PC terminal and transmit back the string
|
||||
* to the terminal through DMA. In this use case the USART will be configured with the following
|
||||
* settings:
|
||||
* - Asynchronous mode
|
||||
* - 9600 Baudrate
|
||||
* - 8-bits, No Parity and one Stop Bit
|
||||
* - TX and RX enabled and connected to the Xplained Pro Embedded Debugger virtual COM port
|
||||
*
|
||||
* \section asfdoc_sam0_sercom_usart_dma_use_case_setup Setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_sercom_usart_dma_use_case_prereq Prerequisites
|
||||
* There are no special setup requirements for this use-case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_dma_use_case_setup_code Code
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_usart_dma_use.c module_inst
|
||||
* \snippet qs_usart_dma_use.c dma_resource
|
||||
* \snippet qs_usart_dma_use.c usart_buffer
|
||||
* \snippet qs_usart_dma_use.c transfer_descriptor
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_usart_dma_use.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_usart_dma_use.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_dma_use_case_setup_flow Workflow
|
||||
*
|
||||
* \subsubsection asfdoc_sam0_usart_dma_use_case_setup_flow_inst Create variables
|
||||
* -# Create a module software instance structure for the USART module to store
|
||||
* the USART driver state while it is in use.
|
||||
* \snippet qs_usart_dma_use.c module_inst
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Create module software instance structures for DMA resources to store
|
||||
* the DMA resource state while it is in use.
|
||||
* \snippet qs_usart_dma_use.c dma_resource
|
||||
* \note This should never go out of scope as long as the module is in use.
|
||||
* In most cases, this should be global.
|
||||
*
|
||||
* -# Create a buffer to store the data to be transferred /received.
|
||||
* \snippet qs_usart_dma_use.c usart_buffer
|
||||
* -# Create DMA transfer descriptors for RX/TX.
|
||||
* \snippet qs_usart_dma_use.c transfer_descriptor
|
||||
*
|
||||
* \subsubsection asfdoc_sam0_usart_dma_use_case_setup_flow_usart Configure the USART
|
||||
* -# Create a USART module configuration struct, which can be filled out to
|
||||
* adjust the configuration of a physical USART peripheral.
|
||||
* \snippet qs_usart_dma_use.c setup_config
|
||||
* -# Initialize the USART configuration struct with the module's default values.
|
||||
* \snippet qs_usart_dma_use.c setup_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Alter the USART settings to configure the physical pinout, baudrate, and
|
||||
* other relevant parameters.
|
||||
* \snippet qs_usart_dma_use.c setup_change_config
|
||||
* -# Configure the USART module with the desired settings, retrying while the
|
||||
* driver is busy until the configuration is stressfully set.
|
||||
* \snippet qs_usart_dma_use.c setup_set_config
|
||||
* -# Enable the USART module.
|
||||
* \snippet qs_usart_dma_use.c setup_enable
|
||||
*
|
||||
* \subsubsection asfdoc_sam0_usart_dma_use_case_setup_flow_dma Configure DMA
|
||||
* -# Create a callback function of receiver done.
|
||||
* \snippet qs_usart_dma_use.c transfer_done_rx
|
||||
*
|
||||
* -# Create a callback function of transmission done.
|
||||
* \snippet qs_usart_dma_use.c transfer_done_tx
|
||||
*
|
||||
* -# Create a DMA resource configuration structure, which can be filled out to
|
||||
* adjust the configuration of a single DMA transfer.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_1
|
||||
*
|
||||
* -# Initialize the DMA resource configuration struct with the module's
|
||||
* default values.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Set extra configurations for the DMA resource. It is using peripheral
|
||||
* trigger. SERCOM TX empty trigger causes a beat transfer in
|
||||
* this example.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_3
|
||||
*
|
||||
* -# Allocate a DMA resource with the configurations.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_4
|
||||
*
|
||||
* -# Create a DMA transfer descriptor configuration structure, which can be
|
||||
* filled out to adjust the configuration of a single DMA transfer.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_5
|
||||
*
|
||||
* -# Initialize the DMA transfer descriptor configuration struct with the module's
|
||||
* default values.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_6
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Set the specific parameters for a DMA transfer with transfer size, source
|
||||
* address, and destination address.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_7
|
||||
*
|
||||
* -# Create the DMA transfer descriptor.
|
||||
* \snippet qs_usart_dma_use.c setup_rx_8
|
||||
*
|
||||
* -# Create a DMA resource configuration structure for TX, which can be filled
|
||||
* out to adjust the configuration of a single DMA transfer.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_1
|
||||
*
|
||||
* -# Initialize the DMA resource configuration struct with the module's
|
||||
* default values.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_2
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Set extra configurations for the DMA resource. It is using peripheral
|
||||
* trigger. SERCOM RX Ready trigger causes a beat transfer in
|
||||
* this example.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_3
|
||||
*
|
||||
* -# Allocate a DMA resource with the configurations.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_4
|
||||
*
|
||||
* -# Create a DMA transfer descriptor configuration structure, which can be
|
||||
* filled out to adjust the configuration of a single DMA transfer.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_5
|
||||
*
|
||||
* -# Initialize the DMA transfer descriptor configuration struct with the module's
|
||||
* default values.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_6
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Set the specific parameters for a DMA transfer with transfer size, source
|
||||
* address, and destination address.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_7
|
||||
*
|
||||
* -# Create the DMA transfer descriptor.
|
||||
* \snippet qs_usart_dma_use.c setup_tx_8
|
||||
*
|
||||
* \section asfdoc_sam0_usart_dma_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_dma_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_usart_dma_use.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_dma_use_case_main_flow Workflow
|
||||
* -# Wait for receiving data.
|
||||
* \snippet qs_usart_dma_use.c main_1
|
||||
*
|
||||
* -# Enter endless loop.
|
||||
* \snippet qs_usart_dma_use.c endless_loop
|
||||
*/
|
||||
|
|
@ -1,104 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM USART LIN Quick Start
|
||||
*
|
||||
* Copyright (C) 2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_sercom_usart_lin_use_case Quick Start Guide for SERCOM USART LIN
|
||||
*
|
||||
* The supported board list:
|
||||
* - SAMC21 Xplained Pro
|
||||
*
|
||||
* This quick start will set up LIN frame format transmission according to your
|
||||
* configuration \c CONF_LIN_NODE_TYPE.
|
||||
* For LIN master, it will send LIN command after startup.
|
||||
* For LIN salve, once received a format from LIN master with ID \c LIN_ID_FIELD_VALUE,
|
||||
* it will reply four data bytes plus a checksum.
|
||||
*
|
||||
* \section asfdoc_sam0_sercom_usart_lin_use_case_setup Setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_sercom_usart_lin_use_case_prereq Prerequisites
|
||||
* When verify data transmission between LIN master and slave, two boards are needed:
|
||||
* one is for LIN master and the other is for LIN slave.
|
||||
* connect LIN master LIN PIN with LIN slave LIN PIN.
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_lin_use_case_setup_code Code
|
||||
* Add to the main application source file, outside of any functions:
|
||||
* \snippet qs_lin.c module_var
|
||||
*
|
||||
* Copy-paste the following setup code to your user application:
|
||||
* \snippet qs_lin.c setup
|
||||
*
|
||||
* Add to user application initialization (typically the start of \c main()):
|
||||
* \snippet qs_lin.c setup_init
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_lin_use_case_setup_flow Workflow
|
||||
* -# Create USART CDC and LIN module software instance structure for the USART module to store
|
||||
* the USART driver state while it is in use.
|
||||
* \snippet qs_lin.c module_inst
|
||||
* -# Define LIN ID field for header format.
|
||||
* \snippet qs_lin.c lin_id
|
||||
* \note The ID \c LIN_ID_FIELD_VALUE is eight bits as [P1,P0,ID5...ID0], when it's 0x64, the
|
||||
* data field length is four bytes plus a checksum byte.
|
||||
*
|
||||
* -# Define LIN RX/TX buffer.
|
||||
* \snippet qs_lin.c lin_buffer
|
||||
* \note For \c tx_buffer and \c rx_buffer, the last byte is for checksum.
|
||||
*
|
||||
* -# Configure the USART CDC for output message.
|
||||
* \snippet qs_lin.c CDC_setup
|
||||
*
|
||||
* -# Configure the USART LIN module.
|
||||
* \snippet qs_lin.c lin_setup
|
||||
* \note The LIN frame format can be configured as master or slave, refer to \c CONF_LIN_NODE_TYPE .
|
||||
*
|
||||
* \section asfdoc_sam0_usart_lin_use_case_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_lin_use_case_main_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_lin.c main_setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_usart_lin_use_case_main_flow Workflow
|
||||
* -# Set up USART LIN module.
|
||||
* \snippet qs_lin.c configure_lin
|
||||
* -# For LIN master, sending LIN command. For LIN slaver, start reading data .
|
||||
* \snippet qs_lin.c lin_master_cmd
|
||||
*/
|
||||
|
|
@ -1,817 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM SERCOM USART Driver
|
||||
*
|
||||
* Copyright (C) 2012-2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#include "usart.h"
|
||||
#include <pinmux.h>
|
||||
#if USART_CALLBACK_MODE == true
|
||||
# include "usart_interrupt.h"
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Set Configuration of the USART module
|
||||
*/
|
||||
static enum status_code _usart_set_config(
|
||||
struct usart_module *const module,
|
||||
const struct usart_config *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(module->hw);
|
||||
|
||||
/* Get a pointer to the hardware module instance */
|
||||
SercomUsart *const usart_hw = &(module->hw->USART);
|
||||
|
||||
/* Index for generic clock */
|
||||
uint32_t sercom_index = _sercom_get_sercom_inst_index(module->hw);
|
||||
uint32_t gclk_index = sercom_index + SERCOM0_GCLK_ID_CORE;
|
||||
|
||||
/* Cache new register values to minimize the number of register writes */
|
||||
uint32_t ctrla = 0;
|
||||
uint32_t ctrlb = 0;
|
||||
#ifdef FEATURE_USART_ISO7816
|
||||
uint32_t ctrlc = 0;
|
||||
#endif
|
||||
uint16_t baud = 0;
|
||||
uint32_t transfer_mode;
|
||||
|
||||
enum sercom_asynchronous_operation_mode mode = SERCOM_ASYNC_OPERATION_MODE_ARITHMETIC;
|
||||
enum sercom_asynchronous_sample_num sample_num = SERCOM_ASYNC_SAMPLE_NUM_16;
|
||||
|
||||
#ifdef FEATURE_USART_OVER_SAMPLE
|
||||
switch (config->sample_rate) {
|
||||
case USART_SAMPLE_RATE_16X_ARITHMETIC:
|
||||
mode = SERCOM_ASYNC_OPERATION_MODE_ARITHMETIC;
|
||||
sample_num = SERCOM_ASYNC_SAMPLE_NUM_16;
|
||||
break;
|
||||
case USART_SAMPLE_RATE_8X_ARITHMETIC:
|
||||
mode = SERCOM_ASYNC_OPERATION_MODE_ARITHMETIC;
|
||||
sample_num = SERCOM_ASYNC_SAMPLE_NUM_8;
|
||||
break;
|
||||
case USART_SAMPLE_RATE_3X_ARITHMETIC:
|
||||
mode = SERCOM_ASYNC_OPERATION_MODE_ARITHMETIC;
|
||||
sample_num = SERCOM_ASYNC_SAMPLE_NUM_3;
|
||||
break;
|
||||
case USART_SAMPLE_RATE_16X_FRACTIONAL:
|
||||
mode = SERCOM_ASYNC_OPERATION_MODE_FRACTIONAL;
|
||||
sample_num = SERCOM_ASYNC_SAMPLE_NUM_16;
|
||||
break;
|
||||
case USART_SAMPLE_RATE_8X_FRACTIONAL:
|
||||
mode = SERCOM_ASYNC_OPERATION_MODE_FRACTIONAL;
|
||||
sample_num = SERCOM_ASYNC_SAMPLE_NUM_8;
|
||||
break;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Set data order, internal muxing, and clock polarity */
|
||||
ctrla = (uint32_t)config->data_order |
|
||||
(uint32_t)config->mux_setting |
|
||||
#ifdef FEATURE_USART_OVER_SAMPLE
|
||||
config->sample_adjustment |
|
||||
config->sample_rate |
|
||||
#endif
|
||||
#ifdef FEATURE_USART_IMMEDIATE_BUFFER_OVERFLOW_NOTIFICATION
|
||||
(config->immediate_buffer_overflow_notification << SERCOM_USART_CTRLA_IBON_Pos) |
|
||||
#endif
|
||||
(config->clock_polarity_inverted << SERCOM_USART_CTRLA_CPOL_Pos);
|
||||
|
||||
enum status_code status_code = STATUS_OK;
|
||||
|
||||
transfer_mode = (uint32_t)config->transfer_mode;
|
||||
#ifdef FEATURE_USART_ISO7816
|
||||
if(config->iso7816_config.enabled) {
|
||||
transfer_mode = config->iso7816_config.protocol_t;
|
||||
}
|
||||
#endif
|
||||
/* Get baud value from mode and clock */
|
||||
#ifdef FEATURE_USART_ISO7816
|
||||
if(config->iso7816_config.enabled) {
|
||||
baud = config->baudrate;
|
||||
} else {
|
||||
#endif
|
||||
switch (transfer_mode)
|
||||
{
|
||||
case USART_TRANSFER_SYNCHRONOUSLY:
|
||||
if (!config->use_external_clock) {
|
||||
status_code = _sercom_get_sync_baud_val(config->baudrate,
|
||||
system_gclk_chan_get_hz(gclk_index), &baud);
|
||||
}
|
||||
|
||||
break;
|
||||
|
||||
case USART_TRANSFER_ASYNCHRONOUSLY:
|
||||
if (config->use_external_clock) {
|
||||
status_code =
|
||||
_sercom_get_async_baud_val(config->baudrate,
|
||||
config->ext_clock_freq, &baud, mode, sample_num);
|
||||
} else {
|
||||
status_code =
|
||||
_sercom_get_async_baud_val(config->baudrate,
|
||||
system_gclk_chan_get_hz(gclk_index), &baud, mode, sample_num);
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
/* Check if calculating the baudrate failed */
|
||||
if (status_code != STATUS_OK) {
|
||||
/* Abort */
|
||||
return status_code;
|
||||
}
|
||||
#ifdef FEATURE_USART_ISO7816
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef FEATURE_USART_IRDA
|
||||
if(config->encoding_format_enable) {
|
||||
usart_hw->RXPL.reg = config->receive_pulse_length;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Wait until synchronization is complete */
|
||||
_usart_wait_for_sync(module);
|
||||
|
||||
/*Set baud val */
|
||||
usart_hw->BAUD.reg = baud;
|
||||
|
||||
/* Set sample mode */
|
||||
ctrla |= transfer_mode;
|
||||
|
||||
if (config->use_external_clock == false) {
|
||||
ctrla |= SERCOM_USART_CTRLA_MODE(0x1);
|
||||
}
|
||||
else {
|
||||
ctrla |= SERCOM_USART_CTRLA_MODE(0x0);
|
||||
}
|
||||
|
||||
/* Set stopbits and enable transceivers */
|
||||
ctrlb =
|
||||
#ifdef FEATURE_USART_IRDA
|
||||
(config->encoding_format_enable << SERCOM_USART_CTRLB_ENC_Pos) |
|
||||
#endif
|
||||
#ifdef FEATURE_USART_START_FRAME_DECTION
|
||||
(config->start_frame_detection_enable << SERCOM_USART_CTRLB_SFDE_Pos) |
|
||||
#endif
|
||||
#ifdef FEATURE_USART_COLLISION_DECTION
|
||||
(config->collision_detection_enable << SERCOM_USART_CTRLB_COLDEN_Pos) |
|
||||
#endif
|
||||
(config->receiver_enable << SERCOM_USART_CTRLB_RXEN_Pos) |
|
||||
(config->transmitter_enable << SERCOM_USART_CTRLB_TXEN_Pos);
|
||||
|
||||
#ifdef FEATURE_USART_ISO7816
|
||||
if(config->iso7816_config.enabled) {
|
||||
ctrla |= SERCOM_USART_CTRLA_FORM(0x07);
|
||||
if (config->iso7816_config.enable_inverse) {
|
||||
ctrla |= SERCOM_USART_CTRLA_TXINV | SERCOM_USART_CTRLA_RXINV;
|
||||
}
|
||||
ctrlb |= USART_CHARACTER_SIZE_8BIT;
|
||||
|
||||
switch(config->iso7816_config.protocol_t) {
|
||||
case ISO7816_PROTOCOL_T_0:
|
||||
ctrlb |= (uint32_t)config->stopbits;
|
||||
ctrlc |= SERCOM_USART_CTRLC_GTIME(config->iso7816_config.guard_time) | \
|
||||
(config->iso7816_config.inhibit_nack) | \
|
||||
(config->iso7816_config.successive_recv_nack) | \
|
||||
SERCOM_USART_CTRLC_MAXITER(config->iso7816_config.max_iterations);
|
||||
break;
|
||||
case ISO7816_PROTOCOL_T_1:
|
||||
ctrlb |= USART_STOPBITS_1;
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
#endif
|
||||
ctrlb |= (uint32_t)config->character_size;
|
||||
/* Check parity mode bits */
|
||||
if (config->parity != USART_PARITY_NONE) {
|
||||
ctrla |= SERCOM_USART_CTRLA_FORM(1);
|
||||
ctrlb |= config->parity;
|
||||
} else {
|
||||
#ifdef FEATURE_USART_LIN_SLAVE
|
||||
if(config->lin_slave_enable) {
|
||||
ctrla |= SERCOM_USART_CTRLA_FORM(0x4);
|
||||
} else {
|
||||
ctrla |= SERCOM_USART_CTRLA_FORM(0);
|
||||
}
|
||||
#else
|
||||
ctrla |= SERCOM_USART_CTRLA_FORM(0);
|
||||
#endif
|
||||
}
|
||||
#ifdef FEATURE_USART_ISO7816
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef FEATURE_USART_LIN_MASTER
|
||||
usart_hw->CTRLC.reg = ((usart_hw->CTRLC.reg) & SERCOM_USART_CTRLC_GTIME_Msk)
|
||||
| config->lin_header_delay
|
||||
| config->lin_break_length;
|
||||
|
||||
if (config->lin_node != LIN_INVALID_MODE) {
|
||||
ctrla &= ~(SERCOM_USART_CTRLA_FORM(0xf));
|
||||
ctrla |= config->lin_node;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Set whether module should run in standby. */
|
||||
if (config->run_in_standby || system_is_debugger_present()) {
|
||||
ctrla |= SERCOM_USART_CTRLA_RUNSTDBY;
|
||||
}
|
||||
|
||||
/* Wait until synchronization is complete */
|
||||
_usart_wait_for_sync(module);
|
||||
|
||||
/* Write configuration to CTRLB */
|
||||
usart_hw->CTRLB.reg = ctrlb;
|
||||
|
||||
/* Wait until synchronization is complete */
|
||||
_usart_wait_for_sync(module);
|
||||
|
||||
/* Write configuration to CTRLA */
|
||||
usart_hw->CTRLA.reg = ctrla;
|
||||
|
||||
#ifdef FEATURE_USART_RS485
|
||||
if ((usart_hw->CTRLA.reg & SERCOM_USART_CTRLA_FORM_Msk) != \
|
||||
SERCOM_USART_CTRLA_FORM(0x07)) {
|
||||
usart_hw->CTRLC.reg &= ~(SERCOM_USART_CTRLC_GTIME(0x7));
|
||||
usart_hw->CTRLC.reg |= SERCOM_USART_CTRLC_GTIME(config->rs485_guard_time);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef FEATURE_USART_ISO7816
|
||||
if(config->iso7816_config.enabled) {
|
||||
_usart_wait_for_sync(module);
|
||||
usart_hw->CTRLC.reg = ctrlc;
|
||||
}
|
||||
#endif
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Initializes the device
|
||||
*
|
||||
* Initializes the USART device based on the setting specified in the
|
||||
* configuration struct.
|
||||
*
|
||||
* \param[out] module Pointer to USART device
|
||||
* \param[in] hw Pointer to USART hardware instance
|
||||
* \param[in] config Pointer to configuration struct
|
||||
*
|
||||
* \return Status of the initialization.
|
||||
*
|
||||
* \retval STATUS_OK The initialization was successful
|
||||
* \retval STATUS_BUSY The USART module is busy
|
||||
* resetting
|
||||
* \retval STATUS_ERR_DENIED The USART has not been disabled in
|
||||
* advance of initialization
|
||||
* \retval STATUS_ERR_INVALID_ARG The configuration struct contains
|
||||
* invalid configuration
|
||||
* \retval STATUS_ERR_ALREADY_INITIALIZED The SERCOM instance has already been
|
||||
* initialized with different clock
|
||||
* configuration
|
||||
* \retval STATUS_ERR_BAUD_UNAVAILABLE The BAUD rate given by the
|
||||
* configuration
|
||||
* struct cannot be reached with
|
||||
* the current clock configuration
|
||||
*/
|
||||
enum status_code usart_init(
|
||||
struct usart_module *const module,
|
||||
Sercom *const hw,
|
||||
const struct usart_config *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(hw);
|
||||
Assert(config);
|
||||
|
||||
enum status_code status_code = STATUS_OK;
|
||||
|
||||
/* Assign module pointer to software instance struct */
|
||||
module->hw = hw;
|
||||
|
||||
/* Get a pointer to the hardware module instance */
|
||||
SercomUsart *const usart_hw = &(module->hw->USART);
|
||||
|
||||
uint32_t sercom_index = _sercom_get_sercom_inst_index(module->hw);
|
||||
uint32_t pm_index, gclk_index;
|
||||
#if (SAML22) || (SAMC20)
|
||||
pm_index = sercom_index + MCLK_APBCMASK_SERCOM0_Pos;
|
||||
gclk_index = sercom_index + SERCOM0_GCLK_ID_CORE;
|
||||
#elif (SAML21) || (SAMR30)
|
||||
if (sercom_index == 5) {
|
||||
pm_index = MCLK_APBDMASK_SERCOM5_Pos;
|
||||
gclk_index = SERCOM5_GCLK_ID_CORE;
|
||||
} else {
|
||||
pm_index = sercom_index + MCLK_APBCMASK_SERCOM0_Pos;
|
||||
gclk_index = sercom_index + SERCOM0_GCLK_ID_CORE;
|
||||
}
|
||||
#elif (SAMC21)
|
||||
pm_index = sercom_index + MCLK_APBCMASK_SERCOM0_Pos;
|
||||
|
||||
if (sercom_index == 5){
|
||||
gclk_index = SERCOM5_GCLK_ID_CORE;
|
||||
} else {
|
||||
gclk_index = sercom_index + SERCOM0_GCLK_ID_CORE;
|
||||
}
|
||||
#else
|
||||
pm_index = sercom_index + PM_APBCMASK_SERCOM0_Pos;
|
||||
gclk_index = sercom_index + SERCOM0_GCLK_ID_CORE;
|
||||
#endif
|
||||
|
||||
if (usart_hw->CTRLA.reg & SERCOM_USART_CTRLA_SWRST) {
|
||||
/* The module is busy resetting itself */
|
||||
return STATUS_BUSY;
|
||||
}
|
||||
|
||||
if (usart_hw->CTRLA.reg & SERCOM_USART_CTRLA_ENABLE) {
|
||||
/* Check the module is enabled */
|
||||
return STATUS_ERR_DENIED;
|
||||
}
|
||||
|
||||
/* Turn on module in PM */
|
||||
#if (SAML21) || (SAMR30)
|
||||
if (sercom_index == 5) {
|
||||
system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBD, 1 << pm_index);
|
||||
} else {
|
||||
system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBC, 1 << pm_index);
|
||||
}
|
||||
#else
|
||||
system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBC, 1 << pm_index);
|
||||
#endif
|
||||
|
||||
/* Set up the GCLK for the module */
|
||||
struct system_gclk_chan_config gclk_chan_conf;
|
||||
system_gclk_chan_get_config_defaults(&gclk_chan_conf);
|
||||
gclk_chan_conf.source_generator = config->generator_source;
|
||||
system_gclk_chan_set_config(gclk_index, &gclk_chan_conf);
|
||||
system_gclk_chan_enable(gclk_index);
|
||||
sercom_set_gclk_generator(config->generator_source, false);
|
||||
|
||||
/* Set character size */
|
||||
module->character_size = config->character_size;
|
||||
|
||||
/* Set transmitter and receiver status */
|
||||
module->receiver_enabled = config->receiver_enable;
|
||||
module->transmitter_enabled = config->transmitter_enable;
|
||||
|
||||
#ifdef FEATURE_USART_LIN_SLAVE
|
||||
module->lin_slave_enabled = config->lin_slave_enable;
|
||||
#endif
|
||||
#ifdef FEATURE_USART_START_FRAME_DECTION
|
||||
module->start_frame_detection_enabled = config->start_frame_detection_enable;
|
||||
#endif
|
||||
#ifdef FEATURE_USART_ISO7816
|
||||
module->iso7816_mode_enabled = config->iso7816_config.enabled;
|
||||
#endif
|
||||
/* Set configuration according to the config struct */
|
||||
status_code = _usart_set_config(module, config);
|
||||
if(status_code != STATUS_OK) {
|
||||
return status_code;
|
||||
}
|
||||
|
||||
struct system_pinmux_config pin_conf;
|
||||
system_pinmux_get_config_defaults(&pin_conf);
|
||||
pin_conf.direction = SYSTEM_PINMUX_PIN_DIR_INPUT;
|
||||
pin_conf.input_pull = SYSTEM_PINMUX_PIN_PULL_NONE;
|
||||
|
||||
uint32_t pad_pinmuxes[] = {
|
||||
config->pinmux_pad0, config->pinmux_pad1,
|
||||
config->pinmux_pad2, config->pinmux_pad3
|
||||
};
|
||||
|
||||
/* Configure the SERCOM pins according to the user configuration */
|
||||
for (uint8_t pad = 0; pad < 4; pad++) {
|
||||
uint32_t current_pinmux = pad_pinmuxes[pad];
|
||||
|
||||
if (current_pinmux == PINMUX_DEFAULT) {
|
||||
current_pinmux = _sercom_get_default_pad(hw, pad);
|
||||
}
|
||||
|
||||
if (current_pinmux != PINMUX_UNUSED) {
|
||||
pin_conf.mux_position = current_pinmux & 0xFFFF;
|
||||
system_pinmux_pin_set_config(current_pinmux >> 16, &pin_conf);
|
||||
}
|
||||
}
|
||||
|
||||
#if USART_CALLBACK_MODE == true
|
||||
/* Initialize parameters */
|
||||
for (uint32_t i = 0; i < USART_CALLBACK_N; i++) {
|
||||
module->callback[i] = NULL;
|
||||
}
|
||||
|
||||
module->tx_buffer_ptr = NULL;
|
||||
module->rx_buffer_ptr = NULL;
|
||||
module->remaining_tx_buffer_length = 0x0000;
|
||||
module->remaining_rx_buffer_length = 0x0000;
|
||||
module->callback_reg_mask = 0x00;
|
||||
module->callback_enable_mask = 0x00;
|
||||
module->rx_status = STATUS_OK;
|
||||
module->tx_status = STATUS_OK;
|
||||
|
||||
/* Set interrupt handler and register USART software module struct in
|
||||
* look-up table */
|
||||
uint8_t instance_index = _sercom_get_sercom_inst_index(module->hw);
|
||||
_sercom_set_handler(instance_index, _usart_interrupt_handler);
|
||||
_sercom_instances[instance_index] = module;
|
||||
#endif
|
||||
|
||||
return status_code;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Transmit a character via the USART
|
||||
*
|
||||
* This blocking function will transmit a single character via the
|
||||
* USART.
|
||||
*
|
||||
* \param[in] module Pointer to the software instance struct
|
||||
* \param[in] tx_data Data to transfer
|
||||
*
|
||||
* \return Status of the operation.
|
||||
* \retval STATUS_OK If the operation was completed
|
||||
* \retval STATUS_BUSY If the operation was not completed, due to the USART
|
||||
* module being busy
|
||||
* \retval STATUS_ERR_DENIED If the transmitter is not enabled
|
||||
*/
|
||||
enum status_code usart_write_wait(
|
||||
struct usart_module *const module,
|
||||
const uint16_t tx_data)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(module->hw);
|
||||
|
||||
/* Get a pointer to the hardware module instance */
|
||||
SercomUsart *const usart_hw = &(module->hw->USART);
|
||||
|
||||
/* Check that the transmitter is enabled */
|
||||
if (!(module->transmitter_enabled)) {
|
||||
return STATUS_ERR_DENIED;
|
||||
}
|
||||
|
||||
#if USART_CALLBACK_MODE == true
|
||||
/* Check if the USART is busy doing asynchronous operation. */
|
||||
if (module->remaining_tx_buffer_length > 0) {
|
||||
return STATUS_BUSY;
|
||||
}
|
||||
|
||||
#else
|
||||
/* Check if USART is ready for new data */
|
||||
if (!(usart_hw->INTFLAG.reg & SERCOM_USART_INTFLAG_DRE)) {
|
||||
/* Return error code */
|
||||
return STATUS_BUSY;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Wait until synchronization is complete */
|
||||
_usart_wait_for_sync(module);
|
||||
|
||||
/* Write data to USART module */
|
||||
usart_hw->DATA.reg = tx_data;
|
||||
|
||||
while (!(usart_hw->INTFLAG.reg & SERCOM_USART_INTFLAG_TXC)) {
|
||||
/* Wait until data is sent */
|
||||
}
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Receive a character via the USART
|
||||
*
|
||||
* This blocking function will receive a character via the USART.
|
||||
*
|
||||
* \param[in] module Pointer to the software instance struct
|
||||
* \param[out] rx_data Pointer to received data
|
||||
*
|
||||
* \return Status of the operation.
|
||||
* \retval STATUS_OK If the operation was completed
|
||||
* \retval STATUS_BUSY If the operation was not completed,
|
||||
* due to the USART module being busy
|
||||
* \retval STATUS_ERR_BAD_FORMAT If the operation was not completed,
|
||||
* due to configuration mismatch between USART
|
||||
* and the sender
|
||||
* \retval STATUS_ERR_BAD_OVERFLOW If the operation was not completed,
|
||||
* due to the baudrate being too low or the
|
||||
* system frequency being too high
|
||||
* \retval STATUS_ERR_BAD_DATA If the operation was not completed, due to
|
||||
* data being corrupted
|
||||
* \retval STATUS_ERR_DENIED If the receiver is not enabled
|
||||
*/
|
||||
enum status_code usart_read_wait(
|
||||
struct usart_module *const module,
|
||||
uint16_t *const rx_data)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(module->hw);
|
||||
|
||||
/* Error variable */
|
||||
uint8_t error_code;
|
||||
|
||||
/* Get a pointer to the hardware module instance */
|
||||
SercomUsart *const usart_hw = &(module->hw->USART);
|
||||
|
||||
/* Check that the receiver is enabled */
|
||||
if (!(module->receiver_enabled)) {
|
||||
return STATUS_ERR_DENIED;
|
||||
}
|
||||
|
||||
#if USART_CALLBACK_MODE == true
|
||||
/* Check if the USART is busy doing asynchronous operation. */
|
||||
if (module->remaining_rx_buffer_length > 0) {
|
||||
return STATUS_BUSY;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Check if USART has new data */
|
||||
if (!(usart_hw->INTFLAG.reg & SERCOM_USART_INTFLAG_RXC)) {
|
||||
/* Return error code */
|
||||
return STATUS_BUSY;
|
||||
}
|
||||
|
||||
/* Wait until synchronization is complete */
|
||||
_usart_wait_for_sync(module);
|
||||
|
||||
/* Read out the status code and mask away all but the 3 LSBs*/
|
||||
error_code = (uint8_t)(usart_hw->STATUS.reg & SERCOM_USART_STATUS_MASK);
|
||||
|
||||
/* Check if an error has occurred during the receiving */
|
||||
if (error_code) {
|
||||
/* Check which error occurred */
|
||||
if (error_code & SERCOM_USART_STATUS_FERR) {
|
||||
/* Clear flag by writing a 1 to it and
|
||||
* return with an error code */
|
||||
usart_hw->STATUS.reg = SERCOM_USART_STATUS_FERR;
|
||||
|
||||
return STATUS_ERR_BAD_FORMAT;
|
||||
} else if (error_code & SERCOM_USART_STATUS_BUFOVF) {
|
||||
/* Clear flag by writing a 1 to it and
|
||||
* return with an error code */
|
||||
usart_hw->STATUS.reg = SERCOM_USART_STATUS_BUFOVF;
|
||||
|
||||
return STATUS_ERR_OVERFLOW;
|
||||
} else if (error_code & SERCOM_USART_STATUS_PERR) {
|
||||
/* Clear flag by writing a 1 to it and
|
||||
* return with an error code */
|
||||
usart_hw->STATUS.reg = SERCOM_USART_STATUS_PERR;
|
||||
|
||||
return STATUS_ERR_BAD_DATA;
|
||||
}
|
||||
#ifdef FEATURE_USART_LIN_SLAVE
|
||||
else if (error_code & SERCOM_USART_STATUS_ISF) {
|
||||
/* Clear flag by writing 1 to it and
|
||||
* return with an error code */
|
||||
usart_hw->STATUS.reg = SERCOM_USART_STATUS_ISF;
|
||||
|
||||
return STATUS_ERR_PROTOCOL;
|
||||
}
|
||||
#endif
|
||||
#ifdef FEATURE_USART_COLLISION_DECTION
|
||||
else if (error_code & SERCOM_USART_STATUS_COLL) {
|
||||
/* Clear flag by writing 1 to it
|
||||
* return with an error code */
|
||||
usart_hw->STATUS.reg = SERCOM_USART_STATUS_COLL;
|
||||
|
||||
return STATUS_ERR_PACKET_COLLISION;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Read data from USART module */
|
||||
*rx_data = usart_hw->DATA.reg;
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Transmit a buffer of characters via the USART
|
||||
*
|
||||
* This blocking function will transmit a block of \c length characters
|
||||
* via the USART.
|
||||
*
|
||||
* \note Using this function in combination with the interrupt (\c _job) functions is
|
||||
* not recommended as it has no functionality to check if there is an
|
||||
* ongoing interrupt driven operation running or not.
|
||||
*
|
||||
* \param[in] module Pointer to USART software instance struct
|
||||
* \param[in] tx_data Pointer to data to transmit
|
||||
* \param[in] length Number of characters to transmit
|
||||
*
|
||||
* \note If using 9-bit data, the array that *tx_data point to should be defined
|
||||
* as uint16_t array and should be casted to uint8_t* pointer. Because it
|
||||
* is an address pointer, the highest byte is not discarded. For example:
|
||||
* \code
|
||||
#define TX_LEN 3
|
||||
uint16_t tx_buf[TX_LEN] = {0x0111, 0x0022, 0x0133};
|
||||
usart_write_buffer_wait(&module, (uint8_t*)tx_buf, TX_LEN);
|
||||
\endcode
|
||||
*
|
||||
* \return Status of the operation.
|
||||
* \retval STATUS_OK If operation was completed
|
||||
* \retval STATUS_ERR_INVALID_ARG If operation was not completed, due to invalid
|
||||
* arguments
|
||||
* \retval STATUS_ERR_TIMEOUT If operation was not completed, due to USART
|
||||
* module timing out
|
||||
* \retval STATUS_ERR_DENIED If the transmitter is not enabled
|
||||
*/
|
||||
enum status_code usart_write_buffer_wait(
|
||||
struct usart_module *const module,
|
||||
const uint8_t *tx_data,
|
||||
uint16_t length)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(module->hw);
|
||||
|
||||
/* Check if the buffer length is valid */
|
||||
if (length == 0) {
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
/* Check that the transmitter is enabled */
|
||||
if (!(module->transmitter_enabled)) {
|
||||
return STATUS_ERR_DENIED;
|
||||
}
|
||||
|
||||
/* Get a pointer to the hardware module instance */
|
||||
SercomUsart *const usart_hw = &(module->hw->USART);
|
||||
|
||||
/* Wait until synchronization is complete */
|
||||
_usart_wait_for_sync(module);
|
||||
|
||||
uint16_t tx_pos = 0;
|
||||
|
||||
/* Blocks while buffer is being transferred */
|
||||
while (length--) {
|
||||
/* Wait for the USART to be ready for new data and abort
|
||||
* operation if it doesn't get ready within the timeout*/
|
||||
for (uint32_t i = 0; i <= USART_TIMEOUT; i++) {
|
||||
if (usart_hw->INTFLAG.reg & SERCOM_USART_INTFLAG_DRE) {
|
||||
break;
|
||||
} else if (i == USART_TIMEOUT) {
|
||||
return STATUS_ERR_TIMEOUT;
|
||||
}
|
||||
}
|
||||
|
||||
/* Data to send is at least 8 bits long */
|
||||
uint16_t data_to_send = tx_data[tx_pos++];
|
||||
|
||||
/* Check if the character size exceeds 8 bit */
|
||||
if (module->character_size == USART_CHARACTER_SIZE_9BIT) {
|
||||
data_to_send |= (tx_data[tx_pos++] << 8);
|
||||
}
|
||||
|
||||
/* Send the data through the USART module */
|
||||
usart_write_wait(module, data_to_send);
|
||||
}
|
||||
|
||||
/* Wait until Transmit is complete or timeout */
|
||||
for (uint32_t i = 0; i <= USART_TIMEOUT; i++) {
|
||||
if (usart_hw->INTFLAG.reg & SERCOM_USART_INTFLAG_TXC) {
|
||||
break;
|
||||
} else if (i == USART_TIMEOUT) {
|
||||
return STATUS_ERR_TIMEOUT;
|
||||
}
|
||||
}
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Receive a buffer of \c length characters via the USART
|
||||
*
|
||||
* This blocking function will receive a block of \c length characters
|
||||
* via the USART.
|
||||
*
|
||||
* \note Using this function in combination with the interrupt (\c *_job)
|
||||
* functions is not recommended as it has no functionality to check if
|
||||
* there is an ongoing interrupt driven operation running or not.
|
||||
*
|
||||
* \param[in] module Pointer to USART software instance struct
|
||||
* \param[out] rx_data Pointer to receive buffer
|
||||
* \param[in] length Number of characters to receive
|
||||
*
|
||||
* \note If using 9-bit data, the array that *rx_data point to should be defined
|
||||
* as uint16_t array and should be casted to uint8_t* pointer. Because it
|
||||
* is an address pointer, the highest byte is not discarded. For example:
|
||||
* \code
|
||||
#define RX_LEN 3
|
||||
uint16_t rx_buf[RX_LEN] = {0x0,};
|
||||
usart_read_buffer_wait(&module, (uint8_t*)rx_buf, RX_LEN);
|
||||
\endcode
|
||||
*
|
||||
* \return Status of the operation.
|
||||
* \retval STATUS_OK If operation was completed
|
||||
* \retval STATUS_ERR_INVALID_ARG If operation was not completed, due to an
|
||||
* invalid argument being supplied
|
||||
* \retval STATUS_ERR_TIMEOUT If operation was not completed, due
|
||||
* to USART module timing out
|
||||
* \retval STATUS_ERR_BAD_FORMAT If the operation was not completed,
|
||||
* due to a configuration mismatch
|
||||
* between USART and the sender
|
||||
* \retval STATUS_ERR_BAD_OVERFLOW If the operation was not completed,
|
||||
* due to the baudrate being too low or the
|
||||
* system frequency being too high
|
||||
* \retval STATUS_ERR_BAD_DATA If the operation was not completed, due
|
||||
* to data being corrupted
|
||||
* \retval STATUS_ERR_DENIED If the receiver is not enabled
|
||||
*/
|
||||
enum status_code usart_read_buffer_wait(
|
||||
struct usart_module *const module,
|
||||
uint8_t *rx_data,
|
||||
uint16_t length)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(module->hw);
|
||||
|
||||
/* Check if the buffer length is valid */
|
||||
if (length == 0) {
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
/* Check that the receiver is enabled */
|
||||
if (!(module->receiver_enabled)) {
|
||||
return STATUS_ERR_DENIED;
|
||||
}
|
||||
|
||||
/* Get a pointer to the hardware module instance */
|
||||
SercomUsart *const usart_hw = &(module->hw->USART);
|
||||
|
||||
uint16_t rx_pos = 0;
|
||||
|
||||
/* Blocks while buffer is being received */
|
||||
while (length--) {
|
||||
/* Wait for the USART to have new data and abort operation if it
|
||||
* doesn't get ready within the timeout*/
|
||||
for (uint32_t i = 0; i <= USART_TIMEOUT; i++) {
|
||||
if (usart_hw->INTFLAG.reg & SERCOM_USART_INTFLAG_RXC) {
|
||||
break;
|
||||
} else if (i == USART_TIMEOUT) {
|
||||
return STATUS_ERR_TIMEOUT;
|
||||
}
|
||||
}
|
||||
|
||||
enum status_code retval;
|
||||
uint16_t received_data = 0;
|
||||
|
||||
retval = usart_read_wait(module, &received_data);
|
||||
|
||||
if (retval != STATUS_OK) {
|
||||
/* Overflow, abort */
|
||||
return retval;
|
||||
}
|
||||
|
||||
/* Read value will be at least 8-bits long */
|
||||
rx_data[rx_pos++] = received_data;
|
||||
|
||||
/* If 9-bit data, write next received byte to the buffer */
|
||||
if (module->character_size == USART_CHARACTER_SIZE_9BIT) {
|
||||
rx_data[rx_pos++] = (received_data >> 8);
|
||||
}
|
||||
}
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -1,666 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM SERCOM USART Asynchronous Driver
|
||||
*
|
||||
* Copyright (C) 2012-2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#include "usart_interrupt.h"
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Asynchronous write of a buffer with a given length
|
||||
*
|
||||
* \param[in] module Pointer to USART software instance struct
|
||||
* \param[in] tx_data Pointer to data to be transmitted
|
||||
* \param[in] length Length of data buffer
|
||||
*
|
||||
*/
|
||||
enum status_code _usart_write_buffer(
|
||||
struct usart_module *const module,
|
||||
uint8_t *tx_data,
|
||||
uint16_t length)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(module->hw);
|
||||
Assert(tx_data);
|
||||
|
||||
/* Get a pointer to the hardware module instance */
|
||||
SercomUsart *const usart_hw = &(module->hw->USART);
|
||||
|
||||
system_interrupt_enter_critical_section();
|
||||
|
||||
/* Check if the USART transmitter is busy */
|
||||
if (module->remaining_tx_buffer_length > 0) {
|
||||
system_interrupt_leave_critical_section();
|
||||
return STATUS_BUSY;
|
||||
}
|
||||
|
||||
/* Write parameters to the device instance */
|
||||
module->remaining_tx_buffer_length = length;
|
||||
|
||||
system_interrupt_leave_critical_section();
|
||||
|
||||
module->tx_buffer_ptr = tx_data;
|
||||
module->tx_status = STATUS_BUSY;
|
||||
|
||||
/* Enable the Data Register Empty Interrupt */
|
||||
usart_hw->INTENSET.reg = SERCOM_USART_INTFLAG_DRE;
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Asynchronous read of a buffer with a given length
|
||||
*
|
||||
* \param[in] module Pointer to USART software instance struct
|
||||
* \param[in] rx_data Pointer to data to be received
|
||||
* \param[in] length Length of data buffer
|
||||
*
|
||||
*/
|
||||
enum status_code _usart_read_buffer(
|
||||
struct usart_module *const module,
|
||||
uint8_t *rx_data,
|
||||
uint16_t length)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(module->hw);
|
||||
Assert(rx_data);
|
||||
|
||||
/* Get a pointer to the hardware module instance */
|
||||
SercomUsart *const usart_hw = &(module->hw->USART);
|
||||
|
||||
system_interrupt_enter_critical_section();
|
||||
|
||||
/* Check if the USART receiver is busy */
|
||||
if (module->remaining_rx_buffer_length > 0) {
|
||||
system_interrupt_leave_critical_section();
|
||||
return STATUS_BUSY;
|
||||
}
|
||||
|
||||
/* Set length for the buffer and the pointer, and let
|
||||
* the interrupt handler do the rest */
|
||||
module->remaining_rx_buffer_length = length;
|
||||
|
||||
system_interrupt_leave_critical_section();
|
||||
|
||||
module->rx_buffer_ptr = rx_data;
|
||||
module->rx_status = STATUS_BUSY;
|
||||
|
||||
/* Enable the RX Complete Interrupt */
|
||||
usart_hw->INTENSET.reg = SERCOM_USART_INTFLAG_RXC;
|
||||
|
||||
#ifdef FEATURE_USART_LIN_SLAVE
|
||||
/* Enable the break character is received Interrupt */
|
||||
if(module->lin_slave_enabled) {
|
||||
usart_hw->INTENSET.reg = SERCOM_USART_INTFLAG_RXBRK;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef FEATURE_USART_START_FRAME_DECTION
|
||||
/* Enable a start condition is detected Interrupt */
|
||||
if(module->start_frame_detection_enabled) {
|
||||
usart_hw->INTENSET.reg = SERCOM_USART_INTFLAG_RXS;
|
||||
}
|
||||
#endif
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Registers a callback
|
||||
*
|
||||
* Registers a callback function, which is implemented by the user.
|
||||
*
|
||||
* \note The callback must be enabled by \ref usart_enable_callback
|
||||
* in order for the interrupt handler to call it when the conditions for
|
||||
* the callback type are met.
|
||||
*
|
||||
* \param[in] module Pointer to USART software instance struct
|
||||
* \param[in] callback_func Pointer to callback function
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*
|
||||
*/
|
||||
void usart_register_callback(
|
||||
struct usart_module *const module,
|
||||
usart_callback_t callback_func,
|
||||
enum usart_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(callback_func);
|
||||
|
||||
/* Register callback function */
|
||||
module->callback[callback_type] = callback_func;
|
||||
|
||||
/* Set the bit corresponding to the callback_type */
|
||||
module->callback_reg_mask |= (1 << callback_type);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Unregisters a callback
|
||||
*
|
||||
* Unregisters a callback function, which is implemented by the user.
|
||||
*
|
||||
* \param[in,out] module Pointer to USART software instance struct
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*
|
||||
*/
|
||||
void usart_unregister_callback(
|
||||
struct usart_module *const module,
|
||||
enum usart_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
|
||||
/* Unregister callback function */
|
||||
module->callback[callback_type] = NULL;
|
||||
|
||||
/* Clear the bit corresponding to the callback_type */
|
||||
module->callback_reg_mask &= ~(1 << callback_type);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Asynchronous write a single char
|
||||
*
|
||||
* Sets up the driver to write the data given. If registered and enabled,
|
||||
* a callback function will be called when the transmit is completed.
|
||||
*
|
||||
* \param[in] module Pointer to USART software instance struct
|
||||
* \param[in] tx_data Data to transfer
|
||||
*
|
||||
* \returns Status of the operation.
|
||||
* \retval STATUS_OK If operation was completed
|
||||
* \retval STATUS_BUSY If operation was not completed, due to the
|
||||
* USART module being busy
|
||||
* \retval STATUS_ERR_DENIED If the transmitter is not enabled
|
||||
*/
|
||||
enum status_code usart_write_job(
|
||||
struct usart_module *const module,
|
||||
const uint16_t *tx_data)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(tx_data);
|
||||
|
||||
|
||||
/* Check that the transmitter is enabled */
|
||||
if (!(module->transmitter_enabled)) {
|
||||
return STATUS_ERR_DENIED;
|
||||
}
|
||||
|
||||
/* Call internal write buffer function with length 1 */
|
||||
return _usart_write_buffer(module, (uint8_t *)tx_data, 1);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Asynchronous read a single char
|
||||
*
|
||||
* Sets up the driver to read data from the USART module to the data
|
||||
* pointer given. If registered and enabled, a callback will be called
|
||||
* when the receiving is completed.
|
||||
*
|
||||
* \param[in] module Pointer to USART software instance struct
|
||||
* \param[out] rx_data Pointer to where received data should be put
|
||||
*
|
||||
* \returns Status of the operation.
|
||||
* \retval STATUS_OK If operation was completed
|
||||
* \retval STATUS_BUSY If operation was not completed
|
||||
*/
|
||||
enum status_code usart_read_job(
|
||||
struct usart_module *const module,
|
||||
uint16_t *const rx_data)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(rx_data);
|
||||
|
||||
/* Call internal read buffer function with length 1 */
|
||||
return _usart_read_buffer(module, (uint8_t *)rx_data, 1);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Asynchronous buffer write
|
||||
*
|
||||
* Sets up the driver to write a given buffer over the USART. If registered and
|
||||
* enabled, a callback function will be called.
|
||||
*
|
||||
* \param[in] module Pointer to USART software instance struct
|
||||
* \param[in] tx_data Pointer do data buffer to transmit
|
||||
* \param[in] length Length of the data to transmit
|
||||
*
|
||||
* \note If using 9-bit data, the array that *tx_data point to should be defined
|
||||
* as uint16_t array and should be casted to uint8_t* pointer. Because it
|
||||
* is an address pointer, the highest byte is not discarded. For example:
|
||||
* \code
|
||||
#define TX_LEN 3
|
||||
uint16_t tx_buf[TX_LEN] = {0x0111, 0x0022, 0x0133};
|
||||
usart_write_buffer_job(&module, (uint8_t*)tx_buf, TX_LEN);
|
||||
\endcode
|
||||
*
|
||||
* \returns Status of the operation.
|
||||
* \retval STATUS_OK If operation was completed successfully.
|
||||
* \retval STATUS_BUSY If operation was not completed, due to the
|
||||
* USART module being busy
|
||||
* \retval STATUS_ERR_INVALID_ARG If operation was not completed, due to invalid
|
||||
* arguments
|
||||
* \retval STATUS_ERR_DENIED If the transmitter is not enabled
|
||||
*/
|
||||
enum status_code usart_write_buffer_job(
|
||||
struct usart_module *const module,
|
||||
uint8_t *tx_data,
|
||||
uint16_t length)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(tx_data);
|
||||
|
||||
if (length == 0) {
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
/* Check that the transmitter is enabled */
|
||||
if (!(module->transmitter_enabled)) {
|
||||
return STATUS_ERR_DENIED;
|
||||
}
|
||||
|
||||
/* Issue internal asynchronous write */
|
||||
return _usart_write_buffer(module, tx_data, length);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Asynchronous buffer read
|
||||
*
|
||||
* Sets up the driver to read from the USART to a given buffer. If registered
|
||||
* and enabled, a callback function will be called.
|
||||
*
|
||||
* \param[in] module Pointer to USART software instance struct
|
||||
* \param[out] rx_data Pointer to data buffer to receive
|
||||
* \param[in] length Data buffer length
|
||||
*
|
||||
* \note If using 9-bit data, the array that *rx_data point to should be defined
|
||||
* as uint16_t array and should be casted to uint8_t* pointer. Because it
|
||||
* is an address pointer, the highest byte is not discarded. For example:
|
||||
* \code
|
||||
#define RX_LEN 3
|
||||
uint16_t rx_buf[RX_LEN] = {0x0,};
|
||||
usart_read_buffer_job(&module, (uint8_t*)rx_buf, RX_LEN);
|
||||
\endcode
|
||||
*
|
||||
* \returns Status of the operation.
|
||||
* \retval STATUS_OK If operation was completed
|
||||
* \retval STATUS_BUSY If operation was not completed, due to the
|
||||
* USART module being busy
|
||||
* \retval STATUS_ERR_INVALID_ARG If operation was not completed, due to invalid
|
||||
* arguments
|
||||
* \retval STATUS_ERR_DENIED If the transmitter is not enabled
|
||||
*/
|
||||
enum status_code usart_read_buffer_job(
|
||||
struct usart_module *const module,
|
||||
uint8_t *rx_data,
|
||||
uint16_t length)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(rx_data);
|
||||
|
||||
if (length == 0) {
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
/* Check that the receiver is enabled */
|
||||
if (!(module->receiver_enabled)) {
|
||||
return STATUS_ERR_DENIED;
|
||||
}
|
||||
|
||||
/* Issue internal asynchronous read */
|
||||
return _usart_read_buffer(module, rx_data, length);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Cancels ongoing read/write operation
|
||||
*
|
||||
* Cancels the ongoing read/write operation modifying parameters in the
|
||||
* USART software struct.
|
||||
*
|
||||
* \param[in] module Pointer to USART software instance struct
|
||||
* \param[in] transceiver_type Transfer type to cancel
|
||||
*/
|
||||
void usart_abort_job(
|
||||
struct usart_module *const module,
|
||||
enum usart_transceiver_type transceiver_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
Assert(module->hw);
|
||||
|
||||
/* Get a pointer to the hardware module instance */
|
||||
SercomUsart *const usart_hw = &(module->hw->USART);
|
||||
|
||||
switch(transceiver_type) {
|
||||
case USART_TRANSCEIVER_RX:
|
||||
/* Clear the interrupt flag in order to prevent the receive
|
||||
* complete callback to fire */
|
||||
usart_hw->INTFLAG.reg = SERCOM_USART_INTFLAG_RXC;
|
||||
|
||||
/* Clear the software reception buffer */
|
||||
module->remaining_rx_buffer_length = 0;
|
||||
|
||||
break;
|
||||
|
||||
case USART_TRANSCEIVER_TX:
|
||||
/* Clear the interrupt flag in order to prevent the receive
|
||||
* complete callback to fire */
|
||||
usart_hw->INTFLAG.reg = SERCOM_USART_INTFLAG_TXC;
|
||||
|
||||
/* Clear the software reception buffer */
|
||||
module->remaining_tx_buffer_length = 0;
|
||||
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Get status from the ongoing or last asynchronous transfer operation
|
||||
*
|
||||
* Returns the error from a given ongoing or last asynchronous transfer operation.
|
||||
* Either from a read or write transfer.
|
||||
*
|
||||
* \param[in] module Pointer to USART software instance struct
|
||||
* \param[in] transceiver_type Transfer type to check
|
||||
*
|
||||
* \return Status of the given job.
|
||||
* \retval STATUS_OK No error occurred during the last transfer
|
||||
* \retval STATUS_BUSY A transfer is ongoing
|
||||
* \retval STATUS_ERR_BAD_DATA The last operation was aborted due to a
|
||||
* parity error. The transfer could be affected
|
||||
* by external noise
|
||||
* \retval STATUS_ERR_BAD_FORMAT The last operation was aborted due to a
|
||||
* frame error
|
||||
* \retval STATUS_ERR_OVERFLOW The last operation was aborted due to a
|
||||
* buffer overflow
|
||||
* \retval STATUS_ERR_INVALID_ARG An invalid transceiver enum given
|
||||
*/
|
||||
enum status_code usart_get_job_status(
|
||||
struct usart_module *const module,
|
||||
enum usart_transceiver_type transceiver_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
|
||||
/* Variable for status code */
|
||||
enum status_code status_code;
|
||||
|
||||
switch(transceiver_type) {
|
||||
case USART_TRANSCEIVER_RX:
|
||||
status_code = module->rx_status;
|
||||
break;
|
||||
|
||||
case USART_TRANSCEIVER_TX:
|
||||
status_code = module->tx_status;
|
||||
break;
|
||||
|
||||
default:
|
||||
status_code = STATUS_ERR_INVALID_ARG;
|
||||
break;
|
||||
}
|
||||
|
||||
return status_code;
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Handles interrupts as they occur, and it will run callback functions
|
||||
* which are registered and enabled.
|
||||
*
|
||||
* \param[in] instance ID of the SERCOM instance calling the interrupt
|
||||
* handler.
|
||||
*/
|
||||
void _usart_interrupt_handler(
|
||||
uint8_t instance)
|
||||
{
|
||||
/* Temporary variables */
|
||||
uint16_t interrupt_status;
|
||||
uint16_t callback_status;
|
||||
uint8_t error_code;
|
||||
|
||||
|
||||
/* Get device instance from the look-up table */
|
||||
struct usart_module *module
|
||||
= (struct usart_module *)_sercom_instances[instance];
|
||||
|
||||
/* Pointer to the hardware module instance */
|
||||
SercomUsart *const usart_hw
|
||||
= &(module->hw->USART);
|
||||
|
||||
/* Wait for the synchronization to complete */
|
||||
_usart_wait_for_sync(module);
|
||||
|
||||
/* Read and mask interrupt flag register */
|
||||
interrupt_status = usart_hw->INTFLAG.reg;
|
||||
interrupt_status &= usart_hw->INTENSET.reg;
|
||||
callback_status = module->callback_reg_mask &
|
||||
module->callback_enable_mask;
|
||||
|
||||
/* Check if a DATA READY interrupt has occurred,
|
||||
* and if there is more to transfer */
|
||||
if (interrupt_status & SERCOM_USART_INTFLAG_DRE) {
|
||||
if (module->remaining_tx_buffer_length) {
|
||||
/* Write value will be at least 8-bits long */
|
||||
uint16_t data_to_send = *(module->tx_buffer_ptr);
|
||||
/* Increment 8-bit pointer */
|
||||
(module->tx_buffer_ptr)++;
|
||||
|
||||
if (module->character_size == USART_CHARACTER_SIZE_9BIT) {
|
||||
data_to_send |= (*(module->tx_buffer_ptr) << 8);
|
||||
/* Increment 8-bit pointer */
|
||||
(module->tx_buffer_ptr)++;
|
||||
}
|
||||
/* Write the data to send */
|
||||
usart_hw->DATA.reg = (data_to_send & SERCOM_USART_DATA_MASK);
|
||||
|
||||
if (--(module->remaining_tx_buffer_length) == 0) {
|
||||
/* Disable the Data Register Empty Interrupt */
|
||||
usart_hw->INTENCLR.reg = SERCOM_USART_INTFLAG_DRE;
|
||||
/* Enable Transmission Complete interrupt */
|
||||
usart_hw->INTENSET.reg = SERCOM_USART_INTFLAG_TXC;
|
||||
|
||||
}
|
||||
} else {
|
||||
usart_hw->INTENCLR.reg = SERCOM_USART_INTFLAG_DRE;
|
||||
}
|
||||
}
|
||||
|
||||
/* Check if the Transmission Complete interrupt has occurred and
|
||||
* that the transmit buffer is empty */
|
||||
if (interrupt_status & SERCOM_USART_INTFLAG_TXC) {
|
||||
|
||||
/* Disable TX Complete Interrupt, and set STATUS_OK */
|
||||
usart_hw->INTENCLR.reg = SERCOM_USART_INTFLAG_TXC;
|
||||
module->tx_status = STATUS_OK;
|
||||
|
||||
/* Run callback if registered and enabled */
|
||||
if (callback_status & (1 << USART_CALLBACK_BUFFER_TRANSMITTED)) {
|
||||
(*(module->callback[USART_CALLBACK_BUFFER_TRANSMITTED]))(module);
|
||||
}
|
||||
}
|
||||
|
||||
/* Check if the Receive Complete interrupt has occurred, and that
|
||||
* there's more data to receive */
|
||||
if (interrupt_status & SERCOM_USART_INTFLAG_RXC) {
|
||||
|
||||
if (module->remaining_rx_buffer_length) {
|
||||
/* Read out the status code and mask away all but the 4 LSBs*/
|
||||
error_code = (uint8_t)(usart_hw->STATUS.reg & SERCOM_USART_STATUS_MASK);
|
||||
#if !SAMD20
|
||||
/* CTS status should not be considered as an error */
|
||||
if(error_code & SERCOM_USART_STATUS_CTS) {
|
||||
error_code &= ~SERCOM_USART_STATUS_CTS;
|
||||
}
|
||||
#endif
|
||||
#ifdef FEATURE_USART_LIN_MASTER
|
||||
/* TXE status should not be considered as an error */
|
||||
if(error_code & SERCOM_USART_STATUS_TXE) {
|
||||
error_code &= ~SERCOM_USART_STATUS_TXE;
|
||||
}
|
||||
#endif
|
||||
/* Check if an error has occurred during the receiving */
|
||||
if (error_code) {
|
||||
/* Check which error occurred */
|
||||
if (error_code & SERCOM_USART_STATUS_FERR) {
|
||||
/* Store the error code and clear flag by writing 1 to it */
|
||||
module->rx_status = STATUS_ERR_BAD_FORMAT;
|
||||
usart_hw->STATUS.reg = SERCOM_USART_STATUS_FERR;
|
||||
} else if (error_code & SERCOM_USART_STATUS_BUFOVF) {
|
||||
/* Store the error code and clear flag by writing 1 to it */
|
||||
module->rx_status = STATUS_ERR_OVERFLOW;
|
||||
usart_hw->STATUS.reg = SERCOM_USART_STATUS_BUFOVF;
|
||||
} else if (error_code & SERCOM_USART_STATUS_PERR) {
|
||||
/* Store the error code and clear flag by writing 1 to it */
|
||||
module->rx_status = STATUS_ERR_BAD_DATA;
|
||||
usart_hw->STATUS.reg = SERCOM_USART_STATUS_PERR;
|
||||
}
|
||||
#ifdef FEATURE_USART_LIN_SLAVE
|
||||
else if (error_code & SERCOM_USART_STATUS_ISF) {
|
||||
/* Store the error code and clear flag by writing 1 to it */
|
||||
module->rx_status = STATUS_ERR_PROTOCOL;
|
||||
usart_hw->STATUS.reg = SERCOM_USART_STATUS_ISF;
|
||||
}
|
||||
#endif
|
||||
#ifdef FEATURE_USART_COLLISION_DECTION
|
||||
else if (error_code & SERCOM_USART_STATUS_COLL) {
|
||||
/* Store the error code and clear flag by writing 1 to it */
|
||||
module->rx_status = STATUS_ERR_PACKET_COLLISION;
|
||||
usart_hw->STATUS.reg = SERCOM_USART_STATUS_COLL;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Run callback if registered and enabled */
|
||||
if (callback_status
|
||||
& (1 << USART_CALLBACK_ERROR)) {
|
||||
(*(module->callback[USART_CALLBACK_ERROR]))(module);
|
||||
}
|
||||
|
||||
} else {
|
||||
|
||||
/* Read current packet from DATA register,
|
||||
* increment buffer pointer and decrement buffer length */
|
||||
uint16_t received_data = (usart_hw->DATA.reg & SERCOM_USART_DATA_MASK);
|
||||
|
||||
/* Read value will be at least 8-bits long */
|
||||
*(module->rx_buffer_ptr) = received_data;
|
||||
/* Increment 8-bit pointer */
|
||||
module->rx_buffer_ptr += 1;
|
||||
|
||||
if (module->character_size == USART_CHARACTER_SIZE_9BIT) {
|
||||
/* 9-bit data, write next received byte to the buffer */
|
||||
*(module->rx_buffer_ptr) = (received_data >> 8);
|
||||
/* Increment 8-bit pointer */
|
||||
module->rx_buffer_ptr += 1;
|
||||
}
|
||||
|
||||
/* Check if the last character have been received */
|
||||
if(--(module->remaining_rx_buffer_length) == 0) {
|
||||
/* Disable RX Complete Interrupt,
|
||||
* and set STATUS_OK */
|
||||
usart_hw->INTENCLR.reg = SERCOM_USART_INTFLAG_RXC;
|
||||
module->rx_status = STATUS_OK;
|
||||
|
||||
/* Run callback if registered and enabled */
|
||||
if (callback_status
|
||||
& (1 << USART_CALLBACK_BUFFER_RECEIVED)) {
|
||||
(*(module->callback[USART_CALLBACK_BUFFER_RECEIVED]))(module);
|
||||
}
|
||||
}
|
||||
}
|
||||
} else {
|
||||
/* This should not happen. Disable Receive Complete interrupt. */
|
||||
usart_hw->INTENCLR.reg = SERCOM_USART_INTFLAG_RXC;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef FEATURE_USART_HARDWARE_FLOW_CONTROL
|
||||
if (interrupt_status & SERCOM_USART_INTFLAG_CTSIC) {
|
||||
/* Disable interrupts */
|
||||
usart_hw->INTENCLR.reg = SERCOM_USART_INTENCLR_CTSIC;
|
||||
/* Clear interrupt flag */
|
||||
usart_hw->INTFLAG.reg = SERCOM_USART_INTFLAG_CTSIC;
|
||||
|
||||
/* Run callback if registered and enabled */
|
||||
if (callback_status & (1 << USART_CALLBACK_CTS_INPUT_CHANGE)) {
|
||||
(*(module->callback[USART_CALLBACK_CTS_INPUT_CHANGE]))(module);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef FEATURE_USART_LIN_SLAVE
|
||||
if (interrupt_status & SERCOM_USART_INTFLAG_RXBRK) {
|
||||
/* Disable interrupts */
|
||||
usart_hw->INTENCLR.reg = SERCOM_USART_INTENCLR_RXBRK;
|
||||
/* Clear interrupt flag */
|
||||
usart_hw->INTFLAG.reg = SERCOM_USART_INTFLAG_RXBRK;
|
||||
|
||||
/* Run callback if registered and enabled */
|
||||
if (callback_status & (1 << USART_CALLBACK_BREAK_RECEIVED)) {
|
||||
(*(module->callback[USART_CALLBACK_BREAK_RECEIVED]))(module);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef FEATURE_USART_START_FRAME_DECTION
|
||||
if (interrupt_status & SERCOM_USART_INTFLAG_RXS) {
|
||||
/* Disable interrupts */
|
||||
usart_hw->INTENCLR.reg = SERCOM_USART_INTENCLR_RXS;
|
||||
/* Clear interrupt flag */
|
||||
usart_hw->INTFLAG.reg = SERCOM_USART_INTFLAG_RXS;
|
||||
|
||||
/* Run callback if registered and enabled */
|
||||
if (callback_status & (1 << USART_CALLBACK_START_RECEIVED)) {
|
||||
(*(module->callback[USART_CALLBACK_START_RECEIVED]))(module);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
@ -1,177 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM SERCOM USART Asynchronous Driver
|
||||
*
|
||||
* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#ifndef USART_INTERRUPT_H_INCLUDED
|
||||
#define USART_INTERRUPT_H_INCLUDED
|
||||
|
||||
#include "usart.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
enum status_code _usart_write_buffer(
|
||||
struct usart_module *const module,
|
||||
uint8_t *tx_data,
|
||||
uint16_t length);
|
||||
|
||||
enum status_code _usart_read_buffer(
|
||||
struct usart_module *const module,
|
||||
uint8_t *rx_data,
|
||||
uint16_t length);
|
||||
|
||||
void _usart_interrupt_handler(
|
||||
uint8_t instance);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_sercom_usart_group
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \name Callback Management
|
||||
* @{
|
||||
*/
|
||||
void usart_register_callback(
|
||||
struct usart_module *const module,
|
||||
usart_callback_t callback_func,
|
||||
enum usart_callback callback_type);
|
||||
|
||||
void usart_unregister_callback(
|
||||
struct usart_module *module,
|
||||
enum usart_callback callback_type);
|
||||
|
||||
/**
|
||||
* \brief Enables callback
|
||||
*
|
||||
* Enables the callback function registered by the \ref usart_register_callback.
|
||||
* The callback function will be called from the interrupt handler when the
|
||||
* conditions for the callback type are met.
|
||||
*
|
||||
* \param[in] module Pointer to USART software instance struct
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*/
|
||||
static inline void usart_enable_callback(
|
||||
struct usart_module *const module,
|
||||
enum usart_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
|
||||
/* Enable callback */
|
||||
module->callback_enable_mask |= (1 << callback_type);
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disable callback
|
||||
*
|
||||
* Disables the callback function registered by the \ref usart_register_callback,
|
||||
* and the callback will not be called from the interrupt routine.
|
||||
*
|
||||
* \param[in] module Pointer to USART software instance struct
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*/
|
||||
static inline void usart_disable_callback(
|
||||
struct usart_module *const module,
|
||||
enum usart_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module);
|
||||
|
||||
/* Disable callback */
|
||||
module->callback_enable_mask &= ~(1 << callback_type);
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* \name Writing and Reading
|
||||
* @{
|
||||
*/
|
||||
enum status_code usart_write_job(
|
||||
struct usart_module *const module,
|
||||
const uint16_t *tx_data);
|
||||
|
||||
enum status_code usart_read_job(
|
||||
struct usart_module *const module,
|
||||
uint16_t *const rx_data);
|
||||
|
||||
enum status_code usart_write_buffer_job(
|
||||
struct usart_module *const module,
|
||||
uint8_t *tx_data,
|
||||
uint16_t length);
|
||||
|
||||
enum status_code usart_read_buffer_job(
|
||||
struct usart_module *const module,
|
||||
uint8_t *rx_data,
|
||||
uint16_t length);
|
||||
|
||||
void usart_abort_job(
|
||||
struct usart_module *const module,
|
||||
enum usart_transceiver_type transceiver_type);
|
||||
|
||||
enum status_code usart_get_job_status(
|
||||
struct usart_module *const module,
|
||||
enum usart_transceiver_type transceiver_type);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* USART_INTERRUPT_H_INCLUDED */
|
||||
|
||||
|
|
@ -1,53 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Clock Driver
|
||||
*
|
||||
* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#ifndef SYSTEM_CLOCK_H_INCLUDED
|
||||
#define SYSTEM_CLOCK_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
#include <gclk.h>
|
||||
#include <clock_feature.h>
|
||||
|
||||
#endif /* SYSTEM_CLOCK_H_INCLUDED */
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -1,454 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM D21/R21/DA0/DA1 Clock Driver
|
||||
*
|
||||
* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef CLOCK_CONFIG_CHECK_H
|
||||
# define CLOCK_CONFIG_CHECK_H
|
||||
|
||||
#if !defined(CONF_CLOCK_FLASH_WAIT_STATES)
|
||||
# error CONF_CLOCK_FLASH_WAIT_STATES not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_CPU_DIVIDER)
|
||||
# error CONF_CLOCK_CPU_DIVIDER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_APBA_DIVIDER)
|
||||
# error CONF_CLOCK_APBA_DIVIDER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_APBB_DIVIDER)
|
||||
# error CONF_CLOCK_APBB_DIVIDER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_APBC_DIVIDER)
|
||||
# error CONF_CLOCK_APBC_DIVIDER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC8M_PRESCALER)
|
||||
# error CONF_CLOCK_OSC8M_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC8M_ON_DEMAND)
|
||||
# error CONF_CLOCK_OSC8M_ON_DEMAND not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC8M_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_OSC8M_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_ENABLE)
|
||||
# error CONF_CLOCK_XOSC_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_EXTERNAL_CRYSTAL)
|
||||
# error CONF_CLOCK_XOSC_EXTERNAL_CRYSTAL not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_EXTERNAL_FREQUENCY)
|
||||
# error CONF_CLOCK_XOSC_EXTERNAL_FREQUENCY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_STARTUP_TIME)
|
||||
# error CONF_CLOCK_XOSC_STARTUP_TIME not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_AUTO_GAIN_CONTROL)
|
||||
# error CONF_CLOCK_XOSC_AUTO_GAIN_CONTROL not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_ON_DEMAND)
|
||||
# error CONF_CLOCK_XOSC_ON_DEMAND not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_XOSC_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_ENABLE)
|
||||
# error CONF_CLOCK_XOSC32K_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_EXTERNAL_CRYSTAL)
|
||||
# error CONF_CLOCK_XOSC32K_EXTERNAL_CRYSTAL not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_STARTUP_TIME)
|
||||
# error CONF_CLOCK_XOSC32K_STARTUP_TIME not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_AUTO_AMPLITUDE_CONTROL)
|
||||
# error CONF_CLOCK_XOSC32K_AUTO_AMPLITUDE_CONTROL not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_ENABLE_1KHZ_OUPUT)
|
||||
# error CONF_CLOCK_XOSC32K_ENABLE_1KHZ_OUPUT not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_ENABLE_32KHZ_OUTPUT)
|
||||
# error CONF_CLOCK_XOSC32K_ENABLE_32KHZ_OUTPUT not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_ON_DEMAND)
|
||||
# error CONF_CLOCK_XOSC32K_ON_DEMAND not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_XOSC32K_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_XOSC32K_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC32K_ENABLE)
|
||||
# error CONF_CLOCK_OSC32K_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC32K_STARTUP_TIME)
|
||||
# error CONF_CLOCK_OSC32K_STARTUP_TIME not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC32K_ENABLE_1KHZ_OUTPUT)
|
||||
# error CONF_CLOCK_OSC32K_ENABLE_1KHZ_OUTPUT not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC32K_ENABLE_32KHZ_OUTPUT)
|
||||
# error CONF_CLOCK_OSC32K_ENABLE_32KHZ_OUTPUT not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC32K_ON_DEMAND)
|
||||
# error CONF_CLOCK_OSC32K_ON_DEMAND not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_OSC32K_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_OSC32K_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_ENABLE)
|
||||
# error CONF_CLOCK_DFLL_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_LOOP_MODE)
|
||||
# error CONF_CLOCK_DFLL_LOOP_MODE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_ON_DEMAND)
|
||||
# error CONF_CLOCK_DFLL_ON_DEMAND not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_FINE_VALUE)
|
||||
# error CONF_CLOCK_DFLL_FINE_VALUE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_SOURCE_GCLK_GENERATOR)
|
||||
# error CONF_CLOCK_DFLL_SOURCE_GCLK_GENERATOR not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_MULTIPLY_FACTOR)
|
||||
# error CONF_CLOCK_DFLL_MULTIPLY_FACTOR not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_QUICK_LOCK)
|
||||
# error CONF_CLOCK_DFLL_QUICK_LOCK not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_TRACK_AFTER_FINE_LOCK)
|
||||
# error CONF_CLOCK_DFLL_TRACK_AFTER_FINE_LOCK not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_KEEP_LOCK_ON_WAKEUP)
|
||||
# error CONF_CLOCK_DFLL_KEEP_LOCK_ON_WAKEUP not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_ENABLE_CHILL_CYCLE)
|
||||
# error CONF_CLOCK_DFLL_ENABLE_CHILL_CYCLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_MAX_COARSE_STEP_SIZE)
|
||||
# error CONF_CLOCK_DFLL_MAX_COARSE_STEP_SIZE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DFLL_MAX_FINE_STEP_SIZE)
|
||||
# error CONF_CLOCK_DFLL_MAX_FINE_STEP_SIZE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_ENABLE)
|
||||
# error CONF_CLOCK_DPLL_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_ON_DEMAND)
|
||||
# error CONF_CLOCK_DPLL_ON_DEMAND not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_DPLL_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_LOCK_BYPASS)
|
||||
# error CONF_CLOCK_DPLL_LOCK_BYPASS not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_WAKE_UP_FAST)
|
||||
# error CONF_CLOCK_DPLL_WAKE_UP_FAST not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_LOW_POWER_ENABLE)
|
||||
# error CONF_CLOCK_DPLL_LOW_POWER_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_LOCK_TIME)
|
||||
# error CONF_CLOCK_DPLL_LOCK_TIME not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_REFERENCE_CLOCK)
|
||||
# error CONF_CLOCK_DPLL_REFERENCE_CLOCK not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_FILTER)
|
||||
# error CONF_CLOCK_DPLL_FILTER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_REFERENCE_FREQUENCY)
|
||||
# error CONF_CLOCK_DPLL_REFERENCE_FREQUENCY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_REFERENCE_DIVIDER)
|
||||
# error CONF_CLOCK_DPLL_REFERENCE_DIVIDER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_OUTPUT_FREQUENCY)
|
||||
# error CONF_CLOCK_DPLL_OUTPUT_FREQUENCY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_REFERENCE_GCLK_GENERATOR)
|
||||
# error CONF_CLOCK_DPLL_REFERENCE_GCLK_GENERATOR not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_DPLL_LOCK_GCLK_GENERATOR)
|
||||
# error CONF_CLOCK_DPLL_LOCK_GCLK_GENERATOR not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_CONFIGURE_GCLK)
|
||||
# error CONF_CLOCK_CONFIGURE_GCLK not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_0_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_0_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_0_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_0_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_0_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_0_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_0_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_0_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_0_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_0_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_1_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_1_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_1_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_1_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_1_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_1_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_1_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_1_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_1_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_1_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_2_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_2_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_2_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_2_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_2_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_2_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_2_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_2_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_2_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_2_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_3_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_3_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_3_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_3_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_3_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_3_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_3_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_3_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_3_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_3_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_4_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_4_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_4_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_4_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_4_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_4_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_4_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_4_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_4_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_4_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_5_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_5_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_5_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_5_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_5_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_5_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_5_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_5_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_5_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_5_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_6_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_6_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_6_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_6_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_6_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_6_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_6_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_6_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_6_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_6_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_7_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_7_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_7_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_7_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_7_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_7_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_7_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_7_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_7_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_7_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_8_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_8_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_8_RUN_IN_STANDBY)
|
||||
# error CONF_CLOCK_GCLK_8_RUN_IN_STANDBY not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_8_CLOCK_SOURCE)
|
||||
# error CONF_CLOCK_GCLK_8_CLOCK_SOURCE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_8_PRESCALER)
|
||||
# error CONF_CLOCK_GCLK_8_PRESCALER not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#if !defined(CONF_CLOCK_GCLK_8_OUTPUT_ENABLE)
|
||||
# error CONF_CLOCK_GCLK_8_OUTPUT_ENABLE not defined in conf_clocks.h
|
||||
#endif
|
||||
|
||||
#endif /* CLOCK_CONFIG_CHECK_H */
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -1,522 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM D21/R21/DA0/DA1 Generic Clock Driver
|
||||
*
|
||||
* Copyright (C) 2013-2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#include <gclk.h>
|
||||
#include <clock.h>
|
||||
#include <system_interrupt.h>
|
||||
|
||||
/**
|
||||
* \brief Determines if the hardware module(s) are currently synchronizing to the bus.
|
||||
*
|
||||
* Checks to see if the underlying hardware peripheral module(s) are currently
|
||||
* synchronizing across multiple clock domains to the hardware bus, This
|
||||
* function can be used to delay further operations on a module until such time
|
||||
* that it is ready, to prevent blocking delays for synchronization in the
|
||||
* user application.
|
||||
*
|
||||
* \return Synchronization status of the underlying hardware module(s).
|
||||
*
|
||||
* \retval false if the module has completed synchronization
|
||||
* \retval true if the module synchronization is ongoing
|
||||
*/
|
||||
static inline bool system_gclk_is_syncing(void)
|
||||
{
|
||||
if (GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY){
|
||||
return true;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Initializes the GCLK driver.
|
||||
*
|
||||
* Initializes the Generic Clock module, disabling and resetting all active
|
||||
* Generic Clock Generators and Channels to their power-on default values.
|
||||
*/
|
||||
void system_gclk_init(void)
|
||||
{
|
||||
/* Turn on the digital interface clock */
|
||||
system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBA, PM_APBAMASK_GCLK);
|
||||
|
||||
/* Software reset the module to ensure it is re-initialized correctly */
|
||||
GCLK->CTRL.reg = GCLK_CTRL_SWRST;
|
||||
while (GCLK->CTRL.reg & GCLK_CTRL_SWRST) {
|
||||
/* Wait for reset to complete */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Writes a Generic Clock Generator configuration to the hardware module.
|
||||
*
|
||||
* Writes out a given configuration of a Generic Clock Generator configuration
|
||||
* to the hardware module.
|
||||
*
|
||||
* \note Changing the clock source on the fly (on a running
|
||||
* generator) can take additional time if the clock source is configured
|
||||
* to only run on-demand (ONDEMAND bit is set) and it is not currently
|
||||
* running (no peripheral is requesting the clock source). In this case
|
||||
* the GCLK will request the new clock while still keeping a request to
|
||||
* the old clock source until the new clock source is ready.
|
||||
*
|
||||
* \note This function will not start a generator that is not already running;
|
||||
* to start the generator, call \ref system_gclk_gen_enable()
|
||||
* after configuring a generator.
|
||||
*
|
||||
* \param[in] generator Generic Clock Generator index to configure
|
||||
* \param[in] config Configuration settings for the generator
|
||||
*/
|
||||
void system_gclk_gen_set_config(
|
||||
const uint8_t generator,
|
||||
struct system_gclk_gen_config *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
|
||||
/* Cache new register configurations to minimize sync requirements. */
|
||||
uint32_t new_genctrl_config = (generator << GCLK_GENCTRL_ID_Pos);
|
||||
uint32_t new_gendiv_config = (generator << GCLK_GENDIV_ID_Pos);
|
||||
|
||||
/* Select the requested source clock for the generator */
|
||||
new_genctrl_config |= config->source_clock << GCLK_GENCTRL_SRC_Pos;
|
||||
|
||||
/* Configure the clock to be either high or low when disabled */
|
||||
if (config->high_when_disabled) {
|
||||
new_genctrl_config |= GCLK_GENCTRL_OOV;
|
||||
}
|
||||
|
||||
/* Configure if the clock output to I/O pin should be enabled. */
|
||||
if (config->output_enable) {
|
||||
new_genctrl_config |= GCLK_GENCTRL_OE;
|
||||
}
|
||||
|
||||
/* Set division factor */
|
||||
if (config->division_factor > 1) {
|
||||
/* Check if division is a power of two */
|
||||
if (((config->division_factor & (config->division_factor - 1)) == 0)) {
|
||||
/* Determine the index of the highest bit set to get the
|
||||
* division factor that must be loaded into the division
|
||||
* register */
|
||||
|
||||
uint32_t div2_count = 0;
|
||||
|
||||
uint32_t mask;
|
||||
for (mask = (1UL << 1); mask < config->division_factor;
|
||||
mask <<= 1) {
|
||||
div2_count++;
|
||||
}
|
||||
|
||||
/* Set binary divider power of 2 division factor */
|
||||
new_gendiv_config |= div2_count << GCLK_GENDIV_DIV_Pos;
|
||||
new_genctrl_config |= GCLK_GENCTRL_DIVSEL;
|
||||
} else {
|
||||
/* Set integer division factor */
|
||||
|
||||
new_gendiv_config |=
|
||||
(config->division_factor) << GCLK_GENDIV_DIV_Pos;
|
||||
|
||||
/* Enable non-binary division with increased duty cycle accuracy */
|
||||
new_genctrl_config |= GCLK_GENCTRL_IDC;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/* Enable or disable the clock in standby mode */
|
||||
if (config->run_in_standby) {
|
||||
new_genctrl_config |= GCLK_GENCTRL_RUNSTDBY;
|
||||
}
|
||||
|
||||
while (system_gclk_is_syncing()) {
|
||||
/* Wait for synchronization */
|
||||
};
|
||||
|
||||
system_interrupt_enter_critical_section();
|
||||
|
||||
/* Select the correct generator */
|
||||
*((uint8_t*)&GCLK->GENDIV.reg) = generator;
|
||||
|
||||
/* Write the new generator configuration */
|
||||
while (system_gclk_is_syncing()) {
|
||||
/* Wait for synchronization */
|
||||
};
|
||||
GCLK->GENDIV.reg = new_gendiv_config;
|
||||
|
||||
while (system_gclk_is_syncing()) {
|
||||
/* Wait for synchronization */
|
||||
};
|
||||
GCLK->GENCTRL.reg = new_genctrl_config | (GCLK->GENCTRL.reg & GCLK_GENCTRL_GENEN);
|
||||
|
||||
system_interrupt_leave_critical_section();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enables a Generic Clock Generator that was previously configured.
|
||||
*
|
||||
* Starts the clock generation of a Generic Clock Generator that was previously
|
||||
* configured via a call to \ref system_gclk_gen_set_config().
|
||||
*
|
||||
* \param[in] generator Generic Clock Generator index to enable
|
||||
*/
|
||||
void system_gclk_gen_enable(
|
||||
const uint8_t generator)
|
||||
{
|
||||
while (system_gclk_is_syncing()) {
|
||||
/* Wait for synchronization */
|
||||
};
|
||||
|
||||
system_interrupt_enter_critical_section();
|
||||
|
||||
/* Select the requested generator */
|
||||
*((uint8_t*)&GCLK->GENCTRL.reg) = generator;
|
||||
while (system_gclk_is_syncing()) {
|
||||
/* Wait for synchronization */
|
||||
};
|
||||
|
||||
/* Enable generator */
|
||||
GCLK->GENCTRL.reg |= GCLK_GENCTRL_GENEN;
|
||||
|
||||
system_interrupt_leave_critical_section();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disables a Generic Clock Generator that was previously enabled.
|
||||
*
|
||||
* Stops the clock generation of a Generic Clock Generator that was previously
|
||||
* started via a call to \ref system_gclk_gen_enable().
|
||||
*
|
||||
* \param[in] generator Generic Clock Generator index to disable
|
||||
*/
|
||||
void system_gclk_gen_disable(
|
||||
const uint8_t generator)
|
||||
{
|
||||
while (system_gclk_is_syncing()) {
|
||||
/* Wait for synchronization */
|
||||
};
|
||||
|
||||
system_interrupt_enter_critical_section();
|
||||
|
||||
/* Select the requested generator */
|
||||
*((uint8_t*)&GCLK->GENCTRL.reg) = generator;
|
||||
while (system_gclk_is_syncing()) {
|
||||
/* Wait for synchronization */
|
||||
};
|
||||
|
||||
/* Disable generator */
|
||||
GCLK->GENCTRL.reg &= ~GCLK_GENCTRL_GENEN;
|
||||
while (GCLK->GENCTRL.reg & GCLK_GENCTRL_GENEN) {
|
||||
/* Wait for clock to become disabled */
|
||||
}
|
||||
|
||||
system_interrupt_leave_critical_section();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Determins if the specified Generic Clock Generator is enabled.
|
||||
*
|
||||
* \param[in] generator Generic Clock Generator index to check
|
||||
*
|
||||
* \return The enabled status.
|
||||
* \retval true The Generic Clock Generator is enabled
|
||||
* \retval false The Generic Clock Generator is disabled
|
||||
*/
|
||||
bool system_gclk_gen_is_enabled(
|
||||
const uint8_t generator)
|
||||
{
|
||||
bool enabled;
|
||||
|
||||
system_interrupt_enter_critical_section();
|
||||
|
||||
/* Select the requested generator */
|
||||
*((uint8_t*)&GCLK->GENCTRL.reg) = generator;
|
||||
/* Obtain the enabled status */
|
||||
enabled = (GCLK->GENCTRL.reg & GCLK_GENCTRL_GENEN);
|
||||
|
||||
system_interrupt_leave_critical_section();
|
||||
|
||||
return enabled;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Retrieves the clock frequency of a Generic Clock generator.
|
||||
*
|
||||
* Determines the clock frequency (in Hz) of a specified Generic Clock
|
||||
* generator, used as a source to a Generic Clock Channel module.
|
||||
*
|
||||
* \param[in] generator Generic Clock Generator index
|
||||
*
|
||||
* \return The frequency of the generic clock generator, in Hz.
|
||||
*/
|
||||
uint32_t system_gclk_gen_get_hz(
|
||||
const uint8_t generator)
|
||||
{
|
||||
while (system_gclk_is_syncing()) {
|
||||
/* Wait for synchronization */
|
||||
};
|
||||
|
||||
system_interrupt_enter_critical_section();
|
||||
|
||||
/* Select the appropriate generator */
|
||||
*((uint8_t*)&GCLK->GENCTRL.reg) = generator;
|
||||
while (system_gclk_is_syncing()) {
|
||||
/* Wait for synchronization */
|
||||
};
|
||||
|
||||
/* Get the frequency of the source connected to the GCLK generator */
|
||||
uint32_t gen_input_hz = system_clock_source_get_hz(
|
||||
(enum system_clock_source)GCLK->GENCTRL.bit.SRC);
|
||||
|
||||
*((uint8_t*)&GCLK->GENCTRL.reg) = generator;
|
||||
|
||||
uint8_t divsel = GCLK->GENCTRL.bit.DIVSEL;
|
||||
|
||||
/* Select the appropriate generator division register */
|
||||
*((uint8_t*)&GCLK->GENDIV.reg) = generator;
|
||||
while (system_gclk_is_syncing()) {
|
||||
/* Wait for synchronization */
|
||||
};
|
||||
|
||||
uint32_t divider = GCLK->GENDIV.bit.DIV;
|
||||
|
||||
system_interrupt_leave_critical_section();
|
||||
|
||||
/* Check if the generator is using fractional or binary division */
|
||||
if (!divsel && divider > 1) {
|
||||
gen_input_hz /= divider;
|
||||
} else if (divsel) {
|
||||
gen_input_hz >>= (divider+1);
|
||||
}
|
||||
|
||||
return gen_input_hz;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Writes a Generic Clock configuration to the hardware module.
|
||||
*
|
||||
* Writes out a given configuration of a Generic Clock configuration to the
|
||||
* hardware module. If the clock is currently running, it will be stopped.
|
||||
*
|
||||
* \note Once called the clock will not be running; to start the clock,
|
||||
* call \ref system_gclk_chan_enable() after configuring a clock channel.
|
||||
*
|
||||
* \param[in] channel Generic Clock channel to configure
|
||||
* \param[in] config Configuration settings for the clock
|
||||
*
|
||||
*/
|
||||
void system_gclk_chan_set_config(
|
||||
const uint8_t channel,
|
||||
struct system_gclk_chan_config *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
|
||||
/* Cache the new config to reduce sync requirements */
|
||||
uint32_t new_clkctrl_config = (channel << GCLK_CLKCTRL_ID_Pos);
|
||||
|
||||
/* Select the desired generic clock generator */
|
||||
new_clkctrl_config |= config->source_generator << GCLK_CLKCTRL_GEN_Pos;
|
||||
|
||||
/* Disable generic clock channel */
|
||||
system_gclk_chan_disable(channel);
|
||||
|
||||
/* Write the new configuration */
|
||||
GCLK->CLKCTRL.reg = new_clkctrl_config;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enables a Generic Clock that was previously configured.
|
||||
*
|
||||
* Starts the clock generation of a Generic Clock that was previously
|
||||
* configured via a call to \ref system_gclk_chan_set_config().
|
||||
*
|
||||
* \param[in] channel Generic Clock channel to enable
|
||||
*/
|
||||
void system_gclk_chan_enable(
|
||||
const uint8_t channel)
|
||||
{
|
||||
system_interrupt_enter_critical_section();
|
||||
|
||||
/* Select the requested generator channel */
|
||||
*((uint8_t*)&GCLK->CLKCTRL.reg) = channel;
|
||||
|
||||
/* Enable the generic clock */
|
||||
GCLK->CLKCTRL.reg |= GCLK_CLKCTRL_CLKEN;
|
||||
|
||||
system_interrupt_leave_critical_section();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disables a Generic Clock that was previously enabled.
|
||||
*
|
||||
* Stops the clock generation of a Generic Clock that was previously started
|
||||
* via a call to \ref system_gclk_chan_enable().
|
||||
*
|
||||
* \param[in] channel Generic Clock channel to disable
|
||||
*/
|
||||
void system_gclk_chan_disable(
|
||||
const uint8_t channel)
|
||||
{
|
||||
system_interrupt_enter_critical_section();
|
||||
|
||||
/* Select the requested generator channel */
|
||||
*((uint8_t*)&GCLK->CLKCTRL.reg) = channel;
|
||||
|
||||
/* Sanity check WRTLOCK */
|
||||
Assert(!GCLK->CLKCTRL.bit.WRTLOCK);
|
||||
|
||||
/* Switch to known-working source so that the channel can be disabled */
|
||||
uint32_t prev_gen_id = GCLK->CLKCTRL.bit.GEN;
|
||||
GCLK->CLKCTRL.bit.GEN = 0;
|
||||
|
||||
/* Disable the generic clock */
|
||||
GCLK->CLKCTRL.reg &= ~GCLK_CLKCTRL_CLKEN;
|
||||
while (GCLK->CLKCTRL.reg & GCLK_CLKCTRL_CLKEN) {
|
||||
/* Wait for clock to become disabled */
|
||||
}
|
||||
|
||||
/* Restore previous configured clock generator */
|
||||
GCLK->CLKCTRL.bit.GEN = prev_gen_id;
|
||||
|
||||
system_interrupt_leave_critical_section();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Determins if the specified Generic Clock channel is enabled.
|
||||
*
|
||||
* \param[in] channel Generic Clock Channel index
|
||||
*
|
||||
* \return The enabled status.
|
||||
* \retval true The Generic Clock channel is enabled
|
||||
* \retval false The Generic Clock channel is disabled
|
||||
*/
|
||||
bool system_gclk_chan_is_enabled(
|
||||
const uint8_t channel)
|
||||
{
|
||||
bool enabled;
|
||||
|
||||
system_interrupt_enter_critical_section();
|
||||
|
||||
/* Select the requested generic clock channel */
|
||||
*((uint8_t*)&GCLK->CLKCTRL.reg) = channel;
|
||||
enabled = GCLK->CLKCTRL.bit.CLKEN;
|
||||
|
||||
system_interrupt_leave_critical_section();
|
||||
|
||||
return enabled;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Locks a Generic Clock channel from further configuration writes.
|
||||
*
|
||||
* Locks a generic clock channel from further configuration writes. It is only
|
||||
* possible to unlock the channel configuration through a power on reset.
|
||||
*
|
||||
* \param[in] channel Generic Clock channel to enable
|
||||
*/
|
||||
void system_gclk_chan_lock(
|
||||
const uint8_t channel)
|
||||
{
|
||||
system_interrupt_enter_critical_section();
|
||||
|
||||
/* Select the requested generator channel */
|
||||
*((uint8_t*)&GCLK->CLKCTRL.reg) = channel;
|
||||
|
||||
/* Lock the generic clock */
|
||||
GCLK->CLKCTRL.reg |= GCLK_CLKCTRL_WRTLOCK | GCLK_CLKCTRL_CLKEN;
|
||||
|
||||
system_interrupt_leave_critical_section();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Determins if the specified Generic Clock channel is locked.
|
||||
*
|
||||
* \param[in] channel Generic Clock Channel index
|
||||
*
|
||||
* \return The lock status.
|
||||
* \retval true The Generic Clock channel is locked
|
||||
* \retval false The Generic Clock channel is not locked
|
||||
*/
|
||||
bool system_gclk_chan_is_locked(
|
||||
const uint8_t channel)
|
||||
{
|
||||
bool locked;
|
||||
|
||||
system_interrupt_enter_critical_section();
|
||||
|
||||
/* Select the requested generic clock channel */
|
||||
*((uint8_t*)&GCLK->CLKCTRL.reg) = channel;
|
||||
locked = GCLK->CLKCTRL.bit.WRTLOCK;
|
||||
|
||||
system_interrupt_leave_critical_section();
|
||||
|
||||
return locked;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Retrieves the clock frequency of a Generic Clock channel.
|
||||
*
|
||||
* Determines the clock frequency (in Hz) of a specified Generic Clock
|
||||
* channel, used as a source to a device peripheral module.
|
||||
*
|
||||
* \param[in] channel Generic Clock Channel index
|
||||
*
|
||||
* \return The frequency of the generic clock channel, in Hz.
|
||||
*/
|
||||
uint32_t system_gclk_chan_get_hz(
|
||||
const uint8_t channel)
|
||||
{
|
||||
uint8_t gen_id;
|
||||
|
||||
system_interrupt_enter_critical_section();
|
||||
|
||||
/* Select the requested generic clock channel */
|
||||
*((uint8_t*)&GCLK->CLKCTRL.reg) = channel;
|
||||
gen_id = GCLK->CLKCTRL.bit.GEN;
|
||||
|
||||
system_interrupt_leave_critical_section();
|
||||
|
||||
/* Return the clock speed of the associated GCLK generator */
|
||||
return system_gclk_gen_get_hz(gen_id);
|
||||
}
|
||||
|
|
@ -1,307 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Generic Clock Driver
|
||||
*
|
||||
* Copyright (C) 2012-2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#ifndef SYSTEM_CLOCK_GCLK_H_INCLUDED
|
||||
#define SYSTEM_CLOCK_GCLK_H_INCLUDED
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_system_clock_group
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include <compiler.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief List of available GCLK generators.
|
||||
*
|
||||
* List of Available GCLK generators. This enum is used in the peripheral
|
||||
* device drivers to select the GCLK generator to be used for its operation.
|
||||
*
|
||||
* The number of GCLK generators available is device dependent.
|
||||
*/
|
||||
enum gclk_generator {
|
||||
/** GCLK generator channel 0 */
|
||||
GCLK_GENERATOR_0,
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 0)
|
||||
/** GCLK generator channel 1 */
|
||||
GCLK_GENERATOR_1,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 1)
|
||||
/** GCLK generator channel 2 */
|
||||
GCLK_GENERATOR_2,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 2)
|
||||
/** GCLK generator channel 3 */
|
||||
GCLK_GENERATOR_3,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 3)
|
||||
/** GCLK generator channel 4 */
|
||||
GCLK_GENERATOR_4,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 4)
|
||||
/** GCLK generator channel 5 */
|
||||
GCLK_GENERATOR_5,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 5)
|
||||
/** GCLK generator channel 6 */
|
||||
GCLK_GENERATOR_6,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 6)
|
||||
/** GCLK generator channel 7 */
|
||||
GCLK_GENERATOR_7,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 7)
|
||||
/** GCLK generator channel 8 */
|
||||
GCLK_GENERATOR_8,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 8)
|
||||
/** GCLK generator channel 9 */
|
||||
GCLK_GENERATOR_9,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 9)
|
||||
/** GCLK generator channel 10 */
|
||||
GCLK_GENERATOR_10,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 10)
|
||||
/** GCLK generator channel 11 */
|
||||
GCLK_GENERATOR_11,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 11)
|
||||
/** GCLK generator channel 12 */
|
||||
GCLK_GENERATOR_12,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 12)
|
||||
/** GCLK generator channel 13 */
|
||||
GCLK_GENERATOR_13,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 13)
|
||||
/** GCLK generator channel 14 */
|
||||
GCLK_GENERATOR_14,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 14)
|
||||
/** GCLK generator channel 15 */
|
||||
GCLK_GENERATOR_15,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || (GCLK_GEN_NUM_MSB > 15)
|
||||
/** GCLK generator channel 16 */
|
||||
GCLK_GENERATOR_16,
|
||||
#endif
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Generic Clock Generator configuration structure.
|
||||
*
|
||||
* Configuration structure for a Generic Clock Generator channel. This
|
||||
* structure should be initialized by the
|
||||
* \ref system_gclk_gen_get_config_defaults() function before being modified by
|
||||
* the user application.
|
||||
*/
|
||||
struct system_gclk_gen_config {
|
||||
/** Source clock input channel index, see the \ref system_clock_source */
|
||||
uint8_t source_clock;
|
||||
/** If \c true, the generator output level is high when disabled */
|
||||
bool high_when_disabled;
|
||||
/** Integer division factor of the clock output compared to the input */
|
||||
uint32_t division_factor;
|
||||
/** If \c true, the clock is kept enabled during device standby mode */
|
||||
bool run_in_standby;
|
||||
/** If \c true, enables GCLK generator clock output to a GPIO pin */
|
||||
bool output_enable;
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Generic Clock configuration structure.
|
||||
*
|
||||
* Configuration structure for a Generic Clock channel. This structure
|
||||
* should be initialized by the \ref system_gclk_chan_get_config_defaults()
|
||||
* function before being modified by the user application.
|
||||
*/
|
||||
struct system_gclk_chan_config {
|
||||
/** Generic Clock Generator source channel */
|
||||
enum gclk_generator source_generator;
|
||||
};
|
||||
|
||||
/** \name Generic Clock Management
|
||||
* @{
|
||||
*/
|
||||
void system_gclk_init(void);
|
||||
|
||||
/** @} */
|
||||
|
||||
|
||||
/**
|
||||
* \name Generic Clock Management (Generators)
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Initializes a Generic Clock Generator configuration structure to defaults.
|
||||
*
|
||||
* Initializes a given Generic Clock Generator configuration structure to
|
||||
* a set of known default values. This function should be called on all
|
||||
* new instances of these configuration structures before being modified
|
||||
* by the user application.
|
||||
*
|
||||
* The default configuration is:
|
||||
* \li The clock is generated undivided from the source frequency
|
||||
* \li The clock generator output is low when the generator is disabled
|
||||
* \li The input clock is sourced from input clock channel 0
|
||||
* \li The clock will be disabled during sleep
|
||||
* \li The clock output will not be routed to a physical GPIO pin
|
||||
*
|
||||
* \param[out] config Configuration structure to initialize to default values
|
||||
*/
|
||||
static inline void system_gclk_gen_get_config_defaults(
|
||||
struct system_gclk_gen_config *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
|
||||
/* Default configuration values */
|
||||
config->division_factor = 1;
|
||||
config->high_when_disabled = false;
|
||||
#if SAML21 || SAML22 || SAMR30
|
||||
config->source_clock = GCLK_SOURCE_OSC16M;
|
||||
#elif (SAMC20) || (SAMC21)
|
||||
config->source_clock = GCLK_SOURCE_OSC48M;
|
||||
#else
|
||||
config->source_clock = GCLK_SOURCE_OSC8M;
|
||||
#endif
|
||||
config->run_in_standby = false;
|
||||
config->output_enable = false;
|
||||
}
|
||||
|
||||
void system_gclk_gen_set_config(
|
||||
const uint8_t generator,
|
||||
struct system_gclk_gen_config *const config);
|
||||
|
||||
void system_gclk_gen_enable(
|
||||
const uint8_t generator);
|
||||
|
||||
void system_gclk_gen_disable(
|
||||
const uint8_t generator);
|
||||
|
||||
bool system_gclk_gen_is_enabled(
|
||||
const uint8_t generator);
|
||||
|
||||
/** @} */
|
||||
|
||||
|
||||
/**
|
||||
* \name Generic Clock Management (Channels)
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Initializes a Generic Clock configuration structure to defaults.
|
||||
*
|
||||
* Initializes a given Generic Clock configuration structure to a set of
|
||||
* known default values. This function should be called on all new
|
||||
* instances of these configuration structures before being modified by the
|
||||
* user application.
|
||||
*
|
||||
* The default configuration is as follows:
|
||||
* \li The clock is sourced from the Generic Clock Generator channel 0
|
||||
* \li The clock configuration will not be write-locked when set
|
||||
*
|
||||
* \param[out] config Configuration structure to initialize to default values
|
||||
*/
|
||||
static inline void system_gclk_chan_get_config_defaults(
|
||||
struct system_gclk_chan_config *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
|
||||
/* Default configuration values */
|
||||
config->source_generator = GCLK_GENERATOR_0;
|
||||
}
|
||||
|
||||
void system_gclk_chan_set_config(
|
||||
const uint8_t channel,
|
||||
struct system_gclk_chan_config *const config);
|
||||
|
||||
void system_gclk_chan_enable(
|
||||
const uint8_t channel);
|
||||
|
||||
void system_gclk_chan_disable(
|
||||
const uint8_t channel);
|
||||
|
||||
bool system_gclk_chan_is_enabled(
|
||||
const uint8_t channel);
|
||||
|
||||
void system_gclk_chan_lock(
|
||||
const uint8_t channel);
|
||||
|
||||
bool system_gclk_chan_is_locked(
|
||||
const uint8_t channel);
|
||||
|
||||
/** @} */
|
||||
|
||||
|
||||
/**
|
||||
* \name Generic Clock Frequency Retrieval
|
||||
* @{
|
||||
*/
|
||||
|
||||
uint32_t system_gclk_gen_get_hz(
|
||||
const uint8_t generator);
|
||||
|
||||
uint32_t system_gclk_chan_get_hz(
|
||||
const uint8_t channel);
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif
|
||||
|
|
@ -1,217 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM System Interrupt Driver
|
||||
*
|
||||
* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#include "system_interrupt.h"
|
||||
|
||||
/**
|
||||
* \brief Check if a interrupt line is pending.
|
||||
*
|
||||
* Checks if the requested interrupt vector is pending.
|
||||
*
|
||||
* \param[in] vector Interrupt vector number to check
|
||||
*
|
||||
* \returns A boolean identifying if the requested interrupt vector is pending.
|
||||
*
|
||||
* \retval true Specified interrupt vector is pending
|
||||
* \retval false Specified interrupt vector is not pending
|
||||
*
|
||||
*/
|
||||
bool system_interrupt_is_pending(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
bool result;
|
||||
|
||||
if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) {
|
||||
result = ((NVIC->ISPR[0] & (1 << vector)) != 0);
|
||||
} else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
|
||||
result = ((SCB->ICSR & SCB_ICSR_PENDSTSET_Msk) != 0);
|
||||
} else {
|
||||
Assert(false);
|
||||
result = false;
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set a interrupt vector as pending.
|
||||
*
|
||||
* Set the requested interrupt vector as pending (i.e. issues a software
|
||||
* interrupt request for the specified vector). The software handler will be
|
||||
* handled (if enabled) in a priority order based on vector number and
|
||||
* configured priority settings.
|
||||
*
|
||||
* \param[in] vector Interrupt vector number which is set as pending
|
||||
*
|
||||
* \returns Status code identifying if the vector was successfully set as
|
||||
* pending.
|
||||
*
|
||||
* \retval STATUS_OK If no error was detected
|
||||
* \retval STATUS_INVALID_ARG If an unsupported interrupt vector number was given
|
||||
*/
|
||||
enum status_code system_interrupt_set_pending(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
enum status_code status = STATUS_OK;
|
||||
|
||||
if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) {
|
||||
NVIC->ISPR[0] = (1 << vector);
|
||||
} else if (vector == SYSTEM_INTERRUPT_NON_MASKABLE) {
|
||||
/* Note: Because NMI has highest priority it will be executed
|
||||
* immediately after it has been set pending */
|
||||
SCB->ICSR = SCB_ICSR_NMIPENDSET_Msk;
|
||||
} else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
|
||||
SCB->ICSR = SCB_ICSR_PENDSTSET_Msk;
|
||||
} else {
|
||||
/* The user want to set something unsupported as pending */
|
||||
Assert(false);
|
||||
status = STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Clear pending interrupt vector.
|
||||
*
|
||||
* Clear a pending interrupt vector, so the software handler is not executed.
|
||||
*
|
||||
* \param[in] vector Interrupt vector number to clear
|
||||
*
|
||||
* \returns A status code identifying if the interrupt pending state was
|
||||
* successfully cleared.
|
||||
*
|
||||
* \retval STATUS_OK If no error was detected
|
||||
* \retval STATUS_INVALID_ARG If an unsupported interrupt vector number was given
|
||||
*/
|
||||
enum status_code system_interrupt_clear_pending(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
enum status_code status = STATUS_OK;
|
||||
|
||||
if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) {
|
||||
NVIC->ICPR[0] = (1 << vector);
|
||||
} else if (vector == SYSTEM_INTERRUPT_NON_MASKABLE) {
|
||||
/* Note: Clearing of NMI pending interrupts does not make sense and is
|
||||
* not supported by the device, as it has the highest priority and will
|
||||
* always be executed at the moment it is set */
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
} else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
|
||||
SCB->ICSR = SCB_ICSR_PENDSTCLR_Msk;
|
||||
} else {
|
||||
Assert(false);
|
||||
status = STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set interrupt vector priority level.
|
||||
*
|
||||
* Set the priority level of an external interrupt or exception.
|
||||
*
|
||||
* \param[in] vector Interrupt vector to change
|
||||
* \param[in] priority_level New vector priority level to set
|
||||
*
|
||||
* \returns Status code indicating if the priority level of the interrupt was
|
||||
* successfully set.
|
||||
*
|
||||
* \retval STATUS_OK If no error was detected
|
||||
* \retval STATUS_INVALID_ARG If an unsupported interrupt vector number was given
|
||||
*/
|
||||
enum status_code system_interrupt_set_priority(
|
||||
const enum system_interrupt_vector vector,
|
||||
const enum system_interrupt_priority_level priority_level)
|
||||
{
|
||||
enum status_code status = STATUS_OK;
|
||||
|
||||
if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) {
|
||||
uint8_t register_num = vector / 4;
|
||||
uint8_t priority_pos = ((vector % 4) * 8) + (8 - __NVIC_PRIO_BITS);
|
||||
|
||||
NVIC->IP[register_num] =
|
||||
(NVIC->IP[register_num] & ~(_SYSTEM_INTERRUPT_PRIORITY_MASK << priority_pos)) |
|
||||
(priority_level << priority_pos);
|
||||
|
||||
} else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
|
||||
SCB->SHP[1] = (priority_level << _SYSTEM_INTERRUPT_SYSTICK_PRI_POS);
|
||||
} else {
|
||||
Assert(false);
|
||||
status = STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Get interrupt vector priority level.
|
||||
*
|
||||
* Retrieves the priority level of the requested external interrupt or exception.
|
||||
*
|
||||
* \param[in] vector Interrupt vector of which the priority level will be read
|
||||
*
|
||||
* \return Currently configured interrupt priority level of the given interrupt
|
||||
* vector.
|
||||
*/
|
||||
enum system_interrupt_priority_level system_interrupt_get_priority(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
uint8_t register_num = vector / 4;
|
||||
uint8_t priority_pos = ((vector % 4) * 8) + (8 - __NVIC_PRIO_BITS);
|
||||
|
||||
enum system_interrupt_priority_level priority = SYSTEM_INTERRUPT_PRIORITY_LEVEL_0;
|
||||
|
||||
if (vector >= 0) {
|
||||
priority = (enum system_interrupt_priority_level)
|
||||
((NVIC->IP[register_num] >> priority_pos) & _SYSTEM_INTERRUPT_PRIORITY_MASK);
|
||||
} else if (vector == SYSTEM_INTERRUPT_SYSTICK) {
|
||||
priority = (enum system_interrupt_priority_level)
|
||||
((SCB->SHP[1] >> _SYSTEM_INTERRUPT_SYSTICK_PRI_POS) & _SYSTEM_INTERRUPT_PRIORITY_MASK);
|
||||
}
|
||||
|
||||
return priority;
|
||||
}
|
||||
|
||||
|
|
@ -1,429 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM System Interrupt Driver
|
||||
*
|
||||
* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#ifndef SYSTEM_INTERRUPT_H_INCLUDED
|
||||
#define SYSTEM_INTERRUPT_H_INCLUDED
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \defgroup asfdoc_sam0_system_interrupt_group SAM System Interrupt (SYSTEM INTERRUPT) Driver
|
||||
*
|
||||
* This driver for Atmel® | SMART ARM®-based microcontrollers provides
|
||||
* an interface for the configuration and management of internal software and
|
||||
* hardware interrupts/exceptions.
|
||||
*
|
||||
* The following peripheral is used by this module:
|
||||
* - NVIC (Nested Vector Interrupt Controller)
|
||||
*
|
||||
* The following devices can use this module:
|
||||
* - Atmel | SMART SAM D20/D21
|
||||
* - Atmel | SMART SAM R21
|
||||
* - Atmel | SMART SAM D09/D10/D11
|
||||
* - Atmel | SMART SAM L21/L22
|
||||
* - Atmel | SMART SAM DA1
|
||||
* - Atmel | SMART SAM C20/C21
|
||||
*
|
||||
* The outline of this documentation is as follows:
|
||||
* - \ref asfdoc_sam0_system_interrupt_prerequisites
|
||||
* - \ref asfdoc_sam0_system_interrupt_module_overview
|
||||
* - \ref asfdoc_sam0_system_interrupt_special_considerations
|
||||
* - \ref asfdoc_sam0_system_interrupt_extra_info
|
||||
* - \ref asfdoc_sam0_system_interrupt_examples
|
||||
* - \ref asfdoc_sam0_system_interrupt_api_overview
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_prerequisites Prerequisites
|
||||
*
|
||||
* There are no prerequisites for this module.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_module_overview Module Overview
|
||||
*
|
||||
* The ARM® Cortex® M0+ core contains an interrupt and exception vector table, which
|
||||
* can be used to configure the device's interrupt handlers; individual
|
||||
* interrupts and exceptions can be enabled and disabled, as well as configured
|
||||
* with a variable priority.
|
||||
*
|
||||
* This driver provides a set of wrappers around the core interrupt functions,
|
||||
* to expose a simple API for the management of global and individual interrupts
|
||||
* within the device.
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_interrupt_module_overview_criticalsec Critical Sections
|
||||
* In some applications it is important to ensure that no interrupts may be
|
||||
* executed by the system whilst a critical portion of code is being run; for
|
||||
* example, a buffer may be copied from one context to another - during which
|
||||
* interrupts must be disabled to avoid corruption of the source buffer contents
|
||||
* until the copy has completed. This driver provides a basic API to enter and
|
||||
* exit nested critical sections, so that global interrupts can be kept disabled
|
||||
* for as long as necessary to complete a critical application code section.
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_interrupt_module_overview_softints Software Interrupts
|
||||
* For some applications, it may be desirable to raise a module or core
|
||||
* interrupt via software. For this reason, a set of APIs to set an interrupt or
|
||||
* exception as pending are provided to the user application.
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_special_considerations Special Considerations
|
||||
*
|
||||
* Interrupts from peripherals in the SAM devices are on a per-module basis;
|
||||
* an interrupt raised from any source within a module will cause a single,
|
||||
* module-common handler to execute. It is the user application or driver's
|
||||
* responsibility to de-multiplex the module-common interrupt to determine the
|
||||
* exact interrupt cause.
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_extra_info Extra Information
|
||||
*
|
||||
* For extra information, see \ref asfdoc_sam0_system_interrupt_extra. This includes:
|
||||
* - \ref asfdoc_sam0_system_interrupt_extra_acronyms
|
||||
* - \ref asfdoc_sam0_system_interrupt_extra_dependencies
|
||||
* - \ref asfdoc_sam0_system_interrupt_extra_errata
|
||||
* - \ref asfdoc_sam0_system_interrupt_extra_history
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_examples Examples
|
||||
*
|
||||
* For a list of examples related to this driver, see
|
||||
* \ref asfdoc_sam0_system_interrupt_exqsg.
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_api_overview API Overview
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include <compiler.h>
|
||||
#include <core_cm0plus.h>
|
||||
#include "system_interrupt_features.h"
|
||||
|
||||
/**
|
||||
* \brief Table of possible system interrupt/exception vector priorities.
|
||||
*
|
||||
* Table of all possible interrupt and exception vector priorities within the
|
||||
* device.
|
||||
*/
|
||||
enum system_interrupt_priority_level {
|
||||
/** Priority level 0, the highest possible interrupt priority */
|
||||
SYSTEM_INTERRUPT_PRIORITY_LEVEL_0 = 0,
|
||||
/** Priority level 1 */
|
||||
SYSTEM_INTERRUPT_PRIORITY_LEVEL_1 = 1,
|
||||
/** Priority level 2 */
|
||||
SYSTEM_INTERRUPT_PRIORITY_LEVEL_2 = 2,
|
||||
/** Priority level 3, the lowest possible interrupt priority */
|
||||
SYSTEM_INTERRUPT_PRIORITY_LEVEL_3 = 3,
|
||||
};
|
||||
|
||||
/**
|
||||
* \name Critical Section Management
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Enters a critical section.
|
||||
*
|
||||
* Disables global interrupts. To support nested critical sections, an internal
|
||||
* count of the critical section nesting will be kept, so that global interrupts
|
||||
* are only re-enabled upon leaving the outermost nested critical section.
|
||||
*
|
||||
*/
|
||||
static inline void system_interrupt_enter_critical_section(void)
|
||||
{
|
||||
cpu_irq_enter_critical();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Leaves a critical section.
|
||||
*
|
||||
* Enables global interrupts. To support nested critical sections, an internal
|
||||
* count of the critical section nesting will be kept, so that global interrupts
|
||||
* are only re-enabled upon leaving the outermost nested critical section.
|
||||
*
|
||||
*/
|
||||
static inline void system_interrupt_leave_critical_section(void)
|
||||
{
|
||||
cpu_irq_leave_critical();
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \name Interrupt Enabling/Disabling
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Check if global interrupts are enabled.
|
||||
*
|
||||
* Checks if global interrupts are currently enabled.
|
||||
*
|
||||
* \returns A boolean that identifies if the global interrupts are enabled or not.
|
||||
*
|
||||
* \retval true Global interrupts are currently enabled
|
||||
* \retval false Global interrupts are currently disabled
|
||||
*
|
||||
*/
|
||||
static inline bool system_interrupt_is_global_enabled(void)
|
||||
{
|
||||
return cpu_irq_is_enabled();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enables global interrupts.
|
||||
*
|
||||
* Enables global interrupts in the device to fire any enabled interrupt handlers.
|
||||
*/
|
||||
static inline void system_interrupt_enable_global(void)
|
||||
{
|
||||
cpu_irq_enable();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disables global interrupts.
|
||||
*
|
||||
* Disabled global interrupts in the device, preventing any enabled interrupt
|
||||
* handlers from executing.
|
||||
*/
|
||||
static inline void system_interrupt_disable_global(void)
|
||||
{
|
||||
cpu_irq_disable();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Checks if an interrupt vector is enabled or not.
|
||||
*
|
||||
* Checks if a specific interrupt vector is currently enabled.
|
||||
*
|
||||
* \param[in] vector Interrupt vector number to check
|
||||
*
|
||||
* \returns A variable identifying if the requested interrupt vector is enabled.
|
||||
*
|
||||
* \retval true Specified interrupt vector is currently enabled
|
||||
* \retval false Specified interrupt vector is currently disabled
|
||||
*
|
||||
*/
|
||||
static inline bool system_interrupt_is_enabled(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
return (bool)((NVIC->ISER[0] >> (uint32_t)vector) & 0x00000001);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enable interrupt vector.
|
||||
*
|
||||
* Enables execution of the software handler for the requested interrupt vector.
|
||||
*
|
||||
* \param[in] vector Interrupt vector to enable
|
||||
*/
|
||||
static inline void system_interrupt_enable(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
NVIC->ISER[0] = (uint32_t)(1 << ((uint32_t)vector & 0x0000001f));
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disable interrupt vector.
|
||||
*
|
||||
* Disables execution of the software handler for the requested interrupt vector.
|
||||
*
|
||||
* \param[in] vector Interrupt vector to disable
|
||||
*/
|
||||
static inline void system_interrupt_disable(
|
||||
const enum system_interrupt_vector vector)
|
||||
{
|
||||
NVIC->ICER[0] = (uint32_t)(1 << ((uint32_t)vector & 0x0000001f));
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \name Interrupt State Management
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Get active interrupt (if any).
|
||||
*
|
||||
* Return the vector number for the current executing software handler, if any.
|
||||
*
|
||||
* \return Interrupt number that is currently executing.
|
||||
*/
|
||||
static inline enum system_interrupt_vector system_interrupt_get_active(void)
|
||||
{
|
||||
uint32_t IPSR = __get_IPSR();
|
||||
/* The IPSR returns the Exception number, which with an offset 16 to IRQ number. */
|
||||
return (enum system_interrupt_vector)((IPSR & _SYSTEM_INTERRUPT_IPSR_MASK) - 16);
|
||||
}
|
||||
|
||||
bool system_interrupt_is_pending(
|
||||
const enum system_interrupt_vector vector);
|
||||
|
||||
enum status_code system_interrupt_set_pending(
|
||||
const enum system_interrupt_vector vector);
|
||||
|
||||
enum status_code system_interrupt_clear_pending(
|
||||
const enum system_interrupt_vector vector);
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \name Interrupt Priority Management
|
||||
* @{
|
||||
*/
|
||||
|
||||
enum status_code system_interrupt_set_priority(
|
||||
const enum system_interrupt_vector vector,
|
||||
const enum system_interrupt_priority_level priority_level);
|
||||
|
||||
enum system_interrupt_priority_level system_interrupt_get_priority(
|
||||
const enum system_interrupt_vector vector);
|
||||
|
||||
/** @} */
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_system_interrupt_extra Extra Information for SYSTEM INTERRUPT Driver
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_extra_acronyms Acronyms
|
||||
* The table below presents the acronyms used in this module:
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Acronym</th>
|
||||
* <th>Description</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>ISR</td>
|
||||
* <td>Interrupt Service Routine</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>NMI</td>
|
||||
* <td>Non-maskable Interrupt</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>SERCOM</td>
|
||||
* <td>Serial Communication Interface</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_extra_dependencies Dependencies
|
||||
* This driver has the following dependencies:
|
||||
*
|
||||
* - None
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_extra_errata Errata
|
||||
* There are no errata related to this driver.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_interrupt_extra_history Module History
|
||||
* An overview of the module history is presented in the table below, with
|
||||
* details on the enhancements and fixes made to the module since its first
|
||||
* release. The current version of this corresponds to the newest version in
|
||||
* the table.
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Changelog</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Initial Release</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_system_interrupt_exqsg Examples for SYSTEM INTERRUPT Driver
|
||||
*
|
||||
* This is a list of the available Quick Start guides (QSGs) and example
|
||||
* applications for \ref asfdoc_sam0_system_interrupt_group. QSGs are simple examples with
|
||||
* step-by-step instructions to configure and use this driver in a selection of
|
||||
* use cases. Note that a QSG can be compiled as a standalone application or be
|
||||
* added to the user application.
|
||||
*
|
||||
* - \subpage asfdoc_sam0_system_interrupt_critsec_use_case
|
||||
* - \subpage asfdoc_sam0_system_interrupt_enablemodint_use_case
|
||||
*
|
||||
* \page asfdoc_sam0_system_interrupt_document_revision_history Document Revision History
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Doc. Rev.</th>
|
||||
* <th>Date</th>
|
||||
* <th>Comments</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42122E</td>
|
||||
* <td>12/2015</td>
|
||||
* <td>Added support for SAM L21/L22, SAM DA1, SAM D09, and SAM C20/C21</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42122D</td>
|
||||
* <td>12/2014</td>
|
||||
* <td>Added support for SAM R21 and SAM D10/D11</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42122C</td>
|
||||
* <td>01/2014</td>
|
||||
* <td>Added support for SAM D21</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42122B</td>
|
||||
* <td>06/2013</td>
|
||||
* <td>Corrected documentation typos</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42122A</td>
|
||||
* <td>06/2013</td>
|
||||
* <td>Initial release</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // #ifndef SYSTEM_INTERRUPT_H_INCLUDED
|
||||
|
|
@ -1,195 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM D21 System Interrupt Driver
|
||||
*
|
||||
* Copyright (C) 2013-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef SYSTEM_INTERRUPT_FEATURES_H_INCLUDED
|
||||
#define SYSTEM_INTERRUPT_FEATURES_H_INCLUDED
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
|
||||
/* Generates a interrupt vector table enum list entry for a given module type
|
||||
and index (e.g. "SYSTEM_INTERRUPT_MODULE_TC0 = TC0_IRQn,"). */
|
||||
# define _MODULE_IRQn(n, module) \
|
||||
SYSTEM_INTERRUPT_MODULE_##module##n = module##n##_IRQn,
|
||||
|
||||
/* Generates interrupt vector table enum list entries for all instances of a
|
||||
given module type on the selected device. */
|
||||
# define _SYSTEM_INTERRUPT_MODULES(name) \
|
||||
MREPEAT(name##_INST_NUM, _MODULE_IRQn, name)
|
||||
|
||||
# define _SYSTEM_INTERRUPT_IPSR_MASK 0x0000003f
|
||||
# define _SYSTEM_INTERRUPT_PRIORITY_MASK 0x00000003
|
||||
|
||||
# define _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START 0
|
||||
|
||||
# define _SYSTEM_INTERRUPT_SYSTICK_PRI_POS 30
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_system_interrupt_group
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Table of possible system interrupt/exception vector numbers.
|
||||
*
|
||||
* Table of all possible interrupt and exception vector indexes within the
|
||||
* SAM D21 device. Check peripherals configuration in SAM D21 datasheet for
|
||||
* available vector index for specific device.
|
||||
*
|
||||
*/
|
||||
#if defined(__DOXYGEN__)
|
||||
/** \note The actual enumeration name is "system_interrupt_vector". */
|
||||
enum system_interrupt_vector_samd21 {
|
||||
#else
|
||||
enum system_interrupt_vector {
|
||||
#endif
|
||||
/** Interrupt vector index for a NMI interrupt */
|
||||
SYSTEM_INTERRUPT_NON_MASKABLE = NonMaskableInt_IRQn,
|
||||
/** Interrupt vector index for a Hard Fault memory access exception */
|
||||
SYSTEM_INTERRUPT_HARD_FAULT = HardFault_IRQn,
|
||||
/** Interrupt vector index for a Supervisor Call exception */
|
||||
SYSTEM_INTERRUPT_SV_CALL = SVCall_IRQn,
|
||||
/** Interrupt vector index for a Pending Supervisor interrupt */
|
||||
SYSTEM_INTERRUPT_PENDING_SV = PendSV_IRQn,
|
||||
/** Interrupt vector index for a System Tick interrupt */
|
||||
SYSTEM_INTERRUPT_SYSTICK = SysTick_IRQn,
|
||||
|
||||
/** Interrupt vector index for a Power Manager peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_PM = PM_IRQn,
|
||||
/** Interrupt vector index for a System Control peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_SYSCTRL = SYSCTRL_IRQn,
|
||||
/** Interrupt vector index for a Watch Dog peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_WDT = WDT_IRQn,
|
||||
/** Interrupt vector index for a Real Time Clock peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_RTC = RTC_IRQn,
|
||||
/** Interrupt vector index for an External Interrupt peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_EIC = EIC_IRQn,
|
||||
/** Interrupt vector index for a Non Volatile Memory Controller interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_NVMCTRL = NVMCTRL_IRQn,
|
||||
/** Interrupt vector index for a Direct Memory Access interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_DMA = DMAC_IRQn,
|
||||
#if defined(__DOXYGEN__) || defined(ID_USB)
|
||||
/** Interrupt vector index for a Universal Serial Bus interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_USB = USB_IRQn,
|
||||
#endif
|
||||
/** Interrupt vector index for an Event System interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_EVSYS = EVSYS_IRQn,
|
||||
#if defined(__DOXYGEN__)
|
||||
/** Interrupt vector index for a SERCOM peripheral interrupt.
|
||||
*
|
||||
* Each specific device may contain several SERCOM peripherals; each module
|
||||
* instance will have its own entry in the table, with the instance number
|
||||
* substituted for "n" in the entry name (e.g.
|
||||
* \c SYSTEM_INTERRUPT_MODULE_SERCOM0).
|
||||
*/
|
||||
SYSTEM_INTERRUPT_MODULE_SERCOMn = SERCOMn_IRQn,
|
||||
|
||||
/** Interrupt vector index for a Timer/Counter Control peripheral interrupt.
|
||||
*
|
||||
* Each specific device may contain several TCC peripherals; each module
|
||||
* instance will have its own entry in the table, with the instance number
|
||||
* substituted for "n" in the entry name (e.g.
|
||||
* \c SYSTEM_INTERRUPT_MODULE_TCC0).
|
||||
*/
|
||||
SYSTEM_INTERRUPT_MODULE_TCCn = TCCn_IRQn,
|
||||
|
||||
/** Interrupt vector index for a Timer/Counter peripheral interrupt.
|
||||
*
|
||||
* Each specific device may contain several TC peripherals; each module
|
||||
* instance will have its own entry in the table, with the instance number
|
||||
* substituted for "n" in the entry name (e.g.
|
||||
* \c SYSTEM_INTERRUPT_MODULE_TC3).
|
||||
*/
|
||||
SYSTEM_INTERRUPT_MODULE_TCn = TCn_IRQn,
|
||||
#else
|
||||
_SYSTEM_INTERRUPT_MODULES(SERCOM)
|
||||
|
||||
_SYSTEM_INTERRUPT_MODULES(TCC)
|
||||
|
||||
SYSTEM_INTERRUPT_MODULE_TC3 = TC3_IRQn,
|
||||
SYSTEM_INTERRUPT_MODULE_TC4 = TC4_IRQn,
|
||||
SYSTEM_INTERRUPT_MODULE_TC5 = TC5_IRQn,
|
||||
# if defined(ID_TC6)
|
||||
SYSTEM_INTERRUPT_MODULE_TC6 = TC6_IRQn,
|
||||
# endif
|
||||
# if defined(ID_TC7)
|
||||
SYSTEM_INTERRUPT_MODULE_TC7 = TC7_IRQn,
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#if defined(__DOXYGEN__) || defined(ID_ADC)
|
||||
/** Interrupt vector index for an Analog-to-Digital peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_ADC = ADC_IRQn,
|
||||
#endif
|
||||
|
||||
#if defined(__DOXYGEN__) || defined(ID_AC)
|
||||
/** Interrupt vector index for an Analog Comparator peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_AC = AC_IRQn,
|
||||
#endif
|
||||
|
||||
#if defined(__DOXYGEN__) || defined(ID_DAC)
|
||||
/** Interrupt vector index for a Digital-to-Analog peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_DAC = DAC_IRQn,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || defined(ID_PTC)
|
||||
/** Interrupt vector index for a Peripheral Touch Controller peripheral
|
||||
* interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_PTC = PTC_IRQn,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || defined(ID_I2S)
|
||||
/** Interrupt vector index for a Inter-IC Sound Interface peripheral
|
||||
* interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_I2S = I2S_IRQn,
|
||||
#endif
|
||||
#if defined(__DOXYGEN__) || defined(ID_AC1)
|
||||
/** Interrupt vector index for an Analog Comparator 1 peripheral interrupt */
|
||||
SYSTEM_INTERRUPT_MODULE_AC1 = AC1_IRQn,
|
||||
#endif
|
||||
};
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif
|
||||
|
|
@ -1,311 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Pin Multiplexer Driver
|
||||
*
|
||||
* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#include <pinmux.h>
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Writes out a given configuration of a Port pin configuration to the
|
||||
* hardware module.
|
||||
*
|
||||
* \note If the pin direction is set as an output, the pull-up/pull-down input
|
||||
* configuration setting is ignored.
|
||||
*
|
||||
* \param[in] port Base of the PORT module to configure
|
||||
* \param[in] pin_mask Mask of the port pin to configure
|
||||
* \param[in] config Configuration settings for the pin
|
||||
*/
|
||||
static void _system_pinmux_config(
|
||||
PortGroup *const port,
|
||||
const uint32_t pin_mask,
|
||||
const struct system_pinmux_config *const config)
|
||||
{
|
||||
Assert(port);
|
||||
Assert(config);
|
||||
|
||||
/* Track the configuration bits into a temporary variable before writing */
|
||||
uint32_t pin_cfg = 0;
|
||||
|
||||
/* Enabled powersave mode, don't create configuration */
|
||||
if (!config->powersave) {
|
||||
/* Enable the pin peripheral MUX flag if non-GPIO selected (pinmux will
|
||||
* be written later) and store the new MUX mask */
|
||||
if (config->mux_position != SYSTEM_PINMUX_GPIO) {
|
||||
pin_cfg |= PORT_WRCONFIG_PMUXEN;
|
||||
pin_cfg |= (config->mux_position << PORT_WRCONFIG_PMUX_Pos);
|
||||
}
|
||||
|
||||
/* Check if the user has requested that the input buffer be enabled */
|
||||
if ((config->direction == SYSTEM_PINMUX_PIN_DIR_INPUT) ||
|
||||
(config->direction == SYSTEM_PINMUX_PIN_DIR_OUTPUT_WITH_READBACK)) {
|
||||
/* Enable input buffer flag */
|
||||
pin_cfg |= PORT_WRCONFIG_INEN;
|
||||
|
||||
/* Enable pull-up/pull-down control flag if requested */
|
||||
if (config->input_pull != SYSTEM_PINMUX_PIN_PULL_NONE) {
|
||||
pin_cfg |= PORT_WRCONFIG_PULLEN;
|
||||
}
|
||||
|
||||
/* Clear the port DIR bits to disable the output buffer */
|
||||
port->DIRCLR.reg = pin_mask;
|
||||
}
|
||||
|
||||
/* Check if the user has requested that the output buffer be enabled */
|
||||
if ((config->direction == SYSTEM_PINMUX_PIN_DIR_OUTPUT) ||
|
||||
(config->direction == SYSTEM_PINMUX_PIN_DIR_OUTPUT_WITH_READBACK)) {
|
||||
/* Cannot use a pull-up if the output driver is enabled,
|
||||
* if requested the input buffer can only sample the current
|
||||
* output state */
|
||||
pin_cfg &= ~PORT_WRCONFIG_PULLEN;
|
||||
}
|
||||
} else {
|
||||
port->DIRCLR.reg = pin_mask;
|
||||
}
|
||||
|
||||
/* The Write Configuration register (WRCONFIG) requires the
|
||||
* pins to to grouped into two 16-bit half-words - split them out here */
|
||||
uint32_t lower_pin_mask = (pin_mask & 0xFFFF);
|
||||
uint32_t upper_pin_mask = (pin_mask >> 16);
|
||||
|
||||
/* Configure the lower 16-bits of the port to the desired configuration,
|
||||
* including the pin peripheral multiplexer just in case it is enabled */
|
||||
port->WRCONFIG.reg
|
||||
= (lower_pin_mask << PORT_WRCONFIG_PINMASK_Pos) |
|
||||
pin_cfg | PORT_WRCONFIG_WRPMUX | PORT_WRCONFIG_WRPINCFG;
|
||||
|
||||
/* Configure the upper 16-bits of the port to the desired configuration,
|
||||
* including the pin peripheral multiplexer just in case it is enabled */
|
||||
port->WRCONFIG.reg
|
||||
= (upper_pin_mask << PORT_WRCONFIG_PINMASK_Pos) |
|
||||
pin_cfg | PORT_WRCONFIG_WRPMUX | PORT_WRCONFIG_WRPINCFG |
|
||||
PORT_WRCONFIG_HWSEL;
|
||||
|
||||
if(!config->powersave) {
|
||||
/* Set the pull-up state once the port pins are configured if one was
|
||||
* requested and it does not violate the valid set of port
|
||||
* configurations */
|
||||
if (pin_cfg & PORT_WRCONFIG_PULLEN) {
|
||||
/* Set the OUT register bits to enable the pull-up if requested,
|
||||
* clear to enable pull-down */
|
||||
if (config->input_pull == SYSTEM_PINMUX_PIN_PULL_UP) {
|
||||
port->OUTSET.reg = pin_mask;
|
||||
} else {
|
||||
port->OUTCLR.reg = pin_mask;
|
||||
}
|
||||
}
|
||||
|
||||
/* Check if the user has requested that the output buffer be enabled */
|
||||
if ((config->direction == SYSTEM_PINMUX_PIN_DIR_OUTPUT) ||
|
||||
(config->direction == SYSTEM_PINMUX_PIN_DIR_OUTPUT_WITH_READBACK)) {
|
||||
/* Set the port DIR bits to enable the output buffer */
|
||||
port->DIRSET.reg = pin_mask;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Writes a Port pin configuration to the hardware module.
|
||||
*
|
||||
* Writes out a given configuration of a Port pin configuration to the hardware
|
||||
* module.
|
||||
*
|
||||
* \note If the pin direction is set as an output, the pull-up/pull-down input
|
||||
* configuration setting is ignored.
|
||||
*
|
||||
* \param[in] gpio_pin Index of the GPIO pin to configure
|
||||
* \param[in] config Configuration settings for the pin
|
||||
*/
|
||||
void system_pinmux_pin_set_config(
|
||||
const uint8_t gpio_pin,
|
||||
const struct system_pinmux_config *const config)
|
||||
{
|
||||
PortGroup *const port = system_pinmux_get_group_from_gpio_pin(gpio_pin);
|
||||
uint32_t pin_mask = (1UL << (gpio_pin % 32));
|
||||
|
||||
_system_pinmux_config(port, pin_mask, config);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Writes a Port pin group configuration to the hardware module.
|
||||
*
|
||||
* Writes out a given configuration of a Port pin group configuration to the
|
||||
* hardware module.
|
||||
*
|
||||
* \note If the pin direction is set as an output, the pull-up/pull-down input
|
||||
* configuration setting is ignored.
|
||||
*
|
||||
* \param[in] port Base of the PORT module to configure
|
||||
* \param[in] mask Mask of the port pin(s) to configure
|
||||
* \param[in] config Configuration settings for the pin
|
||||
*/
|
||||
void system_pinmux_group_set_config(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const struct system_pinmux_config *const config)
|
||||
{
|
||||
Assert(port);
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (mask & (1UL << i)) {
|
||||
_system_pinmux_config(port, (1UL << i), config);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Configures the input sampling mode for a group of pins.
|
||||
*
|
||||
* Configures the input sampling mode for a group of pins, to
|
||||
* control when the physical I/O pin value is sampled and
|
||||
* stored inside the microcontroller.
|
||||
*
|
||||
* \param[in] port Base of the PORT module to configure
|
||||
* \param[in] mask Mask of the port pin(s) to configure
|
||||
* \param[in] mode New pin sampling mode to configure
|
||||
*/
|
||||
void system_pinmux_group_set_input_sample_mode(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const enum system_pinmux_pin_sample mode)
|
||||
{
|
||||
Assert(port);
|
||||
|
||||
if (mode == SYSTEM_PINMUX_PIN_SAMPLE_ONDEMAND) {
|
||||
port->CTRL.reg |= mask;
|
||||
} else {
|
||||
port->CTRL.reg &= ~mask;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef FEATURE_SYSTEM_PINMUX_SLEWRATE_LIMITER
|
||||
/**
|
||||
* \brief Configures the output slew rate mode for a group of pins.
|
||||
*
|
||||
* Configures the output slew rate mode for a group of pins, to
|
||||
* control the speed at which the physical output pin can react to
|
||||
* logical changes of the I/O pin value.
|
||||
*
|
||||
* \param[in] port Base of the PORT module to configure
|
||||
* \param[in] mask Mask of the port pin(s) to configure
|
||||
* \param[in] mode New pin slew rate mode to configure
|
||||
*/
|
||||
void system_pinmux_group_set_output_slew_rate(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const enum system_pinmux_pin_slew_rate mode)
|
||||
{
|
||||
Assert(port);
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (mask & (1UL << i)) {
|
||||
if (mode == SYSTEM_PINMUX_PIN_SLEW_RATE_LIMITED) {
|
||||
port->PINCFG[i].reg |= PORT_PINCFG_SLEWLIM;
|
||||
} else {
|
||||
port->PINCFG[i].reg &= ~PORT_PINCFG_SLEWLIM;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef FEATURE_SYSTEM_PINMUX_DRIVE_STRENGTH
|
||||
/**
|
||||
* \brief Configures the output driver strength mode for a group of pins.
|
||||
*
|
||||
* Configures the output drive strength for a group of pins, to
|
||||
* control the amount of current the pad is able to sink/source.
|
||||
*
|
||||
* \param[in] port Base of the PORT module to configure
|
||||
* \param[in] mask Mask of the port pin(s) to configure
|
||||
* \param[in] mode New output driver strength mode to configure
|
||||
*/
|
||||
void system_pinmux_group_set_output_strength(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const enum system_pinmux_pin_strength mode)
|
||||
{
|
||||
Assert(port);
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (mask & (1UL << i)) {
|
||||
if (mode == SYSTEM_PINMUX_PIN_STRENGTH_HIGH) {
|
||||
port->PINCFG[i].reg |= PORT_PINCFG_DRVSTR;
|
||||
} else {
|
||||
port->PINCFG[i].reg &= ~PORT_PINCFG_DRVSTR;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef FEATURE_SYSTEM_PINMUX_OPEN_DRAIN
|
||||
/**
|
||||
* \brief Configures the output driver mode for a group of pins.
|
||||
*
|
||||
* Configures the output driver mode for a group of pins, to
|
||||
* control the pad behavior.
|
||||
*
|
||||
* \param[in] port Base of the PORT module to configure
|
||||
* \param[in] mask Mask of the port pin(s) to configure
|
||||
* \param[in] mode New pad output driver mode to configure
|
||||
*/
|
||||
void system_pinmux_group_set_output_drive(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const enum system_pinmux_pin_drive mode)
|
||||
{
|
||||
Assert(port);
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
if (mask & (1UL << i)) {
|
||||
if (mode == SYSTEM_PINMUX_PIN_DRIVE_OPEN_DRAIN) {
|
||||
port->PINCFG[i].reg |= PORT_PINCFG_ODRAIN;
|
||||
} else {
|
||||
port->PINCFG[i].reg &= ~PORT_PINCFG_ODRAIN;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
|
@ -1,675 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Pin Multiplexer Driver
|
||||
*
|
||||
* Copyright (C) 2012-2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#ifndef PINMUX_H_INCLUDED
|
||||
#define PINMUX_H_INCLUDED
|
||||
|
||||
/**
|
||||
* \defgroup asfdoc_sam0_system_pinmux_group SAM System Pin Multiplexer (SYSTEM PINMUX) Driver
|
||||
*
|
||||
* This driver for Atmel® | SMART ARM®-based microcontrollers provides
|
||||
* an interface for the configuration and management of the device's physical
|
||||
* I/O Pins, to alter the direction and input/drive characteristics as well as
|
||||
* to configure the pin peripheral multiplexer selection.
|
||||
*
|
||||
* The following peripheral is used by this module:
|
||||
* - PORT (Port I/O Management)
|
||||
*
|
||||
* The following devices can use this module:
|
||||
* - Atmel | SMART SAM D20/D21
|
||||
* - Atmel | SMART SAM R21
|
||||
* - Atmel | SMART SAM D09/D10/D11
|
||||
* - Atmel | SMART SAM L21/L22
|
||||
* - Atmel | SMART SAM DA1
|
||||
* - Atmel | SMART SAM C20/C21
|
||||
*
|
||||
* The outline of this documentation is as follows:
|
||||
* - \ref asfdoc_sam0_system_pinmux_prerequisites
|
||||
* - \ref asfdoc_sam0_system_pinmux_module_overview
|
||||
* - \ref asfdoc_sam0_system_pinmux_special_considerations
|
||||
* - \ref asfdoc_sam0_system_pinmux_extra_info
|
||||
* - \ref asfdoc_sam0_system_pinmux_examples
|
||||
* - \ref asfdoc_sam0_system_pinmux_api_overview
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_pinmux_prerequisites Prerequisites
|
||||
*
|
||||
* There are no prerequisites for this module.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_pinmux_module_overview Module Overview
|
||||
*
|
||||
* The SAM devices contain a number of General Purpose I/O pins, used to
|
||||
* interface the user application logic and internal hardware peripherals to
|
||||
* an external system. The Pin Multiplexer (PINMUX) driver provides a method
|
||||
* of configuring the individual pin peripheral multiplexers to select
|
||||
* alternate pin functions.
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_pinmux_features Driver Feature Macro Definition
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Driver Feature Macro</th>
|
||||
* <th>Supported devices</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>FEATURE_SYSTEM_PINMUX_DRIVE_STRENGTH</td>
|
||||
* <td>SAM L21, SAM C20/C21</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
* \note The specific features are only available in the driver when the
|
||||
* selected device supports those features.
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_pinmux_physical_logical_pins Physical and Logical GPIO Pins
|
||||
* SAM devices use two naming conventions for the I/O pins in the device; one
|
||||
* physical and one logical. Each physical pin on a device package is assigned
|
||||
* both a physical port and pin identifier (e.g. "PORTA.0") as well as a
|
||||
* monotonically incrementing logical GPIO number (e.g. "GPIO0"). While the
|
||||
* former is used to map physical pins to their physical internal device module
|
||||
* counterparts, for simplicity the design of this driver uses the logical GPIO
|
||||
* numbers instead.
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_pinmux_peripheral_muxing Peripheral Multiplexing
|
||||
* SAM devices contain a peripheral MUX, which is individually controllable
|
||||
* for each I/O pin of the device. The peripheral MUX allows you to select the
|
||||
* function of a physical package pin - whether it will be controlled as a user
|
||||
* controllable GPIO pin, or whether it will be connected internally to one of
|
||||
* several peripheral modules (such as an I<SUP>2</SUP>C module). When a pin is
|
||||
* configured in GPIO mode, other peripherals connected to the same pin will be
|
||||
* disabled.
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_pinmux_pad_characteristics Special Pad Characteristics
|
||||
* There are several special modes that can be selected on one or more I/O pins
|
||||
* of the device, which alter the input and output characteristics of the pad.
|
||||
*
|
||||
* \subsubsection asfdoc_sam0_system_pinmux_drive_strength Drive Strength
|
||||
* The Drive Strength configures the strength of the output driver on the
|
||||
* pad. Normally, there is a fixed current limit that each I/O pin can safely
|
||||
* drive, however some I/O pads offer a higher drive mode which increases this
|
||||
* limit for that I/O pin at the expense of an increased power consumption.
|
||||
*
|
||||
* \subsubsection asfdoc_sam0_system_pinmux_slew_rate Slew Rate
|
||||
* The Slew Rate configures the slew rate of the output driver, limiting the
|
||||
* rate at which the pad output voltage can change with time.
|
||||
*
|
||||
* \subsubsection asfdoc_sam0_system_pinmux_input_sample_mode Input Sample Mode
|
||||
* The Input Sample Mode configures the input sampler buffer of the pad. By
|
||||
* default, the input buffer is only sampled "on-demand", i.e. when the user
|
||||
* application attempts to read from the input buffer. This mode is the most
|
||||
* power efficient, but increases the latency of the input sample by two clock
|
||||
* cycles of the port clock. To reduce latency, the input sampler can instead
|
||||
* be configured to always sample the input buffer on each port clock cycle, at
|
||||
* the expense of an increased power consumption.
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_pinmux_module_overview_physical Physical Connection
|
||||
*
|
||||
* \ref asfdoc_sam0_system_pinmux_intconnections "The diagram below" shows
|
||||
* how this module is interconnected within the device:
|
||||
*
|
||||
* \anchor asfdoc_sam0_system_pinmux_intconnections
|
||||
* \dot
|
||||
* digraph overview {
|
||||
* node [label="Port Pad" shape=square] pad;
|
||||
*
|
||||
* subgraph driver {
|
||||
* node [label="Peripheral MUX" shape=trapezium] pinmux;
|
||||
* node [label="GPIO Module" shape=ellipse shape=ellipse style=filled fillcolor=lightgray] gpio;
|
||||
* node [label="Other Peripheral Modules" shape=ellipse style=filled fillcolor=lightgray] peripherals;
|
||||
* }
|
||||
*
|
||||
* pinmux -> gpio;
|
||||
* pad -> pinmux;
|
||||
* pinmux -> peripherals;
|
||||
* }
|
||||
* \enddot
|
||||
*
|
||||
* \section asfdoc_sam0_system_pinmux_special_considerations Special Considerations
|
||||
*
|
||||
* The SAM port pin input sampling mode is set in groups of four physical
|
||||
* pins; setting the sampling mode of any pin in a sub-group of eight I/O pins
|
||||
* will configure the sampling mode of the entire sub-group.
|
||||
*
|
||||
* High Drive Strength output driver mode is not available on all device pins -
|
||||
* refer to your device specific datasheet.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_pinmux_extra_info Extra Information
|
||||
*
|
||||
* For extra information, see \ref asfdoc_sam0_system_pinmux_extra. This includes:
|
||||
* - \ref asfdoc_sam0_system_pinmux_extra_acronyms
|
||||
* - \ref asfdoc_sam0_system_pinmux_extra_dependencies
|
||||
* - \ref asfdoc_sam0_system_pinmux_extra_errata
|
||||
* - \ref asfdoc_sam0_system_pinmux_extra_history
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_pinmux_examples Examples
|
||||
*
|
||||
* For a list of examples related to this driver, see
|
||||
* \ref asfdoc_sam0_system_pinmux_exqsg.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_pinmux_api_overview API Overview
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include <compiler.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*@{*/
|
||||
#if (SAML21) || (SAMC20) || (SAMC21) || (SAMD21) || (SAMD10) || (SAMD11) || (SAMR30) || defined(__DOXYGEN__)
|
||||
/** Output Driver Strength Selection feature support */
|
||||
# define FEATURE_SYSTEM_PINMUX_DRIVE_STRENGTH
|
||||
#endif
|
||||
/*@}*/
|
||||
|
||||
/** Peripheral multiplexer index to select GPIO mode for a pin */
|
||||
#define SYSTEM_PINMUX_GPIO (1 << 7)
|
||||
|
||||
/**
|
||||
* \brief Port pin direction configuration enum.
|
||||
*
|
||||
* Enum for the possible pin direction settings of the port pin configuration
|
||||
* structure, to indicate the direction the pin should use.
|
||||
*/
|
||||
enum system_pinmux_pin_dir {
|
||||
/** The pin's input buffer should be enabled, so that the pin state can
|
||||
* be read */
|
||||
SYSTEM_PINMUX_PIN_DIR_INPUT,
|
||||
/** The pin's output buffer should be enabled, so that the pin state can
|
||||
* be set (but not read back) */
|
||||
SYSTEM_PINMUX_PIN_DIR_OUTPUT,
|
||||
/** The pin's output and input buffers should both be enabled, so that the
|
||||
* pin state can be set and read back */
|
||||
SYSTEM_PINMUX_PIN_DIR_OUTPUT_WITH_READBACK,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Port pin input pull configuration enum.
|
||||
*
|
||||
* Enum for the possible pin pull settings of the port pin configuration
|
||||
* structure, to indicate the type of logic level pull the pin should use.
|
||||
*/
|
||||
enum system_pinmux_pin_pull {
|
||||
/** No logical pull should be applied to the pin */
|
||||
SYSTEM_PINMUX_PIN_PULL_NONE,
|
||||
/** Pin should be pulled up when idle */
|
||||
SYSTEM_PINMUX_PIN_PULL_UP,
|
||||
/** Pin should be pulled down when idle */
|
||||
SYSTEM_PINMUX_PIN_PULL_DOWN,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Port pin digital input sampling mode enum.
|
||||
*
|
||||
* Enum for the possible input sampling modes for the port pin configuration
|
||||
* structure, to indicate the type of sampling a port pin should use.
|
||||
*/
|
||||
enum system_pinmux_pin_sample {
|
||||
/** Pin input buffer should continuously sample the pin state */
|
||||
SYSTEM_PINMUX_PIN_SAMPLE_CONTINUOUS,
|
||||
/** Pin input buffer should be enabled when the IN register is read */
|
||||
SYSTEM_PINMUX_PIN_SAMPLE_ONDEMAND,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Port pin configuration structure.
|
||||
*
|
||||
* Configuration structure for a port pin instance. This structure should
|
||||
* be initialized by the \ref system_pinmux_get_config_defaults() function
|
||||
* before being modified by the user application.
|
||||
*/
|
||||
struct system_pinmux_config {
|
||||
/** MUX index of the peripheral that should control the pin, if peripheral
|
||||
* control is desired. For GPIO use, this should be set to
|
||||
* \ref SYSTEM_PINMUX_GPIO. */
|
||||
uint8_t mux_position;
|
||||
|
||||
/** Port buffer input/output direction */
|
||||
enum system_pinmux_pin_dir direction;
|
||||
|
||||
/** Logic level pull of the input buffer */
|
||||
enum system_pinmux_pin_pull input_pull;
|
||||
|
||||
/** Enable lowest possible powerstate on the pin
|
||||
*
|
||||
* \note All other configurations will be ignored, the pin will be disabled.
|
||||
*/
|
||||
bool powersave;
|
||||
};
|
||||
|
||||
/** \name Configuration and Initialization
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Initializes a Port pin configuration structure to defaults.
|
||||
*
|
||||
* Initializes a given Port pin configuration structure to a set of
|
||||
* known default values. This function should be called on all new
|
||||
* instances of these configuration structures before being modified by the
|
||||
* user application.
|
||||
*
|
||||
* The default configuration is as follows:
|
||||
* \li Non peripheral (i.e. GPIO) controlled
|
||||
* \li Input mode with internal pull-up enabled
|
||||
*
|
||||
* \param[out] config Configuration structure to initialize to default values
|
||||
*/
|
||||
static inline void system_pinmux_get_config_defaults(
|
||||
struct system_pinmux_config *const config)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(config);
|
||||
|
||||
/* Default configuration values */
|
||||
config->mux_position = SYSTEM_PINMUX_GPIO;
|
||||
config->direction = SYSTEM_PINMUX_PIN_DIR_INPUT;
|
||||
config->input_pull = SYSTEM_PINMUX_PIN_PULL_UP;
|
||||
config->powersave = false;
|
||||
}
|
||||
|
||||
void system_pinmux_pin_set_config(
|
||||
const uint8_t gpio_pin,
|
||||
const struct system_pinmux_config *const config);
|
||||
|
||||
void system_pinmux_group_set_config(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const struct system_pinmux_config *const config);
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \name Special Mode Configuration (Physical Group Orientated)
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Retrieves the PORT module group instance from a given GPIO pin number.
|
||||
*
|
||||
* Retrieves the PORT module group instance associated with a given logical
|
||||
* GPIO pin number.
|
||||
*
|
||||
* \param[in] gpio_pin Index of the GPIO pin to convert
|
||||
*
|
||||
* \return Base address of the associated PORT module.
|
||||
*/
|
||||
static inline PortGroup* system_pinmux_get_group_from_gpio_pin(
|
||||
const uint8_t gpio_pin)
|
||||
{
|
||||
uint8_t port_index = (gpio_pin / 128);
|
||||
uint8_t group_index = (gpio_pin / 32);
|
||||
|
||||
/* Array of available ports */
|
||||
Port *const ports[PORT_INST_NUM] = PORT_INSTS;
|
||||
|
||||
if (port_index < PORT_INST_NUM) {
|
||||
return &(ports[port_index]->Group[group_index]);
|
||||
} else {
|
||||
Assert(false);
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
void system_pinmux_group_set_input_sample_mode(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const enum system_pinmux_pin_sample mode);
|
||||
|
||||
/** @} */
|
||||
|
||||
/** \name Special Mode Configuration (Logical Pin Orientated)
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Retrieves the currently selected MUX position of a logical pin.
|
||||
*
|
||||
* Retrieves the selected MUX peripheral on a given logical GPIO pin.
|
||||
*
|
||||
* \param[in] gpio_pin Index of the GPIO pin to configure
|
||||
*
|
||||
* \return Currently selected peripheral index on the specified pin.
|
||||
*/
|
||||
static inline uint8_t system_pinmux_pin_get_mux_position(
|
||||
const uint8_t gpio_pin)
|
||||
{
|
||||
PortGroup *const port = system_pinmux_get_group_from_gpio_pin(gpio_pin);
|
||||
uint32_t pin_index = (gpio_pin % 32);
|
||||
|
||||
if (!(port->PINCFG[pin_index].reg & PORT_PINCFG_PMUXEN)) {
|
||||
return SYSTEM_PINMUX_GPIO;
|
||||
}
|
||||
|
||||
uint32_t pmux_reg = port->PMUX[pin_index / 2].reg;
|
||||
|
||||
if (pin_index & 1) {
|
||||
return (pmux_reg & PORT_PMUX_PMUXO_Msk) >> PORT_PMUX_PMUXO_Pos;
|
||||
}
|
||||
else {
|
||||
return (pmux_reg & PORT_PMUX_PMUXE_Msk) >> PORT_PMUX_PMUXE_Pos;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Configures the input sampling mode for a GPIO pin.
|
||||
*
|
||||
* Configures the input sampling mode for a GPIO input, to
|
||||
* control when the physical I/O pin value is sampled and
|
||||
* stored inside the microcontroller.
|
||||
*
|
||||
* \param[in] gpio_pin Index of the GPIO pin to configure
|
||||
* \param[in] mode New pin sampling mode to configure
|
||||
*/
|
||||
static inline void system_pinmux_pin_set_input_sample_mode(
|
||||
const uint8_t gpio_pin,
|
||||
const enum system_pinmux_pin_sample mode)
|
||||
{
|
||||
PortGroup* const port = system_pinmux_get_group_from_gpio_pin(gpio_pin);
|
||||
uint32_t pin_index = (gpio_pin % 32);
|
||||
|
||||
if (mode == SYSTEM_PINMUX_PIN_SAMPLE_ONDEMAND) {
|
||||
port->CTRL.reg |= (1 << pin_index);
|
||||
} else {
|
||||
port->CTRL.reg &= ~(1 << pin_index);
|
||||
}
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef FEATURE_SYSTEM_PINMUX_DRIVE_STRENGTH
|
||||
/**
|
||||
* \brief Port pin drive output strength enum.
|
||||
*
|
||||
* Enum for the possible output drive strengths for the port pin
|
||||
* configuration structure, to indicate the driver strength the pin should
|
||||
* use.
|
||||
*/
|
||||
enum system_pinmux_pin_strength {
|
||||
/** Normal output driver strength */
|
||||
SYSTEM_PINMUX_PIN_STRENGTH_NORMAL,
|
||||
/** High current output driver strength */
|
||||
SYSTEM_PINMUX_PIN_STRENGTH_HIGH,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Configures the output driver strength mode for a GPIO pin.
|
||||
*
|
||||
* Configures the output drive strength for a GPIO output, to
|
||||
* control the amount of current the pad is able to sink/source.
|
||||
*
|
||||
* \param[in] gpio_pin Index of the GPIO pin to configure
|
||||
* \param[in] mode New output driver strength mode to configure
|
||||
*/
|
||||
static inline void system_pinmux_pin_set_output_strength(
|
||||
const uint8_t gpio_pin,
|
||||
const enum system_pinmux_pin_strength mode)
|
||||
{
|
||||
PortGroup* const port = system_pinmux_get_group_from_gpio_pin(gpio_pin);
|
||||
uint32_t pin_index = (gpio_pin % 32);
|
||||
|
||||
if (mode == SYSTEM_PINMUX_PIN_STRENGTH_HIGH) {
|
||||
port->PINCFG[pin_index].reg |= PORT_PINCFG_DRVSTR;
|
||||
}
|
||||
else {
|
||||
port->PINCFG[pin_index].reg &= ~PORT_PINCFG_DRVSTR;
|
||||
}
|
||||
}
|
||||
|
||||
void system_pinmux_group_set_output_strength(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const enum system_pinmux_pin_strength mode);
|
||||
#endif
|
||||
|
||||
#ifdef FEATURE_SYSTEM_PINMUX_SLEWRATE_LIMITER
|
||||
/**
|
||||
* \brief Port pin output slew rate enum.
|
||||
*
|
||||
* Enum for the possible output drive slew rates for the port pin
|
||||
* configuration structure, to indicate the driver slew rate the pin should
|
||||
* use.
|
||||
*/
|
||||
enum system_pinmux_pin_slew_rate {
|
||||
/** Normal pin output slew rate */
|
||||
SYSTEM_PINMUX_PIN_SLEW_RATE_NORMAL,
|
||||
/** Enable slew rate limiter on the pin */
|
||||
SYSTEM_PINMUX_PIN_SLEW_RATE_LIMITED,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Configures the output slew rate mode for a GPIO pin.
|
||||
*
|
||||
* Configures the output slew rate mode for a GPIO output, to
|
||||
* control the speed at which the physical output pin can react to
|
||||
* logical changes of the I/O pin value.
|
||||
*
|
||||
* \param[in] gpio_pin Index of the GPIO pin to configure
|
||||
* \param[in] mode New pin slew rate mode to configure
|
||||
*/
|
||||
static inline void system_pinmux_pin_set_output_slew_rate(
|
||||
const uint8_t gpio_pin,
|
||||
const enum system_pinmux_pin_slew_rate mode)
|
||||
{
|
||||
PortGroup* const port = system_pinmux_get_group_from_gpio_pin(gpio_pin);
|
||||
uint32_t pin_index = (gpio_pin % 32);
|
||||
|
||||
if (mode == SYSTEM_PINMUX_PIN_SLEW_RATE_LIMITED) {
|
||||
port->PINCFG[pin_index].reg |= PORT_PINCFG_SLEWLIM;
|
||||
}
|
||||
else {
|
||||
port->PINCFG[pin_index].reg &= ~PORT_PINCFG_SLEWLIM;
|
||||
}
|
||||
}
|
||||
|
||||
void system_pinmux_group_set_output_slew_rate(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const enum system_pinmux_pin_slew_rate mode);
|
||||
#endif
|
||||
|
||||
#ifdef FEATURE_SYSTEM_PINMUX_OPEN_DRAIN
|
||||
/**
|
||||
* \brief Port pin output drive mode enum.
|
||||
*
|
||||
* Enum for the possible output drive modes for the port pin configuration
|
||||
* structure, to indicate the output mode the pin should use.
|
||||
*/
|
||||
enum system_pinmux_pin_drive {
|
||||
/** Use totem pole output drive mode */
|
||||
SYSTEM_PINMUX_PIN_DRIVE_TOTEM,
|
||||
/** Use open drain output drive mode */
|
||||
SYSTEM_PINMUX_PIN_DRIVE_OPEN_DRAIN,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Configures the output driver mode for a GPIO pin.
|
||||
*
|
||||
* Configures the output driver mode for a GPIO output, to
|
||||
* control the pad behavior.
|
||||
*
|
||||
* \param[in] gpio_pin Index of the GPIO pin to configure
|
||||
* \param[in] mode New pad output driver mode to configure
|
||||
*/
|
||||
static inline void system_pinmux_pin_set_output_drive(
|
||||
const uint8_t gpio_pin,
|
||||
const enum system_pinmux_pin_drive mode)
|
||||
{
|
||||
PortGroup* const port = system_pinmux_get_group_from_gpio_pin(gpio_pin);
|
||||
uint32_t pin_index = (gpio_pin % 32);
|
||||
|
||||
if (mode == SYSTEM_PINMUX_PIN_DRIVE_OPEN_DRAIN) {
|
||||
port->PINCFG[pin_index].reg |= PORT_PINCFG_ODRAIN;
|
||||
}
|
||||
else {
|
||||
port->PINCFG[pin_index].reg &= ~PORT_PINCFG_ODRAIN;
|
||||
}
|
||||
}
|
||||
|
||||
void system_pinmux_group_set_output_drive(
|
||||
PortGroup *const port,
|
||||
const uint32_t mask,
|
||||
const enum system_pinmux_pin_drive mode);
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_system_pinmux_extra Extra Information for SYSTEM PINMUX Driver
|
||||
*
|
||||
* \section asfdoc_sam0_system_pinmux_extra_acronyms Acronyms
|
||||
* The table below presents the acronyms used in this module:
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Acronym</th>
|
||||
* <th>Description</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>GPIO</td>
|
||||
* <td>General Purpose Input/Output</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>MUX</td>
|
||||
* <td>Multiplexer</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_pinmux_extra_dependencies Dependencies
|
||||
* This driver has the following dependencies:
|
||||
*
|
||||
* - None
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_pinmux_extra_errata Errata
|
||||
* There are no errata related to this driver.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_pinmux_extra_history Module History
|
||||
* An overview of the module history is presented in the table below, with
|
||||
* details on the enhancements and fixes made to the module since its first
|
||||
* release. The current version of this corresponds to the newest version in
|
||||
* the table.
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Changelog</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Removed code of open drain, slew limit and drive strength
|
||||
* features</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Fixed broken sampling mode function implementations, which wrote
|
||||
* corrupt configuration values to the device registers</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Added missing NULL pointer asserts to the PORT driver functions</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Initial Release</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_system_pinmux_exqsg Examples for SYSTEM PINMUX Driver
|
||||
*
|
||||
* This is a list of the available Quick Start guides (QSGs) and example
|
||||
* applications for \ref asfdoc_sam0_system_pinmux_group. QSGs are simple
|
||||
* examples with step-by-step instructions to configure and use this driver in a
|
||||
* selection of use cases. Note that a QSG can be compiled as a standalone
|
||||
* application or be added to the user application.
|
||||
*
|
||||
* - \subpage asfdoc_sam0_system_pinmux_basic_use_case
|
||||
*
|
||||
* \page asfdoc_sam0_system_pinmux_document_revision_history Document Revision History
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Doc. Rev.</td>
|
||||
* <th>Date</td>
|
||||
* <th>Comments</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42121F</td>
|
||||
* <td>12/2015</td>
|
||||
* <td>Added support for SAM L21/L22, SAM DA1, SAM D09, and SAM C20/C21</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42121E</td>
|
||||
* <td>12/2014</td>
|
||||
* <td>Added support for SAM R21 and SAM D10/D11</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42121D</td>
|
||||
* <td>01/2014</td>
|
||||
* <td>Added support for SAM D21</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42121C</td>
|
||||
* <td>09/2013</td>
|
||||
* <td>Fixed incorrect documentation for the device pin sampling mode</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42121B</td>
|
||||
* <td>06/2013</td>
|
||||
* <td>Corrected documentation typos</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42121A</td>
|
||||
* <td>06/2013</td>
|
||||
* <td>Initial release</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*/
|
||||
|
||||
#endif
|
||||
|
|
@ -1,96 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM PINMUX Driver Quick Start
|
||||
*
|
||||
* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* \page asfdoc_sam0_system_pinmux_basic_use_case Quick Start Guide for SYSTEM PINMUX - Basic
|
||||
*
|
||||
* In this use case, the PINMUX module is configured for:
|
||||
* \li One pin in input mode, with pull-up enabled, connected to the GPIO
|
||||
* module
|
||||
* \li Sampling mode of the pin changed to sample on demand
|
||||
*
|
||||
* This use case sets up the PINMUX to configure a physical I/O pin set as
|
||||
* an input with pull-up and changes the sampling mode of the pin to reduce
|
||||
* power by only sampling the physical pin state when the user application
|
||||
* attempts to read it.
|
||||
*
|
||||
* \section asfdoc_sam0_system_pinmux_basic_use_case_setup Setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_pinmux_basic_use_case_setup_prereq Prerequisites
|
||||
* There are no special setup requirements for this use-case.
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_pinmux_basic_use_case_setup_code Code
|
||||
* Copy-paste the following setup code to your application:
|
||||
* \snippet qs_pinmux_basic.c setup
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_pinmux_basic_use_case_setup_flow Workflow
|
||||
* -# Create a PINMUX module pin configuration struct, which can be filled out
|
||||
* to adjust the configuration of a single port pin.
|
||||
* \snippet qs_pinmux_basic.c pinmux_config
|
||||
* -# Initialize the pin configuration struct with the module's default values.
|
||||
* \snippet qs_pinmux_basic.c pinmux_config_defaults
|
||||
* \note This should always be performed before using the configuration
|
||||
* struct to ensure that all values are initialized to known default
|
||||
* settings.
|
||||
*
|
||||
* -# Adjust the configuration struct to request an input pin with pull-up
|
||||
* connected to the GPIO peripheral.
|
||||
* \snippet qs_pinmux_basic.c pinmux_update_config_values
|
||||
* -# Configure GPIO10 with the initialized pin configuration struct, to enable
|
||||
* the input sampler on the pin.
|
||||
* \snippet qs_pinmux_basic.c pinmux_set_config
|
||||
*
|
||||
* \section asfdoc_sam0_system_pinmux_basic_use_case_use_main Use Case
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_pinmux_basic_use_case_code Code
|
||||
* Copy-paste the following code to your user application:
|
||||
* \snippet qs_pinmux_basic.c main
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_pinmux_basic_use_case_flow Workflow
|
||||
|
||||
* -# Adjust the configuration of the pin to enable on-demand sampling mode.
|
||||
* \snippet qs_pinmux_basic.c pinmux_change_input_sampling
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
|
@ -1,224 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Power related functionality
|
||||
*
|
||||
* Copyright (C) 2014-2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#ifndef POWER_H_INCLUDED
|
||||
#define POWER_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_system_group
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Voltage references within the device.
|
||||
*
|
||||
* List of available voltage references (VREF) that may be used within the
|
||||
* device.
|
||||
*/
|
||||
enum system_voltage_reference {
|
||||
/** Temperature sensor voltage reference */
|
||||
SYSTEM_VOLTAGE_REFERENCE_TEMPSENSE,
|
||||
/** Bandgap voltage reference */
|
||||
SYSTEM_VOLTAGE_REFERENCE_BANDGAP,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Device sleep modes.
|
||||
*
|
||||
* List of available sleep modes in the device. A table of clocks available in
|
||||
* different sleep modes can be found in \ref asfdoc_sam0_system_module_overview_sleep_mode.
|
||||
*/
|
||||
enum system_sleepmode {
|
||||
/** IDLE 0 sleep mode */
|
||||
SYSTEM_SLEEPMODE_IDLE_0,
|
||||
/** IDLE 1 sleep mode */
|
||||
SYSTEM_SLEEPMODE_IDLE_1,
|
||||
/** IDLE 2 sleep mode */
|
||||
SYSTEM_SLEEPMODE_IDLE_2,
|
||||
/** Standby sleep mode */
|
||||
SYSTEM_SLEEPMODE_STANDBY,
|
||||
};
|
||||
|
||||
|
||||
|
||||
/**
|
||||
* \name Voltage References
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Enable the selected voltage reference
|
||||
*
|
||||
* Enables the selected voltage reference source, making the voltage reference
|
||||
* available on a pin as well as an input source to the analog peripherals.
|
||||
*
|
||||
* \param[in] vref Voltage reference to enable
|
||||
*/
|
||||
static inline void system_voltage_reference_enable(
|
||||
const enum system_voltage_reference vref)
|
||||
{
|
||||
switch (vref) {
|
||||
case SYSTEM_VOLTAGE_REFERENCE_TEMPSENSE:
|
||||
SYSCTRL->VREF.reg |= SYSCTRL_VREF_TSEN;
|
||||
break;
|
||||
|
||||
case SYSTEM_VOLTAGE_REFERENCE_BANDGAP:
|
||||
SYSCTRL->VREF.reg |= SYSCTRL_VREF_BGOUTEN;
|
||||
break;
|
||||
|
||||
default:
|
||||
Assert(false);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disable the selected voltage reference
|
||||
*
|
||||
* Disables the selected voltage reference source.
|
||||
*
|
||||
* \param[in] vref Voltage reference to disable
|
||||
*/
|
||||
static inline void system_voltage_reference_disable(
|
||||
const enum system_voltage_reference vref)
|
||||
{
|
||||
switch (vref) {
|
||||
case SYSTEM_VOLTAGE_REFERENCE_TEMPSENSE:
|
||||
SYSCTRL->VREF.reg &= ~SYSCTRL_VREF_TSEN;
|
||||
break;
|
||||
|
||||
case SYSTEM_VOLTAGE_REFERENCE_BANDGAP:
|
||||
SYSCTRL->VREF.reg &= ~SYSCTRL_VREF_BGOUTEN;
|
||||
break;
|
||||
|
||||
default:
|
||||
Assert(false);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* \name Device Sleep Control
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Set the sleep mode of the device
|
||||
*
|
||||
* Sets the sleep mode of the device; the configured sleep mode will be entered
|
||||
* upon the next call of the \ref system_sleep() function.
|
||||
*
|
||||
* For an overview of which systems are disabled in sleep for the different
|
||||
* sleep modes, see \ref asfdoc_sam0_system_module_overview_sleep_mode.
|
||||
*
|
||||
* \param[in] sleep_mode Sleep mode to configure for the next sleep operation
|
||||
*
|
||||
* \retval STATUS_OK Operation completed successfully
|
||||
* \retval STATUS_ERR_INVALID_ARG The requested sleep mode was invalid or not
|
||||
* available
|
||||
*/
|
||||
static inline enum status_code system_set_sleepmode(
|
||||
const enum system_sleepmode sleep_mode)
|
||||
{
|
||||
#if (SAMD20)
|
||||
/* Errata 13140: Make sure that the Flash does not power all the way down
|
||||
* when in sleep mode. This errata has been fixed as of revision D of SAMD21 */
|
||||
NVMCTRL->CTRLB.bit.SLEEPPRM = NVMCTRL_CTRLB_SLEEPPRM_DISABLED_Val;
|
||||
#endif
|
||||
|
||||
switch (sleep_mode) {
|
||||
case SYSTEM_SLEEPMODE_IDLE_0:
|
||||
case SYSTEM_SLEEPMODE_IDLE_1:
|
||||
case SYSTEM_SLEEPMODE_IDLE_2:
|
||||
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
|
||||
PM->SLEEP.reg = sleep_mode;
|
||||
break;
|
||||
|
||||
case SYSTEM_SLEEPMODE_STANDBY:
|
||||
SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
|
||||
break;
|
||||
|
||||
default:
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Put the system to sleep waiting for interrupt
|
||||
*
|
||||
* Executes a device DSB (Data Synchronization Barrier) instruction to ensure
|
||||
* all ongoing memory accesses have completed, then a WFI (Wait For Interrupt)
|
||||
* instruction to place the device into the sleep mode specified by
|
||||
* \ref system_set_sleepmode until woken by an interrupt.
|
||||
*/
|
||||
static inline void system_sleep(void)
|
||||
{
|
||||
__DSB();
|
||||
__WFI();
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @} */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* POWER_H_INCLUDED */
|
||||
|
|
@ -1,119 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM Reset related functionality
|
||||
*
|
||||
* Copyright (C) 2014-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#ifndef RESET_H_INCLUDED
|
||||
#define RESET_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_system_group
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Reset causes of the system.
|
||||
*
|
||||
* List of possible reset causes of the system.
|
||||
*/
|
||||
enum system_reset_cause {
|
||||
/** The system was last reset by a software reset */
|
||||
SYSTEM_RESET_CAUSE_SOFTWARE = PM_RCAUSE_SYST,
|
||||
/** The system was last reset by the watchdog timer */
|
||||
SYSTEM_RESET_CAUSE_WDT = PM_RCAUSE_WDT,
|
||||
/** The system was last reset because the external reset line was pulled low */
|
||||
SYSTEM_RESET_CAUSE_EXTERNAL_RESET = PM_RCAUSE_EXT,
|
||||
/** The system was last reset by the BOD33 */
|
||||
SYSTEM_RESET_CAUSE_BOD33 = PM_RCAUSE_BOD33,
|
||||
/** The system was last reset by the BOD12 */
|
||||
SYSTEM_RESET_CAUSE_BOD12 = PM_RCAUSE_BOD12,
|
||||
/** The system was last reset by the POR (Power on reset) */
|
||||
SYSTEM_RESET_CAUSE_POR = PM_RCAUSE_POR,
|
||||
};
|
||||
|
||||
|
||||
/**
|
||||
* \name Reset Control
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Reset the MCU.
|
||||
*
|
||||
* Resets the MCU and all associated peripherals and registers, except RTC, all 32KHz sources,
|
||||
* WDT (if ALWAYSON is set) and GCLK (if WRTLOCK is set).
|
||||
*
|
||||
*/
|
||||
static inline void system_reset(void)
|
||||
{
|
||||
NVIC_SystemReset();
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Return the reset cause.
|
||||
*
|
||||
* Retrieves the cause of the last system reset.
|
||||
*
|
||||
* \return An enum value indicating the cause of the last system reset.
|
||||
*/
|
||||
static inline enum system_reset_cause system_get_reset_cause(void)
|
||||
{
|
||||
return (enum system_reset_cause)PM->RCAUSE.reg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @} */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* RESET_H_INCLUDED */
|
||||
|
|
@ -1,111 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM System related functionality
|
||||
*
|
||||
* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#include <system.h>
|
||||
|
||||
/**
|
||||
* \internal
|
||||
* Dummy initialization function, used as a weak alias target for the various
|
||||
* init functions called by \ref system_init().
|
||||
*/
|
||||
void _system_dummy_init(void);
|
||||
void _system_dummy_init(void)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
#if !defined(__DOXYGEN__)
|
||||
# if defined(__GNUC__)
|
||||
void system_clock_init(void) WEAK __attribute__((alias("_system_dummy_init")));
|
||||
void system_board_init(void) WEAK __attribute__((alias("_system_dummy_init")));
|
||||
void _system_events_init(void) WEAK __attribute__((alias("_system_dummy_init")));
|
||||
void _system_extint_init(void) WEAK __attribute__((alias("_system_dummy_init")));
|
||||
void _system_divas_init(void) WEAK __attribute__((alias("_system_dummy_init")));
|
||||
# elif defined(__ICCARM__)
|
||||
void system_clock_init(void);
|
||||
void system_board_init(void);
|
||||
void _system_events_init(void);
|
||||
void _system_extint_init(void);
|
||||
void _system_divas_init(void);
|
||||
# pragma weak system_clock_init=_system_dummy_init
|
||||
# pragma weak system_board_init=_system_dummy_init
|
||||
# pragma weak _system_events_init=_system_dummy_init
|
||||
# pragma weak _system_extint_init=_system_dummy_init
|
||||
# pragma weak _system_divas_init=_system_dummy_init
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief Initialize system
|
||||
*
|
||||
* This function will call the various initialization functions within the
|
||||
* system namespace. If a given optional system module is not available, the
|
||||
* associated call will effectively be a NOP (No Operation).
|
||||
*
|
||||
* Currently the following initialization functions are supported:
|
||||
* - System clock initialization (via the SYSTEM CLOCK sub-module)
|
||||
* - Board hardware initialization (via the Board module)
|
||||
* - Event system driver initialization (via the EVSYS module)
|
||||
* - External Interrupt driver initialization (via the EXTINT module)
|
||||
*/
|
||||
void system_init(void)
|
||||
{
|
||||
/* Configure GCLK and clock sources according to conf_clocks.h */
|
||||
system_clock_init();
|
||||
|
||||
/* Initialize board hardware */
|
||||
system_board_init();
|
||||
|
||||
/* Initialize EVSYS hardware */
|
||||
_system_events_init();
|
||||
|
||||
/* Initialize External hardware */
|
||||
_system_extint_init();
|
||||
|
||||
/* Initialize DIVAS hardware */
|
||||
_system_divas_init();
|
||||
}
|
||||
|
||||
|
|
@ -1,728 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM System related functionality
|
||||
*
|
||||
* Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#ifndef SYSTEM_H_INCLUDED
|
||||
#define SYSTEM_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
#include <clock.h>
|
||||
#include <gclk.h>
|
||||
#include <pinmux.h>
|
||||
#include <power.h>
|
||||
#include <reset.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \defgroup asfdoc_sam0_system_group SAM System (SYSTEM) Driver
|
||||
*
|
||||
* This driver for Atmel® | SMART ARM®-based microcontrollers provides an interface for the configuration
|
||||
* and management of the device's system relation functionality, necessary for
|
||||
* the basic device operation. This is not limited to a single peripheral, but
|
||||
* extends across multiple hardware peripherals.
|
||||
*
|
||||
* The following peripherals are used by this module:
|
||||
* \if DEVICE_SAML21_SYSTEM_SUPPORT
|
||||
* - PM (Power Manager)
|
||||
* - RSTC (Reset Controller)
|
||||
* - SUPC (Supply Controller)
|
||||
* \endif
|
||||
* \if DEVICE_SAMC21_SYSTEM_SUPPORT
|
||||
* - PM (Power Manager)
|
||||
* - RSTC (Reset Controller)
|
||||
* - SUPC (Supply Controller)
|
||||
* \endif
|
||||
* \if DEVICE_SAMD21_SYSTEM_SUPPORT
|
||||
* - SYSCTRL (System Control)
|
||||
* - PM (Power Manager)
|
||||
* \endif
|
||||
*
|
||||
* The following devices can use this module:
|
||||
* \if DEVICE_SAML21_SYSTEM_SUPPORT
|
||||
* - Atmel | SMART SAM L21
|
||||
* \endif
|
||||
* \if DEVICE_SAMC21_SYSTEM_SUPPORT
|
||||
* - Atmel | SMART SAM C20/C21
|
||||
* \endif
|
||||
* \if DEVICE_SAMD21_SYSTEM_SUPPORT
|
||||
* - Atmel | SMART SAM D20/D21
|
||||
* - Atmel | SMART SAM R21
|
||||
* - Atmel | SMART SAM D09/D10/D11
|
||||
* - Atmel | SMART SAM DA1
|
||||
* \endif
|
||||
*
|
||||
* The outline of this documentation is as follows:
|
||||
* - \ref asfdoc_sam0_system_prerequisites
|
||||
* - \ref asfdoc_sam0_system_module_overview
|
||||
* - \ref asfdoc_sam0_system_special_considerations
|
||||
* - \ref asfdoc_sam0_system_extra_info
|
||||
* - \ref asfdoc_sam0_system_examples
|
||||
* - \ref asfdoc_sam0_system_api_overview
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_prerequisites Prerequisites
|
||||
*
|
||||
* There are no prerequisites for this module.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_module_overview Module Overview
|
||||
*
|
||||
* The System driver provides a collection of interfaces between the user
|
||||
* application logic, and the core device functionality (such as clocks, reset
|
||||
* cause determination, etc.) that is required for all applications. It contains
|
||||
* a number of sub-modules that control one specific aspect of the device:
|
||||
*
|
||||
* - System Core (this module)
|
||||
* - \ref asfdoc_sam0_system_clock_group "System Clock Control" (sub-module)
|
||||
* - \ref asfdoc_sam0_system_interrupt_group "System Interrupt Control" (sub-module)
|
||||
* - \ref asfdoc_sam0_system_pinmux_group "System Pin Multiplexer Control" (sub-module)
|
||||
*
|
||||
*
|
||||
* \if DEVICE_SAML21_SYSTEM_SUPPORT
|
||||
* \subsection asfdoc_sam0_system_module_overview_vreg_l21 Voltage Regulator
|
||||
* The SAM device controls the voltage regulators for the core (VDDCORE) and
|
||||
* backup (VDDBU) domains. It sets the voltage regulators according to the sleep
|
||||
* modes, the performance level, or the user configuration.
|
||||
*
|
||||
* In active mode, the voltage regulator can be chosen on the fly between a LDO
|
||||
* or a Buck converter. In standby mode, the low power voltage regulator is used
|
||||
* to supply VDDCORE.
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_module_overview_bbps Battery Backup Power Switch
|
||||
* The SAM device supports connection of a battery backup to the VBAT power pin.
|
||||
* It includes functionality that enables automatic power switching between main
|
||||
* power and battery backup power. This will ensure power to the backup domain,
|
||||
* when the main battery or power source is unavailable.
|
||||
* \endif
|
||||
*
|
||||
* \if DEVICE_SAMC21_SYSTEM_SUPPORT
|
||||
* \subsection asfdoc_sam0_system_module_overview_vreg_c21 Voltage Regulator
|
||||
* The SAM device controls the voltage regulators for the core (VDDCORE). It sets
|
||||
* the voltage regulators according to the sleep modes.
|
||||
*
|
||||
* There are a selectable reference voltage and voltage dependent on the temperature
|
||||
* which can be used by analog modules like the ADC.
|
||||
* \endif
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_module_overview_vref Voltage References
|
||||
* The various analog modules within the SAM devices (such as AC, ADC, and
|
||||
* DAC) require a voltage reference to be configured to act as a reference point
|
||||
* for comparisons and conversions.
|
||||
*
|
||||
* The SAM devices contain multiple references, including an internal
|
||||
* temperature sensor and a fixed band-gap voltage source. When enabled, the
|
||||
* associated voltage reference can be selected within the desired peripheral
|
||||
* where applicable.
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_module_overview_reset_cause System Reset Cause
|
||||
* In some applications there may be a need to execute a different program
|
||||
* flow based on how the device was reset. For example, if the cause of reset
|
||||
* was the Watchdog timer (WDT), this might indicate an error in the application,
|
||||
* and a form of error handling or error logging might be needed.
|
||||
*
|
||||
* For this reason, an API is provided to retrieve the cause of the last system
|
||||
* reset, so that appropriate action can be taken.
|
||||
*
|
||||
* \if DEVICE_SAML21_SYSTEM_SUPPORT
|
||||
* There are three groups of reset sources:
|
||||
* - Power supply reset: Resets caused by an electrical issue. It covers POR and BOD reset.
|
||||
* - User reset: Resets caused by the application. It covers external reset,
|
||||
* system reset, and watchdog reset.
|
||||
* - Backup reset: Resets caused by a backup mode exit condition.
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_module_overview_performance_level Performance Level
|
||||
* Performance level allows the user to adjust the regulator output voltage to reduce
|
||||
* power consumption. The user can on the fly select the most suitable performance
|
||||
* level, depending on the application demands.
|
||||
*
|
||||
* The SAM device can operate at two different performance levels (PL0 and PL2).
|
||||
* When operating at PL0, the voltage applied on the full logic area is reduced
|
||||
* by voltage scaling. This voltage scaling technique allows to reduce the active
|
||||
* power consumption while decreasing the maximum frequency of the device. When
|
||||
* operating at PL2, the voltage regulator supplies the highest voltage, allowing
|
||||
* the device to run at higher clock speeds.
|
||||
*
|
||||
* Performance level transition is possible only when the device is in active
|
||||
* mode. After a reset, the device starts at the lowest performance level
|
||||
* (lowest power consumption and lowest max. frequency). The application can then
|
||||
* switch to another performance level at any time without any stop in the code
|
||||
* execution. As shown in \ref asfdoc_sam0_system_performance_level_transition_figure.
|
||||
*
|
||||
* \note When scaling down the performance level, the bus frequency should first be
|
||||
* scaled down in order to not exceed the maximum frequency allowed for the
|
||||
* low performance level.
|
||||
* When scaling up the performance level (e.g. from PL0 to PL2), check the performance
|
||||
* level status before increasing the bus frequency. It can be increased only
|
||||
* when the performance level transition is completed.
|
||||
*
|
||||
* \anchor asfdoc_sam0_system_performance_level_transition_figure
|
||||
* \image html performance_level_transition.svg "Performance Level Transition"
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_module_overview_power_domain Power Domain Gating
|
||||
* Power domain gating allows power saving by reducing the voltage in logic
|
||||
* areas in the device to a low-power supply. The feature is available in
|
||||
* Standby sleep mode and will reduce the voltage in domains where all peripherals
|
||||
* are idle. Internal logic will maintain its content, meaning the corresponding
|
||||
* peripherals will not need to be reconfigured when normal operating voltage
|
||||
* is returned. Most power domains can be in the following three states:
|
||||
*
|
||||
* - Active state: The power domain is powered on.
|
||||
* - Retention state: The main voltage supply for the power domain is switched off,
|
||||
* while maintaining a secondary low-power supply for the sequential cells. The
|
||||
* logic context is restored when waking up.
|
||||
* - Off state: The power domain is entirely powered off. The logic context is lost.
|
||||
*
|
||||
* The SAM L21 device contains three power domains which can be controlled using
|
||||
* power domain gating, namely PD0, PD1, and PD2. These power domains can be
|
||||
* configured to the following cases:
|
||||
* - Default with no sleepwalking peripherals: A power domain is automatically set
|
||||
* to retention state in standby sleep mode if no activity require it. The application
|
||||
* can force all power domains to remain in active state during standby sleep mode
|
||||
* in order to accelerate wakeup time.
|
||||
* - Default with sleepwalking peripherals: If one or more peripherals are enabled
|
||||
* to perform sleepwalking tasks in standby sleep mode, the corresponding power
|
||||
* domain (PDn) remains in active state as well as all inferior power domains (<PDn).
|
||||
* - Sleepwalking with dynamic power domain gating: During standby sleep mode, a
|
||||
* power domain (PDn) in active can wake up a superior power domain (>PDn) in order
|
||||
* to perform a sleepwalking task. The superior power domain is then automatically
|
||||
* set to active state. At the end of the sleepwalking task, the device can either
|
||||
* be woken up or the superior power domain can return to retention state.
|
||||
*
|
||||
* Power domains can be linked to each other, it allows a power domain (PDn) to be kept
|
||||
* in active state if the inferior power domain (PDn-1) is in active state too.
|
||||
*
|
||||
* \ref asfdoc_sam0_system_power_domain_overview_table illustrates the
|
||||
* four cases to consider in standby mode.
|
||||
*
|
||||
* \anchor asfdoc_sam0_system_power_domain_overview_table
|
||||
* <table>
|
||||
* <caption>Sleep Mode versus Power Domain State Overview</caption>
|
||||
* <tr>
|
||||
* <th>Sleep mode</th>
|
||||
* <th>PD0</th>
|
||||
* <th>PD1</th>
|
||||
* <th>PD2</th>
|
||||
* <th>PDTOP</th>
|
||||
* <th>PDBACKUP</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Idle</td>
|
||||
* <td>active</td>
|
||||
* <td>active</td>
|
||||
* <td>active</td>
|
||||
* <td>active</td>
|
||||
* <td>active</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Standby - Case 1</td>
|
||||
* <td>active</td>
|
||||
* <td>active</td>
|
||||
* <td>active</td>
|
||||
* <td>active</td>
|
||||
* <td>active</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Standby - Case 2</td>
|
||||
* <td>active</td>
|
||||
* <td>active</td>
|
||||
* <td>retention</td>
|
||||
* <td>active</td>
|
||||
* <td>active</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Standby - Case 3</td>
|
||||
* <td>active</td>
|
||||
* <td>retention</td>
|
||||
* <td>retention</td>
|
||||
* <td>active</td>
|
||||
* <td>active</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Standby - Case 4</td>
|
||||
* <td>retention</td>
|
||||
* <td>retention</td>
|
||||
* <td>retention</td>
|
||||
* <td>active</td>
|
||||
* <td>active</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Backup</td>
|
||||
* <td>off</td>
|
||||
* <td>off</td>
|
||||
* <td>off</td>
|
||||
* <td>off</td>
|
||||
* <td>active</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Off</td>
|
||||
* <td>off</td>
|
||||
* <td>off</td>
|
||||
* <td>off</td>
|
||||
* <td>off</td>
|
||||
* <td>off</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_module_overview_ram_state RAMs Low Power Mode
|
||||
* By default, in standby sleep mode, RAM is in low power mode (back biased)
|
||||
* if its power domain is in retention state.
|
||||
* \ref asfdoc_sam0_system_power_ram_state_table lists RAMs low power mode.
|
||||
*
|
||||
* \anchor asfdoc_sam0_system_power_ram_state_table
|
||||
* <table>
|
||||
* <caption>RAM Back-biasing Mode</caption>
|
||||
* <tr>
|
||||
* <th>RAM mode</th>
|
||||
* <th>Description</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Retention Back-biasing mode</td>
|
||||
* <td>RAM is back-biased if its power domain is in retention mode</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Standby Back-biasing mode</td>
|
||||
* <td>RAM is back-biased if the device is in standby mode</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Standby OFF mode</td>
|
||||
* <td>RAM is OFF if the device is in standby mode</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Always OFF mode</td>
|
||||
* <td>RAM is OFF if the device is in RET mode</td>
|
||||
* </tr>
|
||||
* </table>
|
||||
*
|
||||
* \endif
|
||||
*
|
||||
* \subsection asfdoc_sam0_system_module_overview_sleep_mode Sleep Modes
|
||||
* The SAM devices have several sleep modes. The sleep mode controls
|
||||
* which clock systems on the device will remain enabled or disabled when the
|
||||
* device enters a low power sleep mode.
|
||||
* \ref asfdoc_sam0_system_module_sleep_mode_table "The table below" lists the
|
||||
* clock settings of the different sleep modes.
|
||||
*
|
||||
* \anchor asfdoc_sam0_system_module_sleep_mode_table
|
||||
* <table>
|
||||
* <caption>SAM Device Sleep Modes</caption>
|
||||
* \if DEVICE_SAML21_SYSTEM_SUPPORT
|
||||
* <tr>
|
||||
* <th>Sleep mode</th>
|
||||
* <th>System clock</th>
|
||||
* <th>CPU clock</th>
|
||||
* <th>AHB/AHB clock</th>
|
||||
* <th>GCLK clocks</th>
|
||||
* <th>Oscillators (ONDEMAND = 0)</th>
|
||||
* <th>Oscillators (ONDEMAND = 1)</th>
|
||||
* <th>Regulator mode</th>
|
||||
* <th>RAM mode</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Idle</td>
|
||||
* <td>Run</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Run if requested</td>
|
||||
* <td>Run</td>
|
||||
* <td>Run</td>
|
||||
* <td>Run if requested</td>
|
||||
* <td>Normal</td>
|
||||
* <td>Normal</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Standby</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Run if requested</td>
|
||||
* <td>Run if requested</td>
|
||||
* <td>Run if requested or RUNSTDBY = 1</td>
|
||||
* <td>Run if requested</td>
|
||||
* <td>Low pwer</td>
|
||||
* <td>Low pwer</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Backup</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Backup</td>
|
||||
* <td>Off</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Off</td>
|
||||
* <td>Off</td>
|
||||
* <td>Off</td>
|
||||
* <td>Off</td>
|
||||
* <td>Off</td>
|
||||
* <td>Off</td>
|
||||
* <td>Off</td>
|
||||
* <td>Off</td>
|
||||
* <td>Off</td>
|
||||
* </tr>
|
||||
* \else
|
||||
* <tr>
|
||||
* <th>Sleep mode</th>
|
||||
* <th>CPU clock</th>
|
||||
* <th>AHB clock</th>
|
||||
* <th>APB clocks</th>
|
||||
* <th>Clock sources</th>
|
||||
* <th>System clock</th>
|
||||
* <th>32KHz</th>
|
||||
* <th>Reg mode</th>
|
||||
* <th>RAM mode</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Idle 0</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Run</td>
|
||||
* <td>Run</td>
|
||||
* <td>Run</td>
|
||||
* <td>Run</td>
|
||||
* <td>Run</td>
|
||||
* <td>Normal</td>
|
||||
* <td>Normal</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Idle 1</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Run</td>
|
||||
* <td>Run</td>
|
||||
* <td>Run</td>
|
||||
* <td>Run</td>
|
||||
* <td>Normal</td>
|
||||
* <td>Normal</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Idle 2</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Run</td>
|
||||
* <td>Run</td>
|
||||
* <td>Run</td>
|
||||
* <td>Normal</td>
|
||||
* <td>Normal</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Standby</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Stop</td>
|
||||
* <td>Low Power</td>
|
||||
* <td>Source/Drain biasing</td>
|
||||
* </tr>
|
||||
* \endif
|
||||
* </table>
|
||||
*
|
||||
* Before entering device sleep, one of the available sleep modes must be set.
|
||||
* The device will automatically wake up in response to an interrupt being
|
||||
* generated or upon any other sleep mode exit condition.
|
||||
*
|
||||
* Some peripheral clocks will remain enabled during sleep, depending on their
|
||||
* configuration. If desired, the modules can remain clocked during sleep to allow
|
||||
* them continue to operate while other parts of the system are powered down
|
||||
* to save power.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_special_considerations Special Considerations
|
||||
*
|
||||
* Most of the functions in this driver have device specific restrictions and
|
||||
* caveats; refer to your device datasheet.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_extra_info Extra Information
|
||||
*
|
||||
* For extra information, see \ref asfdoc_sam0_system_extra. This includes:
|
||||
* - \ref asfdoc_sam0_system_extra_acronyms
|
||||
* - \ref asfdoc_sam0_system_extra_dependencies
|
||||
* - \ref asfdoc_sam0_system_extra_errata
|
||||
* - \ref asfdoc_sam0_system_extra_history
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_examples Examples
|
||||
*
|
||||
* For SYSTEM module related examples, refer to the sub-modules listed in
|
||||
* the \ref asfdoc_sam0_system_module_overview "Module Overview".
|
||||
*
|
||||
* \if DEVICE_SAML21_SYSTEM_SUPPORT
|
||||
* For a list of examples related to this driver, see
|
||||
* \ref asfdoc_sam0_drivers_power_exqsg.
|
||||
* \endif
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_api_overview API Overview
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \name System Debugger
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Check if debugger is present.
|
||||
*
|
||||
* Check if debugger is connected to the onboard debug system (DAP).
|
||||
*
|
||||
* \return A bool identifying if a debugger is present.
|
||||
*
|
||||
* \retval true Debugger is connected to the system
|
||||
* \retval false Debugger is not connected to the system
|
||||
*
|
||||
*/
|
||||
static inline bool system_is_debugger_present(void)
|
||||
{
|
||||
return DSU->STATUSB.reg & DSU_STATUSB_DBGPRES;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* \name System Identification
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Retrieve the device identification signature.
|
||||
*
|
||||
* Retrieves the signature of the current device.
|
||||
*
|
||||
* \return Device ID signature as a 32-bit integer.
|
||||
*/
|
||||
static inline uint32_t system_get_device_id(void)
|
||||
{
|
||||
return DSU->DID.reg;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* \name System Initialization
|
||||
* @{
|
||||
*/
|
||||
|
||||
void system_init(void);
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
*
|
||||
* \if DEVICE_SAML21_SYSTEM_SUPPORT
|
||||
* \page asfdoc_sam0_drivers_power_exqsg Examples for SYSTEM Driver
|
||||
*
|
||||
* This is a list of the available Quick Start Guides (QSGs) and example
|
||||
* applications for \ref asfdoc_sam0_system_group. QSGs are simple examples with step-by-step instructions to
|
||||
* configure and use this driver in a selection of
|
||||
* use cases. Note that a QSG can be compiled as a standalone application or be
|
||||
* added to the user application.
|
||||
*
|
||||
* - \subpage asfdoc_sam0_power_basic_use_case
|
||||
* \endif
|
||||
*
|
||||
* \page asfdoc_sam0_system_extra Extra Information for SYSTEM Driver
|
||||
*
|
||||
* \section asfdoc_sam0_system_extra_acronyms Acronyms
|
||||
* Below is a table listing the acronyms used in this module, along with their
|
||||
* intended meanings.
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Acronym</th>
|
||||
* <th>Definition</th>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>PM</td>
|
||||
* <td>Power Manager</td>
|
||||
* </tr>
|
||||
* \if DEVICE_SAML21_SYSTEM_SUPPORT
|
||||
* <tr>
|
||||
* <td>SUPC</td>
|
||||
* <td>Supply Controller</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>RSTC</td>
|
||||
* <td>Reset Controller</td>
|
||||
* </tr>
|
||||
* \endif
|
||||
* \if DEVICE_SAMC21_SYSTEM_SUPPORT
|
||||
* <tr>
|
||||
* <td>SUPC</td>
|
||||
* <td>Supply Controller</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>RSTC</td>
|
||||
* <td>Reset Controller</td>
|
||||
* </tr>
|
||||
* \endif
|
||||
* \if DEVICE_SAMD21_SYSTEM_SUPPORT
|
||||
* <tr>
|
||||
* <td>SYSCTRL</td>
|
||||
* <td>System control interface</td>
|
||||
* </tr>
|
||||
* \endif
|
||||
* </table>
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_extra_dependencies Dependencies
|
||||
* This driver has the following dependencies:
|
||||
*
|
||||
* - None
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_extra_errata Errata
|
||||
* There are no errata related to this driver.
|
||||
*
|
||||
*
|
||||
* \section asfdoc_sam0_system_extra_history Module History
|
||||
* An overview of the module history is presented in the table below, with
|
||||
* details on the enhancements and fixes made to the module since its first
|
||||
* release. The current version of this corresponds to the newest version in
|
||||
* the table.
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Changelog</th>
|
||||
* </tr>
|
||||
* \if DEVICE_SAML21_SYSTEM_SUPPORT
|
||||
* <tr>
|
||||
* <td>Initial Release</td>
|
||||
* </tr>
|
||||
* \endif
|
||||
* \if DEVICE_SAMC21_SYSTEM_SUPPORT
|
||||
* <tr>
|
||||
* <td>Initial Release</td>
|
||||
* </tr>
|
||||
* \endif
|
||||
* \if DEVICE_SAMD21_SYSTEM_SUPPORT
|
||||
* <tr>
|
||||
* <td>Added new \c system_reset() to reset the complete MCU with some exceptions</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Added new \c system_get_device_id() function to retrieved the device
|
||||
* ID</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>Initial Release</td>
|
||||
* </tr>
|
||||
* \endif
|
||||
* </table>
|
||||
*
|
||||
* \page asfdoc_sam0_system_document_revision_history Document Revision History
|
||||
*
|
||||
* <table>
|
||||
* <tr>
|
||||
* <th>Doc. Rev.</th>
|
||||
* <th>Date</th>
|
||||
* <th>Comments</th>
|
||||
* </tr>
|
||||
* \if DEVICE_SAML21_SYSTEM_SUPPORT
|
||||
* <tr>
|
||||
* <td>42449A</td>
|
||||
* <td>07/2015</td>
|
||||
* <td>Initial document release</td>
|
||||
* </tr>
|
||||
* \endif
|
||||
* \if DEVICE_SAMC21_SYSTEM_SUPPORT
|
||||
* <tr>
|
||||
* <td>42484A</td>
|
||||
* <td>12/2015</td>
|
||||
* <td>Initial document release.</td>
|
||||
* </tr>
|
||||
* \endif
|
||||
* \if DEVICE_SAMD21_SYSTEM_SUPPORT
|
||||
* <tr>
|
||||
* <td>42120E</td>
|
||||
* <td>12/2015</td>
|
||||
* <td>Added support for SAM DA1 and SAM D09</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42120D</td>
|
||||
* <td>12/2014</td>
|
||||
* <td>Added support for SAM R21 and SAM D10/D11</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42120C</td>
|
||||
* <td>01/2014</td>
|
||||
* <td>Added support for SAM D21</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42120B</td>
|
||||
* <td>06/2013</td>
|
||||
* <td>Corrected documentation typos</td>
|
||||
* </tr>
|
||||
* <tr>
|
||||
* <td>42120A</td>
|
||||
* <td>06/2013</td>
|
||||
* <td>Initial document release</td>
|
||||
* </tr>
|
||||
* \endif
|
||||
* </table>
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* SYSTEM_H_INCLUDED */
|
||||
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -1,178 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM USB Dual Role driver file.
|
||||
*
|
||||
* Copyright (C) 2014-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#include <compiler.h>
|
||||
#include "usb_dual.h"
|
||||
|
||||
#ifndef UDD_ENABLE
|
||||
# define udc_start()
|
||||
# define udc_stop()
|
||||
#else
|
||||
#include <udc.h>
|
||||
#endif
|
||||
|
||||
#ifndef UHD_ENABLE
|
||||
# define uhc_start(void)
|
||||
# define uhc_stop(b_id_stop)
|
||||
#else
|
||||
#include <uhc.h>
|
||||
#endif
|
||||
|
||||
/* State of USB dual role initialization */
|
||||
static bool _initialized = false;
|
||||
|
||||
#define _usb_is_id_device() port_pin_get_input_level(USB_ID_PIN)
|
||||
|
||||
#if USB_ID_EIC
|
||||
static void usb_id_handler(void);
|
||||
|
||||
/**
|
||||
* \name USB ID PAD management
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* USB ID pin configuration
|
||||
*/
|
||||
static void usb_id_config(void)
|
||||
{
|
||||
struct extint_chan_conf eint_chan_conf;
|
||||
extint_chan_get_config_defaults(&eint_chan_conf);
|
||||
|
||||
eint_chan_conf.gpio_pin = USB_ID_PIN;
|
||||
eint_chan_conf.gpio_pin_mux = USB_ID_EIC_MUX;
|
||||
eint_chan_conf.detection_criteria = EXTINT_DETECT_BOTH;
|
||||
eint_chan_conf.filter_input_signal = true;
|
||||
|
||||
extint_chan_disable_callback(USB_ID_EIC_LINE,
|
||||
EXTINT_CALLBACK_TYPE_DETECT);
|
||||
extint_chan_set_config(USB_ID_EIC_LINE, &eint_chan_conf);
|
||||
extint_register_callback(usb_id_handler,
|
||||
USB_ID_EIC_LINE,
|
||||
EXTINT_CALLBACK_TYPE_DETECT);
|
||||
extint_chan_enable_callback(USB_ID_EIC_LINE,
|
||||
EXTINT_CALLBACK_TYPE_DETECT);
|
||||
}
|
||||
|
||||
/**
|
||||
* USB ID pin change handler
|
||||
*/
|
||||
static void usb_id_handler(void)
|
||||
{
|
||||
extint_chan_disable_callback(USB_ID_EIC_LINE,
|
||||
EXTINT_CALLBACK_TYPE_DETECT);
|
||||
if (_usb_is_id_device()) {
|
||||
uhc_stop(false);
|
||||
UHC_MODE_CHANGE(false);
|
||||
udc_start();
|
||||
} else {
|
||||
udc_stop();
|
||||
UHC_MODE_CHANGE(true);
|
||||
uhc_start();
|
||||
}
|
||||
extint_chan_enable_callback(USB_ID_EIC_LINE,
|
||||
EXTINT_CALLBACK_TYPE_DETECT);
|
||||
}
|
||||
#endif
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \brief Initialize the USB peripheral and set right role according to ID pin
|
||||
*
|
||||
* \return \c true if the ID pin management has been started, otherwise \c false.
|
||||
*/
|
||||
bool usb_dual_enable(void)
|
||||
{
|
||||
if (_initialized) {
|
||||
return false; // Dual role already initialized
|
||||
}
|
||||
|
||||
#if USB_ID_EIC
|
||||
_initialized = true;
|
||||
|
||||
struct port_config pin_conf;
|
||||
port_get_config_defaults(&pin_conf);
|
||||
|
||||
/* Set USB ID Pin as inputs */
|
||||
pin_conf.direction = PORT_PIN_DIR_INPUT;
|
||||
pin_conf.input_pull = PORT_PIN_PULL_UP;
|
||||
port_pin_set_config(USB_ID_PIN, &pin_conf);
|
||||
|
||||
usb_id_config();
|
||||
if (_usb_is_id_device()) {
|
||||
UHC_MODE_CHANGE(false);
|
||||
udc_start();
|
||||
} else {
|
||||
UHC_MODE_CHANGE(true);
|
||||
uhc_start();
|
||||
}
|
||||
|
||||
/**
|
||||
* End of host or device startup,
|
||||
* the current mode selected is already started now
|
||||
*/
|
||||
return true; // ID pin management has been enabled
|
||||
#else
|
||||
return false; // ID pin management has not been enabled
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Deinitialize the dual role driver
|
||||
*/
|
||||
void usb_dual_disable(void)
|
||||
{
|
||||
if (!_initialized) {
|
||||
return; // Dual role not initialized
|
||||
}
|
||||
_initialized = false;
|
||||
|
||||
#if USB_ID_EIC
|
||||
extint_chan_disable_callback(USB_ID_EIC_LINE,
|
||||
EXTINT_CALLBACK_TYPE_DETECT);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
@ -1,111 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM USB Dual Role driver header file.
|
||||
*
|
||||
* Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef _USB_DUAL_H_
|
||||
#define _USB_DUAL_H_
|
||||
|
||||
#include "compiler.h"
|
||||
#include "preprocessor.h"
|
||||
|
||||
/* Get USB pads pins configuration in board configuration */
|
||||
#include "conf_board.h"
|
||||
#include "board.h"
|
||||
#include "extint.h"
|
||||
#include "port.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \ingroup usb_group
|
||||
* \defgroup usb_dual_group USB dual role driver
|
||||
* USB low-level driver for dual role features
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
bool usb_dual_enable(void);
|
||||
void usb_dual_disable(void);
|
||||
|
||||
/**
|
||||
* @name USB ID pin management
|
||||
*
|
||||
* The ID pin come from the USB connector (A and B receptable) and
|
||||
* allows to select the USB mode between host or device.
|
||||
* The ID pin can be managed through EIC pin.
|
||||
* This feature is optional, and it is enabled if USB_ID_PIN
|
||||
* is defined in board.h and CONF_BOARD_USB_ID_DETECT defined in
|
||||
* conf_board.h.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
#define USB_ID_DETECT (defined(CONF_BOARD_USB_ID_DETECT))
|
||||
#define USB_ID_EIC (defined(USB_ID_PIN) && USB_ID_DETECT)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name USB Vbus management
|
||||
*
|
||||
* The VBus line can be monitored through a EIC pin and
|
||||
* a basic resistor voltage divider.
|
||||
* This feature is optional, and it is enabled if USB_VBUS_PIN
|
||||
* is defined in board.h and CONF_BOARD_USB_VBUS_DETECT defined in
|
||||
* conf_board.h.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
#define USB_VBUS_DETECT (defined(CONF_BOARD_USB_VBUS_DETECT))
|
||||
#define USB_VBUS_EIC (defined(USB_VBUS_PIN) && USB_VBUS_DETECT)
|
||||
/** @} */
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // _USB_DUAL_H_
|
||||
|
|
@ -1,833 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM USB Driver
|
||||
*
|
||||
* Copyright (C) 2014-2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
#ifndef USB_H_INCLUDED
|
||||
#define USB_H_INCLUDED
|
||||
|
||||
#include <compiler.h>
|
||||
#include <clock.h>
|
||||
#include <gclk.h>
|
||||
#include <pinmux.h>
|
||||
#include <system_interrupt.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \defgroup asfdoc_sam0_usb_group SAM Universal Serial Bus (USB)
|
||||
*
|
||||
* The Universal Serial Bus (USB) module complies with the USB 2.1 specification.
|
||||
*
|
||||
* The following peripherals are used by this module:
|
||||
* - USB (Universal Serial Bus)
|
||||
*
|
||||
* The following devices can use this module:
|
||||
* - Atmel | SMART SAM D21
|
||||
* - Atmel | SMART SAM R21
|
||||
* - Atmel | SMART SAM D11 (Only USB device support on SAM D11 device)
|
||||
* - Atmel | SMART SAM L21
|
||||
* - Atmel | SMART SAM L22 (Only USB device support on SAM L22 device)
|
||||
* - Atmel | SMART SAM DA1
|
||||
*
|
||||
* The USB module covers following mode:
|
||||
* \if USB_DEVICE_MODE
|
||||
* - USB Device Mode
|
||||
* \endif
|
||||
* \if USB_HOST_MODE
|
||||
* - USB Host Mode
|
||||
* \endif
|
||||
*
|
||||
* The USB module covers following speed:
|
||||
* \if USB_HS_MODE
|
||||
* - USB High Speed (480Mbit/s)
|
||||
* \endif
|
||||
* - USB Full Speed (12Mbit/s)
|
||||
* \if USB_LS_MODE
|
||||
* - USB Low Speed (1.5Mbit/s)
|
||||
* \endif
|
||||
*
|
||||
* \if USB_LPM_MODE
|
||||
* The USB module supports Link Power Management (LPM-L1) protocol.
|
||||
* \endif
|
||||
*
|
||||
* USB support needs whole set of enumeration process, to make the device
|
||||
* recognizable and usable. The USB driver is designed to interface to the
|
||||
* USB Stack in Atmel Software Framework (ASF).
|
||||
*
|
||||
* \if USB_DEVICE_MODE
|
||||
* \section asfdoc_sam0_usb_device USB Device Mode
|
||||
* The ASF USB Device Stack has defined the USB Device Driver (UDD) interface,
|
||||
* to support USB device operations. The USB module device driver complies with
|
||||
* this interface, so that the USB Device Stack can work based on the
|
||||
* USB module.
|
||||
*
|
||||
* Refer to <a href="http://www.atmel.com/images/doc8360.pdf">
|
||||
* "ASF - USB Device Stack"</a> for more details.
|
||||
* \endif
|
||||
*
|
||||
* \if USB_HOST_MODE
|
||||
* \section adfdoc_sam0_usb_host USB Host Mode
|
||||
* The ASF USB Host Stack has defined the USB Host Driver (UHD) interface,
|
||||
* to support USB host operations. The USB module host driver complies with
|
||||
* this interface, so that the USB Host Stack can work based on the USB module.
|
||||
*
|
||||
* Refer to <a href="http://www.atmel.com/images/doc8486.pdf">
|
||||
* "ASF - USB Host Stack"</a> for more details.
|
||||
* \endif
|
||||
*/
|
||||
|
||||
/** Enum for the speed status for the USB module */
|
||||
enum usb_speed {
|
||||
USB_SPEED_LOW,
|
||||
USB_SPEED_FULL,
|
||||
};
|
||||
|
||||
/** Enum for the possible callback types for the USB in host module */
|
||||
enum usb_host_callback {
|
||||
USB_HOST_CALLBACK_SOF,
|
||||
USB_HOST_CALLBACK_RESET,
|
||||
USB_HOST_CALLBACK_WAKEUP,
|
||||
USB_HOST_CALLBACK_DNRSM,
|
||||
USB_HOST_CALLBACK_UPRSM,
|
||||
USB_HOST_CALLBACK_RAMACER,
|
||||
USB_HOST_CALLBACK_CONNECT,
|
||||
USB_HOST_CALLBACK_DISCONNECT,
|
||||
USB_HOST_CALLBACK_N,
|
||||
};
|
||||
|
||||
/** Enum for the possible callback types for the USB pipe in host module */
|
||||
enum usb_host_pipe_callback {
|
||||
USB_HOST_PIPE_CALLBACK_TRANSFER_COMPLETE,
|
||||
USB_HOST_PIPE_CALLBACK_ERROR,
|
||||
USB_HOST_PIPE_CALLBACK_SETUP,
|
||||
USB_HOST_PIPE_CALLBACK_STALL,
|
||||
USB_HOST_PIPE_CALLBACK_N,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Host pipe types.
|
||||
*/
|
||||
enum usb_host_pipe_type {
|
||||
USB_HOST_PIPE_TYPE_DISABLE,
|
||||
USB_HOST_PIPE_TYPE_CONTROL,
|
||||
USB_HOST_PIPE_TYPE_ISO,
|
||||
USB_HOST_PIPE_TYPE_BULK,
|
||||
USB_HOST_PIPE_TYPE_INTERRUPT,
|
||||
USB_HOST_PIPE_TYPE_EXTENDED,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Host pipe token types.
|
||||
*/
|
||||
enum usb_host_pipe_token {
|
||||
USB_HOST_PIPE_TOKEN_SETUP,
|
||||
USB_HOST_PIPE_TOKEN_IN,
|
||||
USB_HOST_PIPE_TOKEN_OUT,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Enumeration for the possible callback types for the USB in device module
|
||||
*/
|
||||
enum usb_device_callback {
|
||||
USB_DEVICE_CALLBACK_SOF,
|
||||
USB_DEVICE_CALLBACK_RESET,
|
||||
USB_DEVICE_CALLBACK_WAKEUP,
|
||||
USB_DEVICE_CALLBACK_RAMACER,
|
||||
USB_DEVICE_CALLBACK_SUSPEND,
|
||||
USB_DEVICE_CALLBACK_LPMNYET,
|
||||
USB_DEVICE_CALLBACK_LPMSUSP,
|
||||
USB_DEVICE_CALLBACK_N,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Enumeration for the possible callback types for the USB endpoint in device module
|
||||
*/
|
||||
enum usb_device_endpoint_callback {
|
||||
USB_DEVICE_ENDPOINT_CALLBACK_TRCPT,
|
||||
USB_DEVICE_ENDPOINT_CALLBACK_TRFAIL,
|
||||
USB_DEVICE_ENDPOINT_CALLBACK_RXSTP,
|
||||
USB_DEVICE_ENDPOINT_CALLBACK_STALL,
|
||||
USB_DEVICE_EP_CALLBACK_N,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Device Endpoint types.
|
||||
*/
|
||||
enum usb_device_endpoint_type {
|
||||
USB_DEVICE_ENDPOINT_TYPE_DISABLE,
|
||||
USB_DEVICE_ENDPOINT_TYPE_CONTROL,
|
||||
USB_DEVICE_ENDPOINT_TYPE_ISOCHRONOUS,
|
||||
USB_DEVICE_ENDPOINT_TYPE_BULK,
|
||||
USB_DEVICE_ENDPOINT_TYPE_INTERRUPT,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Endpoint Size
|
||||
*/
|
||||
enum usb_endpoint_size {
|
||||
USB_ENDPOINT_8_BYTE,
|
||||
USB_ENDPOINT_16_BYTE,
|
||||
USB_ENDPOINT_32_BYTE,
|
||||
USB_ENDPOINT_64_BYTE,
|
||||
USB_ENDPOINT_128_BYTE,
|
||||
USB_ENDPOINT_256_BYTE,
|
||||
USB_ENDPOINT_512_BYTE,
|
||||
USB_ENDPOINT_1023_BYTE,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Link Power Management Handshake.
|
||||
*/
|
||||
enum usb_device_lpm_mode {
|
||||
USB_DEVICE_LPM_NOT_SUPPORT,
|
||||
USB_DEVICE_LPM_ACK,
|
||||
USB_DEVICE_LPM_NYET,
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Module structure
|
||||
*/
|
||||
struct usb_module;
|
||||
|
||||
/**
|
||||
* \name Host Callback Functions Types
|
||||
* @{
|
||||
*/
|
||||
typedef void (*usb_host_callback_t)(struct usb_module *module_inst);
|
||||
typedef void (*usb_host_pipe_callback_t)(struct usb_module *module_inst, void *);
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \name Device Callback Functions Types
|
||||
* @{
|
||||
*/
|
||||
typedef void (*usb_device_callback_t)(struct usb_module *module_inst, void* pointer);
|
||||
typedef void (*usb_device_endpoint_callback_t)(struct usb_module *module_inst, void* pointer);
|
||||
/** @} */
|
||||
|
||||
|
||||
/** USB configurations */
|
||||
struct usb_config {
|
||||
/** \c true for host, \c false for device. */
|
||||
bool select_host_mode;
|
||||
/** When \c true the module is enabled during standby. */
|
||||
bool run_in_standby;
|
||||
/** Generic Clock Generator source channel. */
|
||||
enum gclk_generator source_generator;
|
||||
/** Speed mode */
|
||||
enum usb_speed speed_mode;
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief USB software module instance structure.
|
||||
*
|
||||
* USB software module instance structure, used to retain software state
|
||||
* information of an associated hardware module instance.
|
||||
*
|
||||
*/
|
||||
struct usb_module {
|
||||
/** Hardware module pointer of the associated USB peripheral. */
|
||||
Usb *hw;
|
||||
|
||||
#if !SAMD11 && !SAML22
|
||||
/** Array to store host related callback functions */
|
||||
usb_host_callback_t host_callback[USB_HOST_CALLBACK_N];
|
||||
usb_host_pipe_callback_t host_pipe_callback[USB_PIPE_NUM][USB_HOST_PIPE_CALLBACK_N];
|
||||
/** Bit mask for host callbacks registered */
|
||||
uint8_t host_registered_callback_mask;
|
||||
/** Bit mask for host callbacks enabled */
|
||||
uint8_t host_enabled_callback_mask;
|
||||
/** Bit mask for host pipe callbacks registered */
|
||||
uint8_t host_pipe_registered_callback_mask[USB_PIPE_NUM];
|
||||
/** Bit mask for host pipe callbacks enabled */
|
||||
uint8_t host_pipe_enabled_callback_mask[USB_PIPE_NUM];
|
||||
#endif
|
||||
|
||||
/** Array to store device related callback functions */
|
||||
usb_device_callback_t device_callback[USB_DEVICE_CALLBACK_N];
|
||||
usb_device_endpoint_callback_t device_endpoint_callback[USB_EPT_NUM][USB_DEVICE_EP_CALLBACK_N];
|
||||
/** Bit mask for device callbacks registered */
|
||||
uint16_t device_registered_callback_mask;
|
||||
/** Bit mask for device callbacks enabled */
|
||||
uint16_t device_enabled_callback_mask;
|
||||
/** Bit mask for device endpoint callbacks registered */
|
||||
uint8_t device_endpoint_registered_callback_mask[USB_EPT_NUM];
|
||||
/** Bit mask for device endpoint callbacks enabled */
|
||||
uint8_t device_endpoint_enabled_callback_mask[USB_EPT_NUM];
|
||||
};
|
||||
|
||||
/** USB host pipe configurations */
|
||||
struct usb_host_pipe_config {
|
||||
/** device address */
|
||||
uint8_t device_address;
|
||||
/** endpoint address */
|
||||
uint8_t endpoint_address;
|
||||
/** Pipe type */
|
||||
enum usb_host_pipe_type pipe_type;
|
||||
/** interval */
|
||||
uint8_t binterval;
|
||||
/** pipe size */
|
||||
uint16_t size;
|
||||
};
|
||||
|
||||
/** USB device endpoint configurations */
|
||||
struct usb_device_endpoint_config {
|
||||
/** device address */
|
||||
uint8_t ep_address;
|
||||
/** endpoint size */
|
||||
enum usb_endpoint_size ep_size;
|
||||
/** automatic zero length packet mode, \c true to enable */
|
||||
bool auto_zlp;
|
||||
/** type of endpoint with Bank */
|
||||
enum usb_device_endpoint_type ep_type;
|
||||
};
|
||||
|
||||
/** USB host pipe callback status parameter structure */
|
||||
struct usb_pipe_callback_parameter {
|
||||
/** current pipe number */
|
||||
uint8_t pipe_num;
|
||||
/** pipe error status */
|
||||
uint8_t pipe_error_status;
|
||||
/** actual transferred data size */
|
||||
uint16_t transfered_size;
|
||||
/** required data size */
|
||||
uint16_t required_size;
|
||||
};
|
||||
|
||||
/** USB device endpoint callback status parameter structure */
|
||||
struct usb_endpoint_callback_parameter {
|
||||
uint16_t received_bytes;
|
||||
uint16_t sent_bytes;
|
||||
uint16_t out_buffer_size;
|
||||
uint8_t endpoint_address;
|
||||
};
|
||||
|
||||
void usb_enable(struct usb_module *module_inst);
|
||||
void usb_disable(struct usb_module *module_inst);
|
||||
|
||||
/**
|
||||
* \brief Get the status of USB module's state machine
|
||||
*
|
||||
* \param module_inst Pointer to USB module instance
|
||||
*/
|
||||
static inline uint8_t usb_get_state_machine_status(struct usb_module *module_inst)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
|
||||
return module_inst->hw->DEVICE.FSMSTATUS.reg;
|
||||
}
|
||||
|
||||
void usb_get_config_defaults(struct usb_config *module_config);
|
||||
enum status_code usb_init(struct usb_module *module_inst, Usb *const hw,
|
||||
struct usb_config *module_config);
|
||||
|
||||
#if !SAMD11 && !SAML22
|
||||
/**
|
||||
* \brief Enable the USB host by setting the VBUS OK
|
||||
*
|
||||
* \param module_inst Pointer to USB software instance struct
|
||||
*/
|
||||
static inline void usb_host_enable(struct usb_module *module_inst)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
|
||||
module_inst->hw->HOST.CTRLB.bit.VBUSOK = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Send the USB reset
|
||||
*
|
||||
* \param module_inst Pointer to USB software instance struct
|
||||
*/
|
||||
static inline void usb_host_send_reset(struct usb_module *module_inst)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
|
||||
module_inst->hw->HOST.CTRLB.bit.BUSRESET = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enable the USB SOF generation
|
||||
*
|
||||
* \param module_inst Pointer to USB software instance struct
|
||||
*/
|
||||
static inline void usb_host_enable_sof(struct usb_module *module_inst)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
|
||||
module_inst->hw->HOST.CTRLB.bit.SOFE = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disable the USB SOF generation
|
||||
*
|
||||
* \param module_inst Pointer to USB software instance struct
|
||||
*/
|
||||
static inline void usb_host_disable_sof(struct usb_module *module_inst)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
|
||||
module_inst->hw->HOST.CTRLB.bit.SOFE = 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Check the USB SOF generation status
|
||||
*
|
||||
* \param module_inst Pointer to USB software instance struct
|
||||
*
|
||||
* \return USB SOF generation status, \c true if SOF generation is ON.
|
||||
*/
|
||||
static inline bool usb_host_is_sof_enabled(struct usb_module *module_inst)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
|
||||
return module_inst->hw->HOST.CTRLB.bit.SOFE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Send the USB host resume
|
||||
*
|
||||
* \param module_inst Pointer to USB software instance struct
|
||||
*/
|
||||
static inline void usb_host_send_resume(struct usb_module *module_inst)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
|
||||
module_inst->hw->HOST.CTRLB.bit.RESUME= 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Send the USB host LPM resume
|
||||
*
|
||||
* \param module_inst Pointer to USB software instance struct
|
||||
*/
|
||||
static inline void usb_host_send_l1_resume(struct usb_module *module_inst)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
|
||||
module_inst->hw->HOST.CTRLB.bit.L1RESUME = 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Get the speed mode of USB host
|
||||
*
|
||||
* \param module_inst Pointer to USB module instance struct
|
||||
*
|
||||
* \return USB speed mode (\ref usb_speed).
|
||||
*/
|
||||
static inline enum usb_speed usb_host_get_speed(struct usb_module *module_inst)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
|
||||
if (module_inst->hw->HOST.STATUS.bit.SPEED == 0) {
|
||||
return USB_SPEED_FULL;
|
||||
} else {
|
||||
return USB_SPEED_LOW;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Get the frame number
|
||||
*
|
||||
* \param module_inst Pointer to USB software instance struct
|
||||
*
|
||||
* \return frame number value.
|
||||
*/
|
||||
static inline uint16_t usb_host_get_frame_number(struct usb_module *module_inst)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
|
||||
return (uint16_t)(module_inst->hw->HOST.FNUM.bit.FNUM);
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief Attach USB device to the bus
|
||||
*
|
||||
* \param module_inst Pointer to USB device module instance
|
||||
*/
|
||||
static inline void usb_device_attach(struct usb_module *module_inst)
|
||||
{
|
||||
module_inst->hw->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_DETACH;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Detach USB device from the bus
|
||||
*
|
||||
* \param module_inst Pointer to USB device module instance
|
||||
*/
|
||||
static inline void usb_device_detach(struct usb_module *module_inst)
|
||||
{
|
||||
module_inst->hw->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_DETACH;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Get the speed mode of USB device
|
||||
*
|
||||
* \param module_inst Pointer to USB device module instance
|
||||
* \return USB Speed mode (\ref usb_speed).
|
||||
*/
|
||||
static inline enum usb_speed usb_device_get_speed(struct usb_module *module_inst)
|
||||
{
|
||||
if (!(module_inst->hw->DEVICE.STATUS.reg & USB_DEVICE_STATUS_SPEED_Msk)) {
|
||||
return USB_SPEED_FULL;
|
||||
} else {
|
||||
return USB_SPEED_LOW;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Get the address of USB device
|
||||
*
|
||||
* \param module_inst Pointer to USB device module instance
|
||||
* \return USB device address value.
|
||||
*/
|
||||
static inline uint8_t usb_device_get_address(struct usb_module *module_inst)
|
||||
{
|
||||
return ((uint8_t)(module_inst->hw->DEVICE.DADD.bit.DADD));
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set the speed mode of USB device
|
||||
*
|
||||
* \param module_inst Pointer to USB device module instance
|
||||
* \param address USB device address value
|
||||
*/
|
||||
static inline void usb_device_set_address(struct usb_module *module_inst, uint8_t address)
|
||||
{
|
||||
module_inst->hw->DEVICE.DADD.reg = USB_DEVICE_DADD_ADDEN | address;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Get the frame number of USB device
|
||||
*
|
||||
* \param module_inst Pointer to USB device module instance
|
||||
* \return USB device frame number value.
|
||||
*/
|
||||
static inline uint16_t usb_device_get_frame_number(struct usb_module *module_inst)
|
||||
{
|
||||
return ((uint16_t)(module_inst->hw->DEVICE.FNUM.bit.FNUM));
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Get the micro-frame number of USB device
|
||||
*
|
||||
* \param module_inst Pointer to USB device module instance
|
||||
* \return USB device micro-frame number value.
|
||||
*/
|
||||
static inline uint16_t usb_device_get_micro_frame_number(struct usb_module *module_inst)
|
||||
{
|
||||
return ((uint16_t)(module_inst->hw->DEVICE.FNUM.reg));
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief USB device send the resume wakeup
|
||||
*
|
||||
* \param module_inst Pointer to USB device module instance
|
||||
*/
|
||||
static inline void usb_device_send_remote_wake_up(struct usb_module *module_inst)
|
||||
{
|
||||
module_inst->hw->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_UPRSM;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief USB device set the LPM mode
|
||||
*
|
||||
* \param module_inst Pointer to USB device module instance
|
||||
* \param lpm_mode LPM mode
|
||||
*/
|
||||
static inline void usb_device_set_lpm_mode(struct usb_module *module_inst,
|
||||
enum usb_device_lpm_mode lpm_mode)
|
||||
{
|
||||
module_inst->hw->DEVICE.CTRLB.bit.LPMHDSK = lpm_mode;
|
||||
}
|
||||
|
||||
/**
|
||||
* \name USB Host Callback Management
|
||||
* @{
|
||||
*/
|
||||
enum status_code usb_host_register_callback(struct usb_module *module_inst,
|
||||
enum usb_host_callback callback_type,
|
||||
usb_host_callback_t callback_func);
|
||||
enum status_code usb_host_unregister_callback(struct usb_module *module_inst,
|
||||
enum usb_host_callback callback_type);
|
||||
enum status_code usb_host_enable_callback(struct usb_module *module_inst,
|
||||
enum usb_host_callback callback_type);
|
||||
enum status_code usb_host_disable_callback(struct usb_module *module_inst,
|
||||
enum usb_host_callback callback_type);
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \name USB Device Callback Management
|
||||
* @{
|
||||
*/
|
||||
enum status_code usb_device_register_callback(struct usb_module *module_inst,
|
||||
enum usb_device_callback callback_type,
|
||||
usb_device_callback_t callback_func);
|
||||
enum status_code usb_device_unregister_callback(struct usb_module *module_inst,
|
||||
enum usb_device_callback callback_type);
|
||||
enum status_code usb_device_enable_callback(struct usb_module *module_inst,
|
||||
enum usb_device_callback callback_type);
|
||||
enum status_code usb_device_disable_callback(struct usb_module *module_inst,
|
||||
enum usb_device_callback callback_type);
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \name USB Host Pipe Configuration
|
||||
* @{
|
||||
*/
|
||||
void usb_host_pipe_get_config_defaults(struct usb_host_pipe_config *ep_config);
|
||||
enum status_code usb_host_pipe_set_config(struct usb_module *module_inst, uint8_t pipe_num,
|
||||
struct usb_host_pipe_config *ep_config);
|
||||
enum status_code usb_host_pipe_get_config(struct usb_module *module_inst, uint8_t pipe_num,
|
||||
struct usb_host_pipe_config *ep_config);
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \name USB Device Endpoint Configuration
|
||||
* @{
|
||||
*/
|
||||
void usb_device_endpoint_get_config_defaults(struct usb_device_endpoint_config *ep_config);
|
||||
enum status_code usb_device_endpoint_set_config(struct usb_module *module_inst,
|
||||
struct usb_device_endpoint_config *ep_config);
|
||||
bool usb_device_endpoint_is_configured(struct usb_module *module_inst, uint8_t ep);
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \name USB Host Pipe Callback Management
|
||||
* @{
|
||||
*/
|
||||
enum status_code usb_host_pipe_register_callback(
|
||||
struct usb_module *module_inst, uint8_t pipe_num,
|
||||
enum usb_host_pipe_callback callback_type,
|
||||
usb_host_pipe_callback_t callback_func);
|
||||
enum status_code usb_host_pipe_unregister_callback(
|
||||
struct usb_module *module_inst, uint8_t pipe_num,
|
||||
enum usb_host_pipe_callback callback_type);
|
||||
enum status_code usb_host_pipe_enable_callback(
|
||||
struct usb_module *module_inst, uint8_t pipe_num,
|
||||
enum usb_host_pipe_callback callback_type);
|
||||
enum status_code usb_host_pipe_disable_callback(
|
||||
struct usb_module *module_inst, uint8_t pipe_num,
|
||||
enum usb_host_pipe_callback callback_type);
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \name USB Device Endpoint Callback Management
|
||||
* @{
|
||||
*/
|
||||
enum status_code usb_device_endpoint_register_callback(
|
||||
struct usb_module *module_inst, uint8_t ep_num,
|
||||
enum usb_device_endpoint_callback callback_type,
|
||||
usb_device_endpoint_callback_t callback_func);
|
||||
enum status_code usb_device_endpoint_unregister_callback(
|
||||
struct usb_module *module_inst, uint8_t ep_num,
|
||||
enum usb_device_endpoint_callback callback_type);
|
||||
enum status_code usb_device_endpoint_enable_callback(
|
||||
struct usb_module *module_inst, uint8_t ep,
|
||||
enum usb_device_endpoint_callback callback_type);
|
||||
enum status_code usb_device_endpoint_disable_callback(
|
||||
struct usb_module *module_inst, uint8_t ep,
|
||||
enum usb_device_endpoint_callback callback_type);
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \name USB Host Pipe Job Management
|
||||
* @{
|
||||
*/
|
||||
enum status_code usb_host_pipe_setup_job(struct usb_module *module_inst,
|
||||
uint8_t pipe_num, uint8_t *buf);
|
||||
enum status_code usb_host_pipe_read_job(struct usb_module *module_inst,
|
||||
uint8_t pipe_num, uint8_t *buf, uint32_t buf_size);
|
||||
enum status_code usb_host_pipe_write_job(struct usb_module *module_inst,
|
||||
uint8_t pipe_num, uint8_t *buf, uint32_t buf_size);
|
||||
enum status_code usb_host_pipe_abort_job(struct usb_module *module_inst, uint8_t pipe_num);
|
||||
enum status_code usb_host_pipe_lpm_job(struct usb_module *module_inst,
|
||||
uint8_t pipe_num, bool b_remotewakeup, uint8_t hird);
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \name USB Device Endpoint Job Management
|
||||
* @{
|
||||
*/
|
||||
enum status_code usb_device_endpoint_write_buffer_job(struct usb_module *module_inst,uint8_t ep_num,
|
||||
uint8_t* pbuf, uint32_t buf_size);
|
||||
enum status_code usb_device_endpoint_read_buffer_job(struct usb_module *module_inst,uint8_t ep_num,
|
||||
uint8_t* pbuf, uint32_t buf_size);
|
||||
enum status_code usb_device_endpoint_setup_buffer_job(struct usb_module *module_inst,
|
||||
uint8_t* pbuf);
|
||||
void usb_device_endpoint_abort_job(struct usb_module *module_inst, uint8_t ep);
|
||||
/** @} */
|
||||
|
||||
#if !SAMD11 && !SAML22
|
||||
/**
|
||||
* \name USB Host Pipe Operations
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Freeze a pipe
|
||||
*
|
||||
* \param module_inst Pointer to USB module instance
|
||||
* \param pipe_num Pipe number
|
||||
*/
|
||||
static inline void usb_host_pipe_freeze(struct usb_module *module_inst, uint8_t pipe_num)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
|
||||
module_inst->hw->HOST.HostPipe[pipe_num].PSTATUSSET.reg = USB_HOST_PSTATUSSET_PFREEZE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Unfreeze a pipe
|
||||
*
|
||||
* \param module_inst Pointer to USB module instance
|
||||
* \param pipe_num Pipe number
|
||||
*/
|
||||
static inline void usb_host_pipe_unfreeze(struct usb_module *module_inst, uint8_t pipe_num)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
|
||||
module_inst->hw->HOST.HostPipe[pipe_num].PSTATUSCLR.reg = USB_HOST_PSTATUSCLR_PFREEZE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Check if the pipe is frozen
|
||||
*
|
||||
* \param module_inst Pointer to USB module instance
|
||||
* \param pipe_num Pipe number
|
||||
*/
|
||||
static inline bool usb_host_pipe_is_frozen(struct usb_module *module_inst, uint8_t pipe_num)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
|
||||
return (module_inst->hw->HOST.HostPipe[pipe_num].PSTATUS.bit.PFREEZE == 1);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set the data toggle bit of pipe
|
||||
*
|
||||
* \param module_inst Pointer to USB module instance
|
||||
* \param pipe_num Pipe number
|
||||
*/
|
||||
static inline void usb_host_pipe_set_toggle(struct usb_module *module_inst, uint8_t pipe_num)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
|
||||
module_inst->hw->HOST.HostPipe[pipe_num].PSTATUSSET.reg = USB_HOST_PSTATUSSET_DTGL;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Clear the data toggle bit of pipe
|
||||
*
|
||||
* \param module_inst Pointer to USB module instance
|
||||
* \param pipe_num Pipe number
|
||||
*/
|
||||
static inline void usb_host_pipe_clear_toggle(struct usb_module *module_inst, uint8_t pipe_num)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
|
||||
module_inst->hw->HOST.HostPipe[pipe_num].PSTATUSCLR.reg = USB_HOST_PSTATUSCLR_DTGL;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set the auto zero length packet of pipe
|
||||
*
|
||||
* \param module_inst Pointer to USB module instance
|
||||
* \param pipe_num Pipe number
|
||||
* \param value \c true to enable auto ZLP and \c false to disable
|
||||
*/
|
||||
void usb_host_pipe_set_auto_zlp(struct usb_module *module_inst, uint8_t pipe_num, bool value);
|
||||
|
||||
/** @} */
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \name USB Device Endpoint Operations
|
||||
* @{
|
||||
*/
|
||||
|
||||
bool usb_device_endpoint_is_halted(struct usb_module *module_inst, uint8_t ep);
|
||||
void usb_device_endpoint_set_halt(struct usb_module *module_inst, uint8_t ep);
|
||||
void usb_device_endpoint_clear_halt(struct usb_module *module_inst, uint8_t ep);
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* USB_H_INCLUDED */
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -1,87 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Instance description for AC
|
||||
*
|
||||
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_AC_INSTANCE_
|
||||
#define _SAMD21_AC_INSTANCE_
|
||||
|
||||
/* ========== Register definition for AC peripheral ========== */
|
||||
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
#define REG_AC_CTRLA (0x42004400U) /**< \brief (AC) Control A */
|
||||
#define REG_AC_CTRLB (0x42004401U) /**< \brief (AC) Control B */
|
||||
#define REG_AC_EVCTRL (0x42004402U) /**< \brief (AC) Event Control */
|
||||
#define REG_AC_INTENCLR (0x42004404U) /**< \brief (AC) Interrupt Enable Clear */
|
||||
#define REG_AC_INTENSET (0x42004405U) /**< \brief (AC) Interrupt Enable Set */
|
||||
#define REG_AC_INTFLAG (0x42004406U) /**< \brief (AC) Interrupt Flag Status and Clear */
|
||||
#define REG_AC_STATUSA (0x42004408U) /**< \brief (AC) Status A */
|
||||
#define REG_AC_STATUSB (0x42004409U) /**< \brief (AC) Status B */
|
||||
#define REG_AC_STATUSC (0x4200440AU) /**< \brief (AC) Status C */
|
||||
#define REG_AC_WINCTRL (0x4200440CU) /**< \brief (AC) Window Control */
|
||||
#define REG_AC_COMPCTRL0 (0x42004410U) /**< \brief (AC) Comparator Control 0 */
|
||||
#define REG_AC_COMPCTRL1 (0x42004414U) /**< \brief (AC) Comparator Control 1 */
|
||||
#define REG_AC_SCALER0 (0x42004420U) /**< \brief (AC) Scaler 0 */
|
||||
#define REG_AC_SCALER1 (0x42004421U) /**< \brief (AC) Scaler 1 */
|
||||
#else
|
||||
#define REG_AC_CTRLA (*(RwReg8 *)0x42004400U) /**< \brief (AC) Control A */
|
||||
#define REG_AC_CTRLB (*(WoReg8 *)0x42004401U) /**< \brief (AC) Control B */
|
||||
#define REG_AC_EVCTRL (*(RwReg16*)0x42004402U) /**< \brief (AC) Event Control */
|
||||
#define REG_AC_INTENCLR (*(RwReg8 *)0x42004404U) /**< \brief (AC) Interrupt Enable Clear */
|
||||
#define REG_AC_INTENSET (*(RwReg8 *)0x42004405U) /**< \brief (AC) Interrupt Enable Set */
|
||||
#define REG_AC_INTFLAG (*(RwReg8 *)0x42004406U) /**< \brief (AC) Interrupt Flag Status and Clear */
|
||||
#define REG_AC_STATUSA (*(RoReg8 *)0x42004408U) /**< \brief (AC) Status A */
|
||||
#define REG_AC_STATUSB (*(RoReg8 *)0x42004409U) /**< \brief (AC) Status B */
|
||||
#define REG_AC_STATUSC (*(RoReg8 *)0x4200440AU) /**< \brief (AC) Status C */
|
||||
#define REG_AC_WINCTRL (*(RwReg8 *)0x4200440CU) /**< \brief (AC) Window Control */
|
||||
#define REG_AC_COMPCTRL0 (*(RwReg *)0x42004410U) /**< \brief (AC) Comparator Control 0 */
|
||||
#define REG_AC_COMPCTRL1 (*(RwReg *)0x42004414U) /**< \brief (AC) Comparator Control 1 */
|
||||
#define REG_AC_SCALER0 (*(RwReg8 *)0x42004420U) /**< \brief (AC) Scaler 0 */
|
||||
#define REG_AC_SCALER1 (*(RwReg8 *)0x42004421U) /**< \brief (AC) Scaler 1 */
|
||||
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/* ========== Instance parameters for AC peripheral ========== */
|
||||
#define AC_CMP_NUM 2 // Number of comparators
|
||||
#define AC_GCLK_ID_ANA 32 // Index of Generic Clock for analog
|
||||
#define AC_GCLK_ID_DIG 31 // Index of Generic Clock for digital
|
||||
#define AC_NUM_CMP 2
|
||||
#define AC_PAIRS 1 // Number of pairs of comparators
|
||||
|
||||
#endif /* _SAMD21_AC_INSTANCE_ */
|
||||
|
|
@ -1,87 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Instance description for AC1
|
||||
*
|
||||
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_AC1_INSTANCE_
|
||||
#define _SAMD21_AC1_INSTANCE_
|
||||
|
||||
/* ========== Register definition for AC1 peripheral ========== */
|
||||
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
#define REG_AC1_CTRLA (0x42005400U) /**< \brief (AC1) Control A */
|
||||
#define REG_AC1_CTRLB (0x42005401U) /**< \brief (AC1) Control B */
|
||||
#define REG_AC1_EVCTRL (0x42005402U) /**< \brief (AC1) Event Control */
|
||||
#define REG_AC1_INTENCLR (0x42005404U) /**< \brief (AC1) Interrupt Enable Clear */
|
||||
#define REG_AC1_INTENSET (0x42005405U) /**< \brief (AC1) Interrupt Enable Set */
|
||||
#define REG_AC1_INTFLAG (0x42005406U) /**< \brief (AC1) Interrupt Flag Status and Clear */
|
||||
#define REG_AC1_STATUSA (0x42005408U) /**< \brief (AC1) Status A */
|
||||
#define REG_AC1_STATUSB (0x42005409U) /**< \brief (AC1) Status B */
|
||||
#define REG_AC1_STATUSC (0x4200540AU) /**< \brief (AC1) Status C */
|
||||
#define REG_AC1_WINCTRL (0x4200540CU) /**< \brief (AC1) Window Control */
|
||||
#define REG_AC1_COMPCTRL0 (0x42005410U) /**< \brief (AC1) Comparator Control 0 */
|
||||
#define REG_AC1_COMPCTRL1 (0x42005414U) /**< \brief (AC1) Comparator Control 1 */
|
||||
#define REG_AC1_SCALER0 (0x42005420U) /**< \brief (AC1) Scaler 0 */
|
||||
#define REG_AC1_SCALER1 (0x42005421U) /**< \brief (AC1) Scaler 1 */
|
||||
#else
|
||||
#define REG_AC1_CTRLA (*(RwReg8 *)0x42005400U) /**< \brief (AC1) Control A */
|
||||
#define REG_AC1_CTRLB (*(WoReg8 *)0x42005401U) /**< \brief (AC1) Control B */
|
||||
#define REG_AC1_EVCTRL (*(RwReg16*)0x42005402U) /**< \brief (AC1) Event Control */
|
||||
#define REG_AC1_INTENCLR (*(RwReg8 *)0x42005404U) /**< \brief (AC1) Interrupt Enable Clear */
|
||||
#define REG_AC1_INTENSET (*(RwReg8 *)0x42005405U) /**< \brief (AC1) Interrupt Enable Set */
|
||||
#define REG_AC1_INTFLAG (*(RwReg8 *)0x42005406U) /**< \brief (AC1) Interrupt Flag Status and Clear */
|
||||
#define REG_AC1_STATUSA (*(RoReg8 *)0x42005408U) /**< \brief (AC1) Status A */
|
||||
#define REG_AC1_STATUSB (*(RoReg8 *)0x42005409U) /**< \brief (AC1) Status B */
|
||||
#define REG_AC1_STATUSC (*(RoReg8 *)0x4200540AU) /**< \brief (AC1) Status C */
|
||||
#define REG_AC1_WINCTRL (*(RwReg8 *)0x4200540CU) /**< \brief (AC1) Window Control */
|
||||
#define REG_AC1_COMPCTRL0 (*(RwReg *)0x42005410U) /**< \brief (AC1) Comparator Control 0 */
|
||||
#define REG_AC1_COMPCTRL1 (*(RwReg *)0x42005414U) /**< \brief (AC1) Comparator Control 1 */
|
||||
#define REG_AC1_SCALER0 (*(RwReg8 *)0x42005420U) /**< \brief (AC1) Scaler 0 */
|
||||
#define REG_AC1_SCALER1 (*(RwReg8 *)0x42005421U) /**< \brief (AC1) Scaler 1 */
|
||||
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/* ========== Instance parameters for AC1 peripheral ========== */
|
||||
#define AC1_CMP_NUM 2 // Number of comparators
|
||||
#define AC1_GCLK_ID_ANA 32 // Index of Generic Clock for analog
|
||||
#define AC1_GCLK_ID_DIG 31 // Index of Generic Clock for digital
|
||||
#define AC1_NUM_CMP 2
|
||||
#define AC1_PAIRS 1 // Number of pairs of comparators
|
||||
|
||||
#endif /* _SAMD21_AC1_INSTANCE_ */
|
||||
|
|
@ -1,99 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Instance description for ADC
|
||||
*
|
||||
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_ADC_INSTANCE_
|
||||
#define _SAMD21_ADC_INSTANCE_
|
||||
|
||||
/* ========== Register definition for ADC peripheral ========== */
|
||||
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
#define REG_ADC_CTRLA (0x42004000U) /**< \brief (ADC) Control A */
|
||||
#define REG_ADC_REFCTRL (0x42004001U) /**< \brief (ADC) Reference Control */
|
||||
#define REG_ADC_AVGCTRL (0x42004002U) /**< \brief (ADC) Average Control */
|
||||
#define REG_ADC_SAMPCTRL (0x42004003U) /**< \brief (ADC) Sampling Time Control */
|
||||
#define REG_ADC_CTRLB (0x42004004U) /**< \brief (ADC) Control B */
|
||||
#define REG_ADC_WINCTRL (0x42004008U) /**< \brief (ADC) Window Monitor Control */
|
||||
#define REG_ADC_SWTRIG (0x4200400CU) /**< \brief (ADC) Software Trigger */
|
||||
#define REG_ADC_INPUTCTRL (0x42004010U) /**< \brief (ADC) Input Control */
|
||||
#define REG_ADC_EVCTRL (0x42004014U) /**< \brief (ADC) Event Control */
|
||||
#define REG_ADC_INTENCLR (0x42004016U) /**< \brief (ADC) Interrupt Enable Clear */
|
||||
#define REG_ADC_INTENSET (0x42004017U) /**< \brief (ADC) Interrupt Enable Set */
|
||||
#define REG_ADC_INTFLAG (0x42004018U) /**< \brief (ADC) Interrupt Flag Status and Clear */
|
||||
#define REG_ADC_STATUS (0x42004019U) /**< \brief (ADC) Status */
|
||||
#define REG_ADC_RESULT (0x4200401AU) /**< \brief (ADC) Result */
|
||||
#define REG_ADC_WINLT (0x4200401CU) /**< \brief (ADC) Window Monitor Lower Threshold */
|
||||
#define REG_ADC_WINUT (0x42004020U) /**< \brief (ADC) Window Monitor Upper Threshold */
|
||||
#define REG_ADC_GAINCORR (0x42004024U) /**< \brief (ADC) Gain Correction */
|
||||
#define REG_ADC_OFFSETCORR (0x42004026U) /**< \brief (ADC) Offset Correction */
|
||||
#define REG_ADC_CALIB (0x42004028U) /**< \brief (ADC) Calibration */
|
||||
#define REG_ADC_DBGCTRL (0x4200402AU) /**< \brief (ADC) Debug Control */
|
||||
#else
|
||||
#define REG_ADC_CTRLA (*(RwReg8 *)0x42004000U) /**< \brief (ADC) Control A */
|
||||
#define REG_ADC_REFCTRL (*(RwReg8 *)0x42004001U) /**< \brief (ADC) Reference Control */
|
||||
#define REG_ADC_AVGCTRL (*(RwReg8 *)0x42004002U) /**< \brief (ADC) Average Control */
|
||||
#define REG_ADC_SAMPCTRL (*(RwReg8 *)0x42004003U) /**< \brief (ADC) Sampling Time Control */
|
||||
#define REG_ADC_CTRLB (*(RwReg16*)0x42004004U) /**< \brief (ADC) Control B */
|
||||
#define REG_ADC_WINCTRL (*(RwReg8 *)0x42004008U) /**< \brief (ADC) Window Monitor Control */
|
||||
#define REG_ADC_SWTRIG (*(RwReg8 *)0x4200400CU) /**< \brief (ADC) Software Trigger */
|
||||
#define REG_ADC_INPUTCTRL (*(RwReg *)0x42004010U) /**< \brief (ADC) Input Control */
|
||||
#define REG_ADC_EVCTRL (*(RwReg8 *)0x42004014U) /**< \brief (ADC) Event Control */
|
||||
#define REG_ADC_INTENCLR (*(RwReg8 *)0x42004016U) /**< \brief (ADC) Interrupt Enable Clear */
|
||||
#define REG_ADC_INTENSET (*(RwReg8 *)0x42004017U) /**< \brief (ADC) Interrupt Enable Set */
|
||||
#define REG_ADC_INTFLAG (*(RwReg8 *)0x42004018U) /**< \brief (ADC) Interrupt Flag Status and Clear */
|
||||
#define REG_ADC_STATUS (*(RoReg8 *)0x42004019U) /**< \brief (ADC) Status */
|
||||
#define REG_ADC_RESULT (*(RoReg16*)0x4200401AU) /**< \brief (ADC) Result */
|
||||
#define REG_ADC_WINLT (*(RwReg16*)0x4200401CU) /**< \brief (ADC) Window Monitor Lower Threshold */
|
||||
#define REG_ADC_WINUT (*(RwReg16*)0x42004020U) /**< \brief (ADC) Window Monitor Upper Threshold */
|
||||
#define REG_ADC_GAINCORR (*(RwReg16*)0x42004024U) /**< \brief (ADC) Gain Correction */
|
||||
#define REG_ADC_OFFSETCORR (*(RwReg16*)0x42004026U) /**< \brief (ADC) Offset Correction */
|
||||
#define REG_ADC_CALIB (*(RwReg16*)0x42004028U) /**< \brief (ADC) Calibration */
|
||||
#define REG_ADC_DBGCTRL (*(RwReg8 *)0x4200402AU) /**< \brief (ADC) Debug Control */
|
||||
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/* ========== Instance parameters for ADC peripheral ========== */
|
||||
#define ADC_DMAC_ID_RESRDY 39 // Index of DMA RESRDY trigger
|
||||
#define ADC_EXTCHANNEL_MSB 19 // Number of external channels
|
||||
#define ADC_GCLK_ID 30 // Index of Generic Clock
|
||||
#define ADC_RESULT_BITS 16 // Size of RESULT.RESULT bitfield
|
||||
#define ADC_RESULT_MSB 15 // Size of Result
|
||||
|
||||
#endif /* _SAMD21_ADC_INSTANCE_ */
|
||||
|
|
@ -1,74 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Instance description for DAC
|
||||
*
|
||||
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_DAC_INSTANCE_
|
||||
#define _SAMD21_DAC_INSTANCE_
|
||||
|
||||
/* ========== Register definition for DAC peripheral ========== */
|
||||
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
#define REG_DAC_CTRLA (0x42004800U) /**< \brief (DAC) Control A */
|
||||
#define REG_DAC_CTRLB (0x42004801U) /**< \brief (DAC) Control B */
|
||||
#define REG_DAC_EVCTRL (0x42004802U) /**< \brief (DAC) Event Control */
|
||||
#define REG_DAC_INTENCLR (0x42004804U) /**< \brief (DAC) Interrupt Enable Clear */
|
||||
#define REG_DAC_INTENSET (0x42004805U) /**< \brief (DAC) Interrupt Enable Set */
|
||||
#define REG_DAC_INTFLAG (0x42004806U) /**< \brief (DAC) Interrupt Flag Status and Clear */
|
||||
#define REG_DAC_STATUS (0x42004807U) /**< \brief (DAC) Status */
|
||||
#define REG_DAC_DATA (0x42004808U) /**< \brief (DAC) Data */
|
||||
#define REG_DAC_DATABUF (0x4200480CU) /**< \brief (DAC) Data Buffer */
|
||||
#else
|
||||
#define REG_DAC_CTRLA (*(RwReg8 *)0x42004800U) /**< \brief (DAC) Control A */
|
||||
#define REG_DAC_CTRLB (*(RwReg8 *)0x42004801U) /**< \brief (DAC) Control B */
|
||||
#define REG_DAC_EVCTRL (*(RwReg8 *)0x42004802U) /**< \brief (DAC) Event Control */
|
||||
#define REG_DAC_INTENCLR (*(RwReg8 *)0x42004804U) /**< \brief (DAC) Interrupt Enable Clear */
|
||||
#define REG_DAC_INTENSET (*(RwReg8 *)0x42004805U) /**< \brief (DAC) Interrupt Enable Set */
|
||||
#define REG_DAC_INTFLAG (*(RwReg8 *)0x42004806U) /**< \brief (DAC) Interrupt Flag Status and Clear */
|
||||
#define REG_DAC_STATUS (*(RoReg8 *)0x42004807U) /**< \brief (DAC) Status */
|
||||
#define REG_DAC_DATA (*(RwReg16*)0x42004808U) /**< \brief (DAC) Data */
|
||||
#define REG_DAC_DATABUF (*(RwReg16*)0x4200480CU) /**< \brief (DAC) Data Buffer */
|
||||
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/* ========== Instance parameters for DAC peripheral ========== */
|
||||
#define DAC_DMAC_ID_EMPTY 40 // Index of DMAC EMPTY trigger
|
||||
#define DAC_GCLK_ID 33 // Index of Generic Clock
|
||||
|
||||
#endif /* _SAMD21_DAC_INSTANCE_ */
|
||||
|
|
@ -1,109 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Instance description for DMAC
|
||||
*
|
||||
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_DMAC_INSTANCE_
|
||||
#define _SAMD21_DMAC_INSTANCE_
|
||||
|
||||
/* ========== Register definition for DMAC peripheral ========== */
|
||||
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
#define REG_DMAC_CTRL (0x41004800U) /**< \brief (DMAC) Control */
|
||||
#define REG_DMAC_CRCCTRL (0x41004802U) /**< \brief (DMAC) CRC Control */
|
||||
#define REG_DMAC_CRCDATAIN (0x41004804U) /**< \brief (DMAC) CRC Data Input */
|
||||
#define REG_DMAC_CRCCHKSUM (0x41004808U) /**< \brief (DMAC) CRC Checksum */
|
||||
#define REG_DMAC_CRCSTATUS (0x4100480CU) /**< \brief (DMAC) CRC Status */
|
||||
#define REG_DMAC_DBGCTRL (0x4100480DU) /**< \brief (DMAC) Debug Control */
|
||||
#define REG_DMAC_QOSCTRL (0x4100480EU) /**< \brief (DMAC) QOS Control */
|
||||
#define REG_DMAC_SWTRIGCTRL (0x41004810U) /**< \brief (DMAC) Software Trigger Control */
|
||||
#define REG_DMAC_PRICTRL0 (0x41004814U) /**< \brief (DMAC) Priority Control 0 */
|
||||
#define REG_DMAC_INTPEND (0x41004820U) /**< \brief (DMAC) Interrupt Pending */
|
||||
#define REG_DMAC_INTSTATUS (0x41004824U) /**< \brief (DMAC) Interrupt Status */
|
||||
#define REG_DMAC_BUSYCH (0x41004828U) /**< \brief (DMAC) Busy Channels */
|
||||
#define REG_DMAC_PENDCH (0x4100482CU) /**< \brief (DMAC) Pending Channels */
|
||||
#define REG_DMAC_ACTIVE (0x41004830U) /**< \brief (DMAC) Active Channel and Levels */
|
||||
#define REG_DMAC_BASEADDR (0x41004834U) /**< \brief (DMAC) Descriptor Memory Section Base Address */
|
||||
#define REG_DMAC_WRBADDR (0x41004838U) /**< \brief (DMAC) Write-Back Memory Section Base Address */
|
||||
#define REG_DMAC_CHID (0x4100483FU) /**< \brief (DMAC) Channel ID */
|
||||
#define REG_DMAC_CHCTRLA (0x41004840U) /**< \brief (DMAC) Channel Control A */
|
||||
#define REG_DMAC_CHCTRLB (0x41004844U) /**< \brief (DMAC) Channel Control B */
|
||||
#define REG_DMAC_CHINTENCLR (0x4100484CU) /**< \brief (DMAC) Channel Interrupt Enable Clear */
|
||||
#define REG_DMAC_CHINTENSET (0x4100484DU) /**< \brief (DMAC) Channel Interrupt Enable Set */
|
||||
#define REG_DMAC_CHINTFLAG (0x4100484EU) /**< \brief (DMAC) Channel Interrupt Flag Status and Clear */
|
||||
#define REG_DMAC_CHSTATUS (0x4100484FU) /**< \brief (DMAC) Channel Status */
|
||||
#else
|
||||
#define REG_DMAC_CTRL (*(RwReg16*)0x41004800U) /**< \brief (DMAC) Control */
|
||||
#define REG_DMAC_CRCCTRL (*(RwReg16*)0x41004802U) /**< \brief (DMAC) CRC Control */
|
||||
#define REG_DMAC_CRCDATAIN (*(RwReg *)0x41004804U) /**< \brief (DMAC) CRC Data Input */
|
||||
#define REG_DMAC_CRCCHKSUM (*(RwReg *)0x41004808U) /**< \brief (DMAC) CRC Checksum */
|
||||
#define REG_DMAC_CRCSTATUS (*(RwReg8 *)0x4100480CU) /**< \brief (DMAC) CRC Status */
|
||||
#define REG_DMAC_DBGCTRL (*(RwReg8 *)0x4100480DU) /**< \brief (DMAC) Debug Control */
|
||||
#define REG_DMAC_QOSCTRL (*(RwReg8 *)0x4100480EU) /**< \brief (DMAC) QOS Control */
|
||||
#define REG_DMAC_SWTRIGCTRL (*(RwReg *)0x41004810U) /**< \brief (DMAC) Software Trigger Control */
|
||||
#define REG_DMAC_PRICTRL0 (*(RwReg *)0x41004814U) /**< \brief (DMAC) Priority Control 0 */
|
||||
#define REG_DMAC_INTPEND (*(RwReg16*)0x41004820U) /**< \brief (DMAC) Interrupt Pending */
|
||||
#define REG_DMAC_INTSTATUS (*(RoReg *)0x41004824U) /**< \brief (DMAC) Interrupt Status */
|
||||
#define REG_DMAC_BUSYCH (*(RoReg *)0x41004828U) /**< \brief (DMAC) Busy Channels */
|
||||
#define REG_DMAC_PENDCH (*(RoReg *)0x4100482CU) /**< \brief (DMAC) Pending Channels */
|
||||
#define REG_DMAC_ACTIVE (*(RoReg *)0x41004830U) /**< \brief (DMAC) Active Channel and Levels */
|
||||
#define REG_DMAC_BASEADDR (*(RwReg *)0x41004834U) /**< \brief (DMAC) Descriptor Memory Section Base Address */
|
||||
#define REG_DMAC_WRBADDR (*(RwReg *)0x41004838U) /**< \brief (DMAC) Write-Back Memory Section Base Address */
|
||||
#define REG_DMAC_CHID (*(RwReg8 *)0x4100483FU) /**< \brief (DMAC) Channel ID */
|
||||
#define REG_DMAC_CHCTRLA (*(RwReg8 *)0x41004840U) /**< \brief (DMAC) Channel Control A */
|
||||
#define REG_DMAC_CHCTRLB (*(RwReg *)0x41004844U) /**< \brief (DMAC) Channel Control B */
|
||||
#define REG_DMAC_CHINTENCLR (*(RwReg8 *)0x4100484CU) /**< \brief (DMAC) Channel Interrupt Enable Clear */
|
||||
#define REG_DMAC_CHINTENSET (*(RwReg8 *)0x4100484DU) /**< \brief (DMAC) Channel Interrupt Enable Set */
|
||||
#define REG_DMAC_CHINTFLAG (*(RwReg8 *)0x4100484EU) /**< \brief (DMAC) Channel Interrupt Flag Status and Clear */
|
||||
#define REG_DMAC_CHSTATUS (*(RoReg8 *)0x4100484FU) /**< \brief (DMAC) Channel Status */
|
||||
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/* ========== Instance parameters for DMAC peripheral ========== */
|
||||
#define DMAC_CH_BITS 4 // Number of bits to select channel
|
||||
#define DMAC_CH_NUM 12 // Number of channels
|
||||
#define DMAC_CLK_AHB_ID 5 // AHB clock index
|
||||
#define DMAC_EVIN_NUM 4 // Number of input events
|
||||
#define DMAC_EVOUT_NUM 4 // Number of output events
|
||||
#define DMAC_LVL_BITS 2 // Number of bit to select level priority
|
||||
#define DMAC_LVL_NUM 4 // Enable priority level number
|
||||
#define DMAC_TRIG_BITS 6 // Number of bits to select trigger source
|
||||
#define DMAC_TRIG_NUM 45 // Number of peripheral triggers
|
||||
|
||||
#endif /* _SAMD21_DMAC_INSTANCE_ */
|
||||
|
|
@ -1,99 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Instance description for DSU
|
||||
*
|
||||
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_DSU_INSTANCE_
|
||||
#define _SAMD21_DSU_INSTANCE_
|
||||
|
||||
/* ========== Register definition for DSU peripheral ========== */
|
||||
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
#define REG_DSU_CTRL (0x41002000U) /**< \brief (DSU) Control */
|
||||
#define REG_DSU_STATUSA (0x41002001U) /**< \brief (DSU) Status A */
|
||||
#define REG_DSU_STATUSB (0x41002002U) /**< \brief (DSU) Status B */
|
||||
#define REG_DSU_ADDR (0x41002004U) /**< \brief (DSU) Address */
|
||||
#define REG_DSU_LENGTH (0x41002008U) /**< \brief (DSU) Length */
|
||||
#define REG_DSU_DATA (0x4100200CU) /**< \brief (DSU) Data */
|
||||
#define REG_DSU_DCC0 (0x41002010U) /**< \brief (DSU) Debug Communication Channel 0 */
|
||||
#define REG_DSU_DCC1 (0x41002014U) /**< \brief (DSU) Debug Communication Channel 1 */
|
||||
#define REG_DSU_DID (0x41002018U) /**< \brief (DSU) Device Identification */
|
||||
#define REG_DSU_ENTRY0 (0x41003000U) /**< \brief (DSU) Coresight ROM Table Entry 0 */
|
||||
#define REG_DSU_ENTRY1 (0x41003004U) /**< \brief (DSU) Coresight ROM Table Entry 1 */
|
||||
#define REG_DSU_END (0x41003008U) /**< \brief (DSU) Coresight ROM Table End */
|
||||
#define REG_DSU_MEMTYPE (0x41003FCCU) /**< \brief (DSU) Coresight ROM Table Memory Type */
|
||||
#define REG_DSU_PID4 (0x41003FD0U) /**< \brief (DSU) Peripheral Identification 4 */
|
||||
#define REG_DSU_PID0 (0x41003FE0U) /**< \brief (DSU) Peripheral Identification 0 */
|
||||
#define REG_DSU_PID1 (0x41003FE4U) /**< \brief (DSU) Peripheral Identification 1 */
|
||||
#define REG_DSU_PID2 (0x41003FE8U) /**< \brief (DSU) Peripheral Identification 2 */
|
||||
#define REG_DSU_PID3 (0x41003FECU) /**< \brief (DSU) Peripheral Identification 3 */
|
||||
#define REG_DSU_CID0 (0x41003FF0U) /**< \brief (DSU) Component Identification 0 */
|
||||
#define REG_DSU_CID1 (0x41003FF4U) /**< \brief (DSU) Component Identification 1 */
|
||||
#define REG_DSU_CID2 (0x41003FF8U) /**< \brief (DSU) Component Identification 2 */
|
||||
#define REG_DSU_CID3 (0x41003FFCU) /**< \brief (DSU) Component Identification 3 */
|
||||
#else
|
||||
#define REG_DSU_CTRL (*(WoReg8 *)0x41002000U) /**< \brief (DSU) Control */
|
||||
#define REG_DSU_STATUSA (*(RwReg8 *)0x41002001U) /**< \brief (DSU) Status A */
|
||||
#define REG_DSU_STATUSB (*(RoReg8 *)0x41002002U) /**< \brief (DSU) Status B */
|
||||
#define REG_DSU_ADDR (*(RwReg *)0x41002004U) /**< \brief (DSU) Address */
|
||||
#define REG_DSU_LENGTH (*(RwReg *)0x41002008U) /**< \brief (DSU) Length */
|
||||
#define REG_DSU_DATA (*(RwReg *)0x4100200CU) /**< \brief (DSU) Data */
|
||||
#define REG_DSU_DCC0 (*(RwReg *)0x41002010U) /**< \brief (DSU) Debug Communication Channel 0 */
|
||||
#define REG_DSU_DCC1 (*(RwReg *)0x41002014U) /**< \brief (DSU) Debug Communication Channel 1 */
|
||||
#define REG_DSU_DID (*(RoReg *)0x41002018U) /**< \brief (DSU) Device Identification */
|
||||
#define REG_DSU_ENTRY0 (*(RoReg *)0x41003000U) /**< \brief (DSU) Coresight ROM Table Entry 0 */
|
||||
#define REG_DSU_ENTRY1 (*(RoReg *)0x41003004U) /**< \brief (DSU) Coresight ROM Table Entry 1 */
|
||||
#define REG_DSU_END (*(RoReg *)0x41003008U) /**< \brief (DSU) Coresight ROM Table End */
|
||||
#define REG_DSU_MEMTYPE (*(RoReg *)0x41003FCCU) /**< \brief (DSU) Coresight ROM Table Memory Type */
|
||||
#define REG_DSU_PID4 (*(RoReg *)0x41003FD0U) /**< \brief (DSU) Peripheral Identification 4 */
|
||||
#define REG_DSU_PID0 (*(RoReg *)0x41003FE0U) /**< \brief (DSU) Peripheral Identification 0 */
|
||||
#define REG_DSU_PID1 (*(RoReg *)0x41003FE4U) /**< \brief (DSU) Peripheral Identification 1 */
|
||||
#define REG_DSU_PID2 (*(RoReg *)0x41003FE8U) /**< \brief (DSU) Peripheral Identification 2 */
|
||||
#define REG_DSU_PID3 (*(RoReg *)0x41003FECU) /**< \brief (DSU) Peripheral Identification 3 */
|
||||
#define REG_DSU_CID0 (*(RoReg *)0x41003FF0U) /**< \brief (DSU) Component Identification 0 */
|
||||
#define REG_DSU_CID1 (*(RoReg *)0x41003FF4U) /**< \brief (DSU) Component Identification 1 */
|
||||
#define REG_DSU_CID2 (*(RoReg *)0x41003FF8U) /**< \brief (DSU) Component Identification 2 */
|
||||
#define REG_DSU_CID3 (*(RoReg *)0x41003FFCU) /**< \brief (DSU) Component Identification 3 */
|
||||
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/* ========== Instance parameters for DSU peripheral ========== */
|
||||
#define DSU_CLK_HSB_ID 3 // Index of AHB clock in PM.AHBMASK register
|
||||
|
||||
#endif /* _SAMD21_DSU_INSTANCE_ */
|
||||
|
|
@ -1,78 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Instance description for EIC
|
||||
*
|
||||
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_EIC_INSTANCE_
|
||||
#define _SAMD21_EIC_INSTANCE_
|
||||
|
||||
/* ========== Register definition for EIC peripheral ========== */
|
||||
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
#define REG_EIC_CTRL (0x40001800U) /**< \brief (EIC) Control */
|
||||
#define REG_EIC_STATUS (0x40001801U) /**< \brief (EIC) Status */
|
||||
#define REG_EIC_NMICTRL (0x40001802U) /**< \brief (EIC) Non-Maskable Interrupt Control */
|
||||
#define REG_EIC_NMIFLAG (0x40001803U) /**< \brief (EIC) Non-Maskable Interrupt Flag Status and Clear */
|
||||
#define REG_EIC_EVCTRL (0x40001804U) /**< \brief (EIC) Event Control */
|
||||
#define REG_EIC_INTENCLR (0x40001808U) /**< \brief (EIC) Interrupt Enable Clear */
|
||||
#define REG_EIC_INTENSET (0x4000180CU) /**< \brief (EIC) Interrupt Enable Set */
|
||||
#define REG_EIC_INTFLAG (0x40001810U) /**< \brief (EIC) Interrupt Flag Status and Clear */
|
||||
#define REG_EIC_WAKEUP (0x40001814U) /**< \brief (EIC) Wake-Up Enable */
|
||||
#define REG_EIC_CONFIG0 (0x40001818U) /**< \brief (EIC) Configuration 0 */
|
||||
#define REG_EIC_CONFIG1 (0x4000181CU) /**< \brief (EIC) Configuration 1 */
|
||||
#else
|
||||
#define REG_EIC_CTRL (*(RwReg8 *)0x40001800U) /**< \brief (EIC) Control */
|
||||
#define REG_EIC_STATUS (*(RoReg8 *)0x40001801U) /**< \brief (EIC) Status */
|
||||
#define REG_EIC_NMICTRL (*(RwReg8 *)0x40001802U) /**< \brief (EIC) Non-Maskable Interrupt Control */
|
||||
#define REG_EIC_NMIFLAG (*(RwReg8 *)0x40001803U) /**< \brief (EIC) Non-Maskable Interrupt Flag Status and Clear */
|
||||
#define REG_EIC_EVCTRL (*(RwReg *)0x40001804U) /**< \brief (EIC) Event Control */
|
||||
#define REG_EIC_INTENCLR (*(RwReg *)0x40001808U) /**< \brief (EIC) Interrupt Enable Clear */
|
||||
#define REG_EIC_INTENSET (*(RwReg *)0x4000180CU) /**< \brief (EIC) Interrupt Enable Set */
|
||||
#define REG_EIC_INTFLAG (*(RwReg *)0x40001810U) /**< \brief (EIC) Interrupt Flag Status and Clear */
|
||||
#define REG_EIC_WAKEUP (*(RwReg *)0x40001814U) /**< \brief (EIC) Wake-Up Enable */
|
||||
#define REG_EIC_CONFIG0 (*(RwReg *)0x40001818U) /**< \brief (EIC) Configuration 0 */
|
||||
#define REG_EIC_CONFIG1 (*(RwReg *)0x4000181CU) /**< \brief (EIC) Configuration 1 */
|
||||
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/* ========== Instance parameters for EIC peripheral ========== */
|
||||
#define EIC_CONFIG_NUM 2 // Number of CONFIG registers
|
||||
#define EIC_GCLK_ID 5 // Index of Generic Clock
|
||||
|
||||
#endif /* _SAMD21_EIC_INSTANCE_ */
|
||||
|
|
@ -1,79 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Instance description for GCLK
|
||||
*
|
||||
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_GCLK_INSTANCE_
|
||||
#define _SAMD21_GCLK_INSTANCE_
|
||||
|
||||
/* ========== Register definition for GCLK peripheral ========== */
|
||||
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
#define REG_GCLK_CTRL (0x40000C00U) /**< \brief (GCLK) Control */
|
||||
#define REG_GCLK_STATUS (0x40000C01U) /**< \brief (GCLK) Status */
|
||||
#define REG_GCLK_CLKCTRL (0x40000C02U) /**< \brief (GCLK) Generic Clock Control */
|
||||
#define REG_GCLK_GENCTRL (0x40000C04U) /**< \brief (GCLK) Generic Clock Generator Control */
|
||||
#define REG_GCLK_GENDIV (0x40000C08U) /**< \brief (GCLK) Generic Clock Generator Division */
|
||||
#else
|
||||
#define REG_GCLK_CTRL (*(RwReg8 *)0x40000C00U) /**< \brief (GCLK) Control */
|
||||
#define REG_GCLK_STATUS (*(RoReg8 *)0x40000C01U) /**< \brief (GCLK) Status */
|
||||
#define REG_GCLK_CLKCTRL (*(RwReg16*)0x40000C02U) /**< \brief (GCLK) Generic Clock Control */
|
||||
#define REG_GCLK_GENCTRL (*(RwReg *)0x40000C04U) /**< \brief (GCLK) Generic Clock Generator Control */
|
||||
#define REG_GCLK_GENDIV (*(RwReg *)0x40000C08U) /**< \brief (GCLK) Generic Clock Generator Division */
|
||||
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/* ========== Instance parameters for GCLK peripheral ========== */
|
||||
#define GCLK_GENDIV_BITS 16
|
||||
#define GCLK_GEN_NUM 9 // Number of Generic Clock Generators
|
||||
#define GCLK_GEN_NUM_MSB 8 // Number of Generic Clock Generators - 1
|
||||
#define GCLK_GEN_SOURCE_NUM_MSB 8 // Number of Generic Clock Sources - 1
|
||||
#define GCLK_NUM 37 // Number of Generic Clock Users
|
||||
#define GCLK_SOURCE_DFLL48M 7 // DFLL48M output
|
||||
#define GCLK_SOURCE_FDPLL 8 // FDPLL output
|
||||
#define GCLK_SOURCE_GCLKGEN1 2 // Generic clock generator 1 output
|
||||
#define GCLK_SOURCE_GCLKIN 1 // Generator input pad
|
||||
#define GCLK_SOURCE_NUM 9 // Number of Generic Clock Sources
|
||||
#define GCLK_SOURCE_OSCULP32K 3 // OSCULP32K oscillator output
|
||||
#define GCLK_SOURCE_OSC8M 6 // OSC8M oscillator output
|
||||
#define GCLK_SOURCE_OSC32K 4 // OSC32K oscillator outpur
|
||||
#define GCLK_SOURCE_XOSC 0 // XOSC oscillator output
|
||||
#define GCLK_SOURCE_XOSC32K 5 // XOSC32K oscillator output
|
||||
|
||||
#endif /* _SAMD21_GCLK_INSTANCE_ */
|
||||
|
|
@ -1,94 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Instance description for I2S
|
||||
*
|
||||
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_I2S_INSTANCE_
|
||||
#define _SAMD21_I2S_INSTANCE_
|
||||
|
||||
/* ========== Register definition for I2S peripheral ========== */
|
||||
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
#define REG_I2S_CTRLA (0x42005000U) /**< \brief (I2S) Control A */
|
||||
#define REG_I2S_CLKCTRL0 (0x42005004U) /**< \brief (I2S) Clock Unit 0 Control */
|
||||
#define REG_I2S_CLKCTRL1 (0x42005008U) /**< \brief (I2S) Clock Unit 1 Control */
|
||||
#define REG_I2S_INTENCLR (0x4200500CU) /**< \brief (I2S) Interrupt Enable Clear */
|
||||
#define REG_I2S_INTENSET (0x42005010U) /**< \brief (I2S) Interrupt Enable Set */
|
||||
#define REG_I2S_INTFLAG (0x42005014U) /**< \brief (I2S) Interrupt Flag Status and Clear */
|
||||
#define REG_I2S_SYNCBUSY (0x42005018U) /**< \brief (I2S) Synchronization Status */
|
||||
#define REG_I2S_SERCTRL0 (0x42005020U) /**< \brief (I2S) Serializer 0 Control */
|
||||
#define REG_I2S_SERCTRL1 (0x42005024U) /**< \brief (I2S) Serializer 1 Control */
|
||||
#define REG_I2S_DATA0 (0x42005030U) /**< \brief (I2S) Data 0 */
|
||||
#define REG_I2S_DATA1 (0x42005034U) /**< \brief (I2S) Data 1 */
|
||||
#else
|
||||
#define REG_I2S_CTRLA (*(RwReg8 *)0x42005000U) /**< \brief (I2S) Control A */
|
||||
#define REG_I2S_CLKCTRL0 (*(RwReg *)0x42005004U) /**< \brief (I2S) Clock Unit 0 Control */
|
||||
#define REG_I2S_CLKCTRL1 (*(RwReg *)0x42005008U) /**< \brief (I2S) Clock Unit 1 Control */
|
||||
#define REG_I2S_INTENCLR (*(RwReg16*)0x4200500CU) /**< \brief (I2S) Interrupt Enable Clear */
|
||||
#define REG_I2S_INTENSET (*(RwReg16*)0x42005010U) /**< \brief (I2S) Interrupt Enable Set */
|
||||
#define REG_I2S_INTFLAG (*(RwReg16*)0x42005014U) /**< \brief (I2S) Interrupt Flag Status and Clear */
|
||||
#define REG_I2S_SYNCBUSY (*(RoReg16*)0x42005018U) /**< \brief (I2S) Synchronization Status */
|
||||
#define REG_I2S_SERCTRL0 (*(RwReg *)0x42005020U) /**< \brief (I2S) Serializer 0 Control */
|
||||
#define REG_I2S_SERCTRL1 (*(RwReg *)0x42005024U) /**< \brief (I2S) Serializer 1 Control */
|
||||
#define REG_I2S_DATA0 (*(RwReg *)0x42005030U) /**< \brief (I2S) Data 0 */
|
||||
#define REG_I2S_DATA1 (*(RwReg *)0x42005034U) /**< \brief (I2S) Data 1 */
|
||||
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/* ========== Instance parameters for I2S peripheral ========== */
|
||||
#define I2S_CLK_NUM 2 // Number of clock units
|
||||
#define I2S_DMAC_ID_RX_0 41
|
||||
#define I2S_DMAC_ID_RX_1 42
|
||||
#define I2S_DMAC_ID_RX_LSB 41
|
||||
#define I2S_DMAC_ID_RX_MSB 42
|
||||
#define I2S_DMAC_ID_RX_SIZE 2
|
||||
#define I2S_DMAC_ID_TX_0 43
|
||||
#define I2S_DMAC_ID_TX_1 44
|
||||
#define I2S_DMAC_ID_TX_LSB 43
|
||||
#define I2S_DMAC_ID_TX_MSB 44
|
||||
#define I2S_DMAC_ID_TX_SIZE 2
|
||||
#define I2S_GCLK_ID_0 35
|
||||
#define I2S_GCLK_ID_1 36
|
||||
#define I2S_GCLK_ID_LSB 35
|
||||
#define I2S_GCLK_ID_MSB 36
|
||||
#define I2S_GCLK_ID_SIZE 2
|
||||
#define I2S_MAX_SLOTS 8 // Max number of data slots in frame
|
||||
#define I2S_SER_NUM 2 // Number of serializers
|
||||
|
||||
#endif /* _SAMD21_I2S_INSTANCE_ */
|
||||
|
|
@ -1,103 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Instance description for MTB
|
||||
*
|
||||
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_MTB_INSTANCE_
|
||||
#define _SAMD21_MTB_INSTANCE_
|
||||
|
||||
/* ========== Register definition for MTB peripheral ========== */
|
||||
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
#define REG_MTB_POSITION (0x41006000U) /**< \brief (MTB) MTB Position */
|
||||
#define REG_MTB_MASTER (0x41006004U) /**< \brief (MTB) MTB Master */
|
||||
#define REG_MTB_FLOW (0x41006008U) /**< \brief (MTB) MTB Flow */
|
||||
#define REG_MTB_BASE (0x4100600CU) /**< \brief (MTB) MTB Base */
|
||||
#define REG_MTB_ITCTRL (0x41006F00U) /**< \brief (MTB) MTB Integration Mode Control */
|
||||
#define REG_MTB_CLAIMSET (0x41006FA0U) /**< \brief (MTB) MTB Claim Set */
|
||||
#define REG_MTB_CLAIMCLR (0x41006FA4U) /**< \brief (MTB) MTB Claim Clear */
|
||||
#define REG_MTB_LOCKACCESS (0x41006FB0U) /**< \brief (MTB) MTB Lock Access */
|
||||
#define REG_MTB_LOCKSTATUS (0x41006FB4U) /**< \brief (MTB) MTB Lock Status */
|
||||
#define REG_MTB_AUTHSTATUS (0x41006FB8U) /**< \brief (MTB) MTB Authentication Status */
|
||||
#define REG_MTB_DEVARCH (0x41006FBCU) /**< \brief (MTB) MTB Device Architecture */
|
||||
#define REG_MTB_DEVID (0x41006FC8U) /**< \brief (MTB) MTB Device Configuration */
|
||||
#define REG_MTB_DEVTYPE (0x41006FCCU) /**< \brief (MTB) MTB Device Type */
|
||||
#define REG_MTB_PID4 (0x41006FD0U) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_PID5 (0x41006FD4U) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_PID6 (0x41006FD8U) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_PID7 (0x41006FDCU) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_PID0 (0x41006FE0U) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_PID1 (0x41006FE4U) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_PID2 (0x41006FE8U) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_PID3 (0x41006FECU) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_CID0 (0x41006FF0U) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_CID1 (0x41006FF4U) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_CID2 (0x41006FF8U) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_CID3 (0x41006FFCU) /**< \brief (MTB) CoreSight */
|
||||
#else
|
||||
#define REG_MTB_POSITION (*(RwReg *)0x41006000U) /**< \brief (MTB) MTB Position */
|
||||
#define REG_MTB_MASTER (*(RwReg *)0x41006004U) /**< \brief (MTB) MTB Master */
|
||||
#define REG_MTB_FLOW (*(RwReg *)0x41006008U) /**< \brief (MTB) MTB Flow */
|
||||
#define REG_MTB_BASE (*(RoReg *)0x4100600CU) /**< \brief (MTB) MTB Base */
|
||||
#define REG_MTB_ITCTRL (*(RwReg *)0x41006F00U) /**< \brief (MTB) MTB Integration Mode Control */
|
||||
#define REG_MTB_CLAIMSET (*(RwReg *)0x41006FA0U) /**< \brief (MTB) MTB Claim Set */
|
||||
#define REG_MTB_CLAIMCLR (*(RwReg *)0x41006FA4U) /**< \brief (MTB) MTB Claim Clear */
|
||||
#define REG_MTB_LOCKACCESS (*(RwReg *)0x41006FB0U) /**< \brief (MTB) MTB Lock Access */
|
||||
#define REG_MTB_LOCKSTATUS (*(RoReg *)0x41006FB4U) /**< \brief (MTB) MTB Lock Status */
|
||||
#define REG_MTB_AUTHSTATUS (*(RoReg *)0x41006FB8U) /**< \brief (MTB) MTB Authentication Status */
|
||||
#define REG_MTB_DEVARCH (*(RoReg *)0x41006FBCU) /**< \brief (MTB) MTB Device Architecture */
|
||||
#define REG_MTB_DEVID (*(RoReg *)0x41006FC8U) /**< \brief (MTB) MTB Device Configuration */
|
||||
#define REG_MTB_DEVTYPE (*(RoReg *)0x41006FCCU) /**< \brief (MTB) MTB Device Type */
|
||||
#define REG_MTB_PID4 (*(RoReg *)0x41006FD0U) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_PID5 (*(RoReg *)0x41006FD4U) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_PID6 (*(RoReg *)0x41006FD8U) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_PID7 (*(RoReg *)0x41006FDCU) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_PID0 (*(RoReg *)0x41006FE0U) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_PID1 (*(RoReg *)0x41006FE4U) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_PID2 (*(RoReg *)0x41006FE8U) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_PID3 (*(RoReg *)0x41006FECU) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_CID0 (*(RoReg *)0x41006FF0U) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_CID1 (*(RoReg *)0x41006FF4U) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_CID2 (*(RoReg *)0x41006FF8U) /**< \brief (MTB) CoreSight */
|
||||
#define REG_MTB_CID3 (*(RoReg *)0x41006FFCU) /**< \brief (MTB) CoreSight */
|
||||
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
|
||||
#endif /* _SAMD21_MTB_INSTANCE_ */
|
||||
|
|
@ -1,92 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Instance description for NVMCTRL
|
||||
*
|
||||
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_NVMCTRL_INSTANCE_
|
||||
#define _SAMD21_NVMCTRL_INSTANCE_
|
||||
|
||||
/* ========== Register definition for NVMCTRL peripheral ========== */
|
||||
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
#define REG_NVMCTRL_CTRLA (0x41004000U) /**< \brief (NVMCTRL) Control A */
|
||||
#define REG_NVMCTRL_CTRLB (0x41004004U) /**< \brief (NVMCTRL) Control B */
|
||||
#define REG_NVMCTRL_PARAM (0x41004008U) /**< \brief (NVMCTRL) NVM Parameter */
|
||||
#define REG_NVMCTRL_INTENCLR (0x4100400CU) /**< \brief (NVMCTRL) Interrupt Enable Clear */
|
||||
#define REG_NVMCTRL_INTENSET (0x41004010U) /**< \brief (NVMCTRL) Interrupt Enable Set */
|
||||
#define REG_NVMCTRL_INTFLAG (0x41004014U) /**< \brief (NVMCTRL) Interrupt Flag Status and Clear */
|
||||
#define REG_NVMCTRL_STATUS (0x41004018U) /**< \brief (NVMCTRL) Status */
|
||||
#define REG_NVMCTRL_ADDR (0x4100401CU) /**< \brief (NVMCTRL) Address */
|
||||
#define REG_NVMCTRL_LOCK (0x41004020U) /**< \brief (NVMCTRL) Lock Section */
|
||||
#else
|
||||
#define REG_NVMCTRL_CTRLA (*(RwReg16*)0x41004000U) /**< \brief (NVMCTRL) Control A */
|
||||
#define REG_NVMCTRL_CTRLB (*(RwReg *)0x41004004U) /**< \brief (NVMCTRL) Control B */
|
||||
#define REG_NVMCTRL_PARAM (*(RwReg *)0x41004008U) /**< \brief (NVMCTRL) NVM Parameter */
|
||||
#define REG_NVMCTRL_INTENCLR (*(RwReg8 *)0x4100400CU) /**< \brief (NVMCTRL) Interrupt Enable Clear */
|
||||
#define REG_NVMCTRL_INTENSET (*(RwReg8 *)0x41004010U) /**< \brief (NVMCTRL) Interrupt Enable Set */
|
||||
#define REG_NVMCTRL_INTFLAG (*(RwReg8 *)0x41004014U) /**< \brief (NVMCTRL) Interrupt Flag Status and Clear */
|
||||
#define REG_NVMCTRL_STATUS (*(RwReg16*)0x41004018U) /**< \brief (NVMCTRL) Status */
|
||||
#define REG_NVMCTRL_ADDR (*(RwReg *)0x4100401CU) /**< \brief (NVMCTRL) Address */
|
||||
#define REG_NVMCTRL_LOCK (*(RwReg16*)0x41004020U) /**< \brief (NVMCTRL) Lock Section */
|
||||
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/* ========== Instance parameters for NVMCTRL peripheral ========== */
|
||||
#define NVMCTRL_AUX0_ADDRESS 0x00804000
|
||||
#define NVMCTRL_AUX1_ADDRESS 0x00806000
|
||||
#define NVMCTRL_AUX2_ADDRESS 0x00808000
|
||||
#define NVMCTRL_AUX3_ADDRESS 0x0080A000
|
||||
#define NVMCTRL_CLK_AHB_ID 4 // Index of AHB Clock in PM.AHBMASK register
|
||||
#define NVMCTRL_FACTORY_WORD_IMPLEMENTED_MASK 0xC0000007FFFFFFFF
|
||||
#define NVMCTRL_FLASH_SIZE 65536
|
||||
#define NVMCTRL_LOCKBIT_ADDRESS 0x00802000
|
||||
#define NVMCTRL_PAGE_HW 32
|
||||
#define NVMCTRL_PAGE_SIZE 64
|
||||
#define NVMCTRL_PAGE_W 16
|
||||
#define NVMCTRL_PMSB 3
|
||||
#define NVMCTRL_PSZ_BITS 6
|
||||
#define NVMCTRL_ROW_PAGES 4
|
||||
#define NVMCTRL_ROW_SIZE 256
|
||||
#define NVMCTRL_USER_PAGE_ADDRESS 0x00800000
|
||||
#define NVMCTRL_USER_PAGE_OFFSET 0x00800000
|
||||
#define NVMCTRL_USER_WORD_IMPLEMENTED_MASK 0xC01FFFFFFFFFFFFF
|
||||
#define NVMCTRL_RWWEE_PAGES 32 // Page size
|
||||
#define NVMCTRL_RWW_EEPROM_ADDR 0x00400000 // Start address of the RWW EEPROM area
|
||||
|
||||
#endif /* _SAMD21_NVMCTRL_INSTANCE_ */
|
||||
|
|
@ -1,59 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Instance description for PAC0
|
||||
*
|
||||
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_PAC0_INSTANCE_
|
||||
#define _SAMD21_PAC0_INSTANCE_
|
||||
|
||||
/* ========== Register definition for PAC0 peripheral ========== */
|
||||
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
#define REG_PAC0_WPCLR (0x40000000U) /**< \brief (PAC0) Write Protection Clear */
|
||||
#define REG_PAC0_WPSET (0x40000004U) /**< \brief (PAC0) Write Protection Set */
|
||||
#else
|
||||
#define REG_PAC0_WPCLR (*(RwReg *)0x40000000U) /**< \brief (PAC0) Write Protection Clear */
|
||||
#define REG_PAC0_WPSET (*(RwReg *)0x40000004U) /**< \brief (PAC0) Write Protection Set */
|
||||
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/* ========== Instance parameters for PAC0 peripheral ========== */
|
||||
#define PAC0_WPROT_DEFAULT_VAL 0x00000000 // PAC protection mask at reset
|
||||
|
||||
#endif /* _SAMD21_PAC0_INSTANCE_ */
|
||||
|
|
@ -1,59 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Instance description for PAC1
|
||||
*
|
||||
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_PAC1_INSTANCE_
|
||||
#define _SAMD21_PAC1_INSTANCE_
|
||||
|
||||
/* ========== Register definition for PAC1 peripheral ========== */
|
||||
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
#define REG_PAC1_WPCLR (0x41000000U) /**< \brief (PAC1) Write Protection Clear */
|
||||
#define REG_PAC1_WPSET (0x41000004U) /**< \brief (PAC1) Write Protection Set */
|
||||
#else
|
||||
#define REG_PAC1_WPCLR (*(RwReg *)0x41000000U) /**< \brief (PAC1) Write Protection Clear */
|
||||
#define REG_PAC1_WPSET (*(RwReg *)0x41000004U) /**< \brief (PAC1) Write Protection Set */
|
||||
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/* ========== Instance parameters for PAC1 peripheral ========== */
|
||||
#define PAC1_WPROT_DEFAULT_VAL 0x00000002 // PAC protection mask at reset
|
||||
|
||||
#endif /* _SAMD21_PAC1_INSTANCE_ */
|
||||
|
|
@ -1,59 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Instance description for PAC2
|
||||
*
|
||||
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_PAC2_INSTANCE_
|
||||
#define _SAMD21_PAC2_INSTANCE_
|
||||
|
||||
/* ========== Register definition for PAC2 peripheral ========== */
|
||||
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
#define REG_PAC2_WPCLR (0x42000000U) /**< \brief (PAC2) Write Protection Clear */
|
||||
#define REG_PAC2_WPSET (0x42000004U) /**< \brief (PAC2) Write Protection Set */
|
||||
#else
|
||||
#define REG_PAC2_WPCLR (*(RwReg *)0x42000000U) /**< \brief (PAC2) Write Protection Clear */
|
||||
#define REG_PAC2_WPSET (*(RwReg *)0x42000004U) /**< \brief (PAC2) Write Protection Set */
|
||||
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/* ========== Instance parameters for PAC2 peripheral ========== */
|
||||
#define PAC2_WPROT_DEFAULT_VAL 0x00800000 // PAC protection mask at reset
|
||||
|
||||
#endif /* _SAMD21_PAC2_INSTANCE_ */
|
||||
|
|
@ -1,89 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Instance description for PM
|
||||
*
|
||||
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_PM_INSTANCE_
|
||||
#define _SAMD21_PM_INSTANCE_
|
||||
|
||||
/* ========== Register definition for PM peripheral ========== */
|
||||
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
#define REG_PM_CTRL (0x40000400U) /**< \brief (PM) Control */
|
||||
#define REG_PM_SLEEP (0x40000401U) /**< \brief (PM) Sleep Mode */
|
||||
#define REG_PM_EXTCTRL (0x40000402U) /**< \brief (PM) External Reset Controller */
|
||||
#define REG_PM_CPUSEL (0x40000408U) /**< \brief (PM) CPU Clock Select */
|
||||
#define REG_PM_APBASEL (0x40000409U) /**< \brief (PM) APBA Clock Select */
|
||||
#define REG_PM_APBBSEL (0x4000040AU) /**< \brief (PM) APBB Clock Select */
|
||||
#define REG_PM_APBCSEL (0x4000040BU) /**< \brief (PM) APBC Clock Select */
|
||||
#define REG_PM_AHBMASK (0x40000414U) /**< \brief (PM) AHB Mask */
|
||||
#define REG_PM_APBAMASK (0x40000418U) /**< \brief (PM) APBA Mask */
|
||||
#define REG_PM_APBBMASK (0x4000041CU) /**< \brief (PM) APBB Mask */
|
||||
#define REG_PM_APBCMASK (0x40000420U) /**< \brief (PM) APBC Mask */
|
||||
#define REG_PM_INTENCLR (0x40000434U) /**< \brief (PM) Interrupt Enable Clear */
|
||||
#define REG_PM_INTENSET (0x40000435U) /**< \brief (PM) Interrupt Enable Set */
|
||||
#define REG_PM_INTFLAG (0x40000436U) /**< \brief (PM) Interrupt Flag Status and Clear */
|
||||
#define REG_PM_RCAUSE (0x40000438U) /**< \brief (PM) Reset Cause */
|
||||
#else
|
||||
#define REG_PM_CTRL (*(RwReg8 *)0x40000400U) /**< \brief (PM) Control */
|
||||
#define REG_PM_SLEEP (*(RwReg8 *)0x40000401U) /**< \brief (PM) Sleep Mode */
|
||||
#define REG_PM_EXTCTRL (*(RwReg8 *)0x40000402U) /**< \brief (PM) External Reset Controller */
|
||||
#define REG_PM_CPUSEL (*(RwReg8 *)0x40000408U) /**< \brief (PM) CPU Clock Select */
|
||||
#define REG_PM_APBASEL (*(RwReg8 *)0x40000409U) /**< \brief (PM) APBA Clock Select */
|
||||
#define REG_PM_APBBSEL (*(RwReg8 *)0x4000040AU) /**< \brief (PM) APBB Clock Select */
|
||||
#define REG_PM_APBCSEL (*(RwReg8 *)0x4000040BU) /**< \brief (PM) APBC Clock Select */
|
||||
#define REG_PM_AHBMASK (*(RwReg *)0x40000414U) /**< \brief (PM) AHB Mask */
|
||||
#define REG_PM_APBAMASK (*(RwReg *)0x40000418U) /**< \brief (PM) APBA Mask */
|
||||
#define REG_PM_APBBMASK (*(RwReg *)0x4000041CU) /**< \brief (PM) APBB Mask */
|
||||
#define REG_PM_APBCMASK (*(RwReg *)0x40000420U) /**< \brief (PM) APBC Mask */
|
||||
#define REG_PM_INTENCLR (*(RwReg8 *)0x40000434U) /**< \brief (PM) Interrupt Enable Clear */
|
||||
#define REG_PM_INTENSET (*(RwReg8 *)0x40000435U) /**< \brief (PM) Interrupt Enable Set */
|
||||
#define REG_PM_INTFLAG (*(RwReg8 *)0x40000436U) /**< \brief (PM) Interrupt Flag Status and Clear */
|
||||
#define REG_PM_RCAUSE (*(RoReg8 *)0x40000438U) /**< \brief (PM) Reset Cause */
|
||||
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/* ========== Instance parameters for PM peripheral ========== */
|
||||
#define PM_CTRL_MCSEL_DFLL48M 3
|
||||
#define PM_CTRL_MCSEL_GCLK 0
|
||||
#define PM_CTRL_MCSEL_OSC8M 1
|
||||
#define PM_CTRL_MCSEL_XOSC 2
|
||||
#define PM_PM_CLK_APB_NUM 2
|
||||
|
||||
#endif /* _SAMD21_PM_INSTANCE_ */
|
||||
|
|
@ -1,136 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Instance description for PORT
|
||||
*
|
||||
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_PORT_INSTANCE_
|
||||
#define _SAMD21_PORT_INSTANCE_
|
||||
|
||||
/* ========== Register definition for PORT peripheral ========== */
|
||||
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
#define REG_PORT_DIR0 (0x41004400U) /**< \brief (PORT) Data Direction 0 */
|
||||
#define REG_PORT_DIRCLR0 (0x41004404U) /**< \brief (PORT) Data Direction Clear 0 */
|
||||
#define REG_PORT_DIRSET0 (0x41004408U) /**< \brief (PORT) Data Direction Set 0 */
|
||||
#define REG_PORT_DIRTGL0 (0x4100440CU) /**< \brief (PORT) Data Direction Toggle 0 */
|
||||
#define REG_PORT_OUT0 (0x41004410U) /**< \brief (PORT) Data Output Value 0 */
|
||||
#define REG_PORT_OUTCLR0 (0x41004414U) /**< \brief (PORT) Data Output Value Clear 0 */
|
||||
#define REG_PORT_OUTSET0 (0x41004418U) /**< \brief (PORT) Data Output Value Set 0 */
|
||||
#define REG_PORT_OUTTGL0 (0x4100441CU) /**< \brief (PORT) Data Output Value Toggle 0 */
|
||||
#define REG_PORT_IN0 (0x41004420U) /**< \brief (PORT) Data Input Value 0 */
|
||||
#define REG_PORT_CTRL0 (0x41004424U) /**< \brief (PORT) Control 0 */
|
||||
#define REG_PORT_WRCONFIG0 (0x41004428U) /**< \brief (PORT) Write Configuration 0 */
|
||||
#define REG_PORT_PMUX0 (0x41004430U) /**< \brief (PORT) Peripheral Multiplexing 0 */
|
||||
#define REG_PORT_PINCFG0 (0x41004440U) /**< \brief (PORT) Pin Configuration 0 */
|
||||
#define REG_PORT_DIR1 (0x41004480U) /**< \brief (PORT) Data Direction 1 */
|
||||
#define REG_PORT_DIRCLR1 (0x41004484U) /**< \brief (PORT) Data Direction Clear 1 */
|
||||
#define REG_PORT_DIRSET1 (0x41004488U) /**< \brief (PORT) Data Direction Set 1 */
|
||||
#define REG_PORT_DIRTGL1 (0x4100448CU) /**< \brief (PORT) Data Direction Toggle 1 */
|
||||
#define REG_PORT_OUT1 (0x41004490U) /**< \brief (PORT) Data Output Value 1 */
|
||||
#define REG_PORT_OUTCLR1 (0x41004494U) /**< \brief (PORT) Data Output Value Clear 1 */
|
||||
#define REG_PORT_OUTSET1 (0x41004498U) /**< \brief (PORT) Data Output Value Set 1 */
|
||||
#define REG_PORT_OUTTGL1 (0x4100449CU) /**< \brief (PORT) Data Output Value Toggle 1 */
|
||||
#define REG_PORT_IN1 (0x410044A0U) /**< \brief (PORT) Data Input Value 1 */
|
||||
#define REG_PORT_CTRL1 (0x410044A4U) /**< \brief (PORT) Control 1 */
|
||||
#define REG_PORT_WRCONFIG1 (0x410044A8U) /**< \brief (PORT) Write Configuration 1 */
|
||||
#define REG_PORT_PMUX1 (0x410044B0U) /**< \brief (PORT) Peripheral Multiplexing 1 */
|
||||
#define REG_PORT_PINCFG1 (0x410044C0U) /**< \brief (PORT) Pin Configuration 1 */
|
||||
#else
|
||||
#define REG_PORT_DIR0 (*(RwReg *)0x41004400U) /**< \brief (PORT) Data Direction 0 */
|
||||
#define REG_PORT_DIRCLR0 (*(RwReg *)0x41004404U) /**< \brief (PORT) Data Direction Clear 0 */
|
||||
#define REG_PORT_DIRSET0 (*(RwReg *)0x41004408U) /**< \brief (PORT) Data Direction Set 0 */
|
||||
#define REG_PORT_DIRTGL0 (*(RwReg *)0x4100440CU) /**< \brief (PORT) Data Direction Toggle 0 */
|
||||
#define REG_PORT_OUT0 (*(RwReg *)0x41004410U) /**< \brief (PORT) Data Output Value 0 */
|
||||
#define REG_PORT_OUTCLR0 (*(RwReg *)0x41004414U) /**< \brief (PORT) Data Output Value Clear 0 */
|
||||
#define REG_PORT_OUTSET0 (*(RwReg *)0x41004418U) /**< \brief (PORT) Data Output Value Set 0 */
|
||||
#define REG_PORT_OUTTGL0 (*(RwReg *)0x4100441CU) /**< \brief (PORT) Data Output Value Toggle 0 */
|
||||
#define REG_PORT_IN0 (*(RoReg *)0x41004420U) /**< \brief (PORT) Data Input Value 0 */
|
||||
#define REG_PORT_CTRL0 (*(RwReg *)0x41004424U) /**< \brief (PORT) Control 0 */
|
||||
#define REG_PORT_WRCONFIG0 (*(WoReg *)0x41004428U) /**< \brief (PORT) Write Configuration 0 */
|
||||
#define REG_PORT_PMUX0 (*(RwReg *)0x41004430U) /**< \brief (PORT) Peripheral Multiplexing 0 */
|
||||
#define REG_PORT_PINCFG0 (*(RwReg *)0x41004440U) /**< \brief (PORT) Pin Configuration 0 */
|
||||
#define REG_PORT_DIR1 (*(RwReg *)0x41004480U) /**< \brief (PORT) Data Direction 1 */
|
||||
#define REG_PORT_DIRCLR1 (*(RwReg *)0x41004484U) /**< \brief (PORT) Data Direction Clear 1 */
|
||||
#define REG_PORT_DIRSET1 (*(RwReg *)0x41004488U) /**< \brief (PORT) Data Direction Set 1 */
|
||||
#define REG_PORT_DIRTGL1 (*(RwReg *)0x4100448CU) /**< \brief (PORT) Data Direction Toggle 1 */
|
||||
#define REG_PORT_OUT1 (*(RwReg *)0x41004490U) /**< \brief (PORT) Data Output Value 1 */
|
||||
#define REG_PORT_OUTCLR1 (*(RwReg *)0x41004494U) /**< \brief (PORT) Data Output Value Clear 1 */
|
||||
#define REG_PORT_OUTSET1 (*(RwReg *)0x41004498U) /**< \brief (PORT) Data Output Value Set 1 */
|
||||
#define REG_PORT_OUTTGL1 (*(RwReg *)0x4100449CU) /**< \brief (PORT) Data Output Value Toggle 1 */
|
||||
#define REG_PORT_IN1 (*(RoReg *)0x410044A0U) /**< \brief (PORT) Data Input Value 1 */
|
||||
#define REG_PORT_CTRL1 (*(RwReg *)0x410044A4U) /**< \brief (PORT) Control 1 */
|
||||
#define REG_PORT_WRCONFIG1 (*(WoReg *)0x410044A8U) /**< \brief (PORT) Write Configuration 1 */
|
||||
#define REG_PORT_PMUX1 (*(RwReg *)0x410044B0U) /**< \brief (PORT) Peripheral Multiplexing 1 */
|
||||
#define REG_PORT_PINCFG1 (*(RwReg *)0x410044C0U) /**< \brief (PORT) Pin Configuration 1 */
|
||||
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/* ========== Instance parameters for PORT peripheral ========== */
|
||||
#define PORT_BITS 64 // Number of PORT pins
|
||||
#define PORT_DIR_DEFAULT_VAL { 0x00000000, 0x00000000 } // Default value for DIR of all pins
|
||||
#define PORT_DIR_IMPLEMENTED { 0xDBFFFFFF, 0xC0C3FFFF } // Implementation mask for DIR of all pins
|
||||
#define PORT_DRVSTR 1 // DRVSTR supported
|
||||
#define PORT_DRVSTR_DEFAULT_VAL { 0xD8FFFFFF, 0xC0C3FFFF } // Default value for DRVSTR of all pins
|
||||
#define PORT_DRVSTR_IMPLEMENTED { 0xD8FFFFFF, 0xC0C3FFFF } // Implementation mask for DRVSTR of all pins
|
||||
#define PORT_EVENT_IMPLEMENTED { 0x00000000, 0x00000000 }
|
||||
#define PORT_INEN_DEFAULT_VAL { 0x00000000, 0x00000000 } // Default value for INEN of all pins
|
||||
#define PORT_INEN_IMPLEMENTED { 0xDBFFFFFF, 0xC0C3FFFF } // Implementation mask for INEN of all pins
|
||||
#define PORT_ODRAIN 0 // ODRAIN supported
|
||||
#define PORT_ODRAIN_DEFAULT_VAL { 0x00000000, 0x00000000 } // Default value for ODRAIN of all pins
|
||||
#define PORT_ODRAIN_IMPLEMENTED { 0x00000000, 0x00000000 } // Implementation mask for ODRAIN of all pins
|
||||
#define PORT_OUT_DEFAULT_VAL { 0x00000000, 0x00000000 } // Default value for OUT of all pins
|
||||
#define PORT_OUT_IMPLEMENTED { 0xDBFFFFFF, 0xC0C3FFFF } // Implementation mask for OUT of all pins
|
||||
#define PORT_PIN_IMPLEMENTED { 0xDBFFFFFF, 0xC0C3FFFF } // Implementation mask for all PORT pins
|
||||
#define PORT_PMUXBIT0_DEFAULT_VAL { 0x00000000, 0x00000000 } // Default value for PMUX[0] of all pins
|
||||
#define PORT_PMUXBIT0_IMPLEMENTED { 0xDBFFFFFF, 0xC0C3FFFF } // Implementation mask for PMUX[0] of all pins
|
||||
#define PORT_PMUXBIT1_DEFAULT_VAL { 0x40000000, 0x00000000 } // Default value for PMUX[1] of all pins
|
||||
#define PORT_PMUXBIT1_IMPLEMENTED { 0xDBFFFFF3, 0xC0C3FF0F } // Implementation mask for PMUX[1] of all pins
|
||||
#define PORT_PMUXBIT2_DEFAULT_VAL { 0x40000000, 0x00000000 } // Default value for PMUX[2] of all pins
|
||||
#define PORT_PMUXBIT2_IMPLEMENTED { 0xDBFFFFF7, 0xC0C3FF0F } // Implementation mask for PMUX[2] of all pins
|
||||
#define PORT_PMUXBIT3_DEFAULT_VAL { 0x00000000, 0x00000000 } // Default value for PMUX[3] of all pins
|
||||
#define PORT_PMUXBIT3_IMPLEMENTED { 0x00000000, 0x00000000 } // Implementation mask for PMUX[3] of all pins
|
||||
#define PORT_PMUXEN_DEFAULT_VAL { 0x64000000, 0x3F3C0000 } // Default value for PMUXEN of all pins
|
||||
#define PORT_PMUXEN_IMPLEMENTED { 0xDBFFFFFF, 0xC0C3FFFF } // Implementation mask for PMUXEN of all pins
|
||||
#define PORT_PULLEN_DEFAULT_VAL { 0x00000000, 0x00000000 } // Default value for PULLEN of all pins
|
||||
#define PORT_PULLEN_IMPLEMENTED { 0xDBFFFFFF, 0xC0C3FFFF } // Implementation mask for PULLEN of all pins
|
||||
#define PORT_SLEWLIM 0 // SLEWLIM supported
|
||||
#define PORT_SLEWLIM_DEFAULT_VAL { 0x00000000, 0x00000000 } // Default value for SLEWLIM of all pins
|
||||
#define PORT_SLEWLIM_IMPLEMENTED { 0x00000000, 0x00000000 } // Implementation mask for SLEWLIM of all pins
|
||||
|
||||
#endif /* _SAMD21_PORT_INSTANCE_ */
|
||||
|
|
@ -1,117 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Instance description for RTC
|
||||
*
|
||||
* Copyright (c) 2016 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SAMD21_RTC_INSTANCE_
|
||||
#define _SAMD21_RTC_INSTANCE_
|
||||
|
||||
/* ========== Register definition for RTC peripheral ========== */
|
||||
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
|
||||
#define REG_RTC_READREQ (0x40001402U) /**< \brief (RTC) Read Request */
|
||||
#define REG_RTC_STATUS (0x4000140AU) /**< \brief (RTC) Status */
|
||||
#define REG_RTC_DBGCTRL (0x4000140BU) /**< \brief (RTC) Debug Control */
|
||||
#define REG_RTC_FREQCORR (0x4000140CU) /**< \brief (RTC) Frequency Correction */
|
||||
#define REG_RTC_MODE0_CTRL (0x40001400U) /**< \brief (RTC) MODE0 Control */
|
||||
#define REG_RTC_MODE0_EVCTRL (0x40001404U) /**< \brief (RTC) MODE0 Event Control */
|
||||
#define REG_RTC_MODE0_INTENCLR (0x40001406U) /**< \brief (RTC) MODE0 Interrupt Enable Clear */
|
||||
#define REG_RTC_MODE0_INTENSET (0x40001407U) /**< \brief (RTC) MODE0 Interrupt Enable Set */
|
||||
#define REG_RTC_MODE0_INTFLAG (0x40001408U) /**< \brief (RTC) MODE0 Interrupt Flag Status and Clear */
|
||||
#define REG_RTC_MODE0_COUNT (0x40001410U) /**< \brief (RTC) MODE0 Counter Value */
|
||||
#define REG_RTC_MODE0_COMP0 (0x40001418U) /**< \brief (RTC) MODE0 Compare 0 Value */
|
||||
#define REG_RTC_MODE1_CTRL (0x40001400U) /**< \brief (RTC) MODE1 Control */
|
||||
#define REG_RTC_MODE1_EVCTRL (0x40001404U) /**< \brief (RTC) MODE1 Event Control */
|
||||
#define REG_RTC_MODE1_INTENCLR (0x40001406U) /**< \brief (RTC) MODE1 Interrupt Enable Clear */
|
||||
#define REG_RTC_MODE1_INTENSET (0x40001407U) /**< \brief (RTC) MODE1 Interrupt Enable Set */
|
||||
#define REG_RTC_MODE1_INTFLAG (0x40001408U) /**< \brief (RTC) MODE1 Interrupt Flag Status and Clear */
|
||||
#define REG_RTC_MODE1_COUNT (0x40001410U) /**< \brief (RTC) MODE1 Counter Value */
|
||||
#define REG_RTC_MODE1_PER (0x40001414U) /**< \brief (RTC) MODE1 Counter Period */
|
||||
#define REG_RTC_MODE1_COMP0 (0x40001418U) /**< \brief (RTC) MODE1 Compare 0 Value */
|
||||
#define REG_RTC_MODE1_COMP1 (0x4000141AU) /**< \brief (RTC) MODE1 Compare 1 Value */
|
||||
#define REG_RTC_MODE2_CTRL (0x40001400U) /**< \brief (RTC) MODE2 Control */
|
||||
#define REG_RTC_MODE2_EVCTRL (0x40001404U) /**< \brief (RTC) MODE2 Event Control */
|
||||
#define REG_RTC_MODE2_INTENCLR (0x40001406U) /**< \brief (RTC) MODE2 Interrupt Enable Clear */
|
||||
#define REG_RTC_MODE2_INTENSET (0x40001407U) /**< \brief (RTC) MODE2 Interrupt Enable Set */
|
||||
#define REG_RTC_MODE2_INTFLAG (0x40001408U) /**< \brief (RTC) MODE2 Interrupt Flag Status and Clear */
|
||||
#define REG_RTC_MODE2_CLOCK (0x40001410U) /**< \brief (RTC) MODE2 Clock Value */
|
||||
#define REG_RTC_MODE2_ALARM_ALARM0 (0x40001418U) /**< \brief (RTC) MODE2_ALARM Alarm 0 Value */
|
||||
#define REG_RTC_MODE2_ALARM_MASK0 (0x4000141CU) /**< \brief (RTC) MODE2_ALARM Alarm 0 Mask */
|
||||
#else
|
||||
#define REG_RTC_READREQ (*(RwReg16*)0x40001402U) /**< \brief (RTC) Read Request */
|
||||
#define REG_RTC_STATUS (*(RwReg8 *)0x4000140AU) /**< \brief (RTC) Status */
|
||||
#define REG_RTC_DBGCTRL (*(RwReg8 *)0x4000140BU) /**< \brief (RTC) Debug Control */
|
||||
#define REG_RTC_FREQCORR (*(RwReg8 *)0x4000140CU) /**< \brief (RTC) Frequency Correction */
|
||||
#define REG_RTC_MODE0_CTRL (*(RwReg16*)0x40001400U) /**< \brief (RTC) MODE0 Control */
|
||||
#define REG_RTC_MODE0_EVCTRL (*(RwReg16*)0x40001404U) /**< \brief (RTC) MODE0 Event Control */
|
||||
#define REG_RTC_MODE0_INTENCLR (*(RwReg8 *)0x40001406U) /**< \brief (RTC) MODE0 Interrupt Enable Clear */
|
||||
#define REG_RTC_MODE0_INTENSET (*(RwReg8 *)0x40001407U) /**< \brief (RTC) MODE0 Interrupt Enable Set */
|
||||
#define REG_RTC_MODE0_INTFLAG (*(RwReg8 *)0x40001408U) /**< \brief (RTC) MODE0 Interrupt Flag Status and Clear */
|
||||
#define REG_RTC_MODE0_COUNT (*(RwReg *)0x40001410U) /**< \brief (RTC) MODE0 Counter Value */
|
||||
#define REG_RTC_MODE0_COMP0 (*(RwReg *)0x40001418U) /**< \brief (RTC) MODE0 Compare 0 Value */
|
||||
#define REG_RTC_MODE1_CTRL (*(RwReg16*)0x40001400U) /**< \brief (RTC) MODE1 Control */
|
||||
#define REG_RTC_MODE1_EVCTRL (*(RwReg16*)0x40001404U) /**< \brief (RTC) MODE1 Event Control */
|
||||
#define REG_RTC_MODE1_INTENCLR (*(RwReg8 *)0x40001406U) /**< \brief (RTC) MODE1 Interrupt Enable Clear */
|
||||
#define REG_RTC_MODE1_INTENSET (*(RwReg8 *)0x40001407U) /**< \brief (RTC) MODE1 Interrupt Enable Set */
|
||||
#define REG_RTC_MODE1_INTFLAG (*(RwReg8 *)0x40001408U) /**< \brief (RTC) MODE1 Interrupt Flag Status and Clear */
|
||||
#define REG_RTC_MODE1_COUNT (*(RwReg16*)0x40001410U) /**< \brief (RTC) MODE1 Counter Value */
|
||||
#define REG_RTC_MODE1_PER (*(RwReg16*)0x40001414U) /**< \brief (RTC) MODE1 Counter Period */
|
||||
#define REG_RTC_MODE1_COMP0 (*(RwReg16*)0x40001418U) /**< \brief (RTC) MODE1 Compare 0 Value */
|
||||
#define REG_RTC_MODE1_COMP1 (*(RwReg16*)0x4000141AU) /**< \brief (RTC) MODE1 Compare 1 Value */
|
||||
#define REG_RTC_MODE2_CTRL (*(RwReg16*)0x40001400U) /**< \brief (RTC) MODE2 Control */
|
||||
#define REG_RTC_MODE2_EVCTRL (*(RwReg16*)0x40001404U) /**< \brief (RTC) MODE2 Event Control */
|
||||
#define REG_RTC_MODE2_INTENCLR (*(RwReg8 *)0x40001406U) /**< \brief (RTC) MODE2 Interrupt Enable Clear */
|
||||
#define REG_RTC_MODE2_INTENSET (*(RwReg8 *)0x40001407U) /**< \brief (RTC) MODE2 Interrupt Enable Set */
|
||||
#define REG_RTC_MODE2_INTFLAG (*(RwReg8 *)0x40001408U) /**< \brief (RTC) MODE2 Interrupt Flag Status and Clear */
|
||||
#define REG_RTC_MODE2_CLOCK (*(RwReg *)0x40001410U) /**< \brief (RTC) MODE2 Clock Value */
|
||||
#define REG_RTC_MODE2_ALARM_ALARM0 (*(RwReg *)0x40001418U) /**< \brief (RTC) MODE2_ALARM Alarm 0 Value */
|
||||
#define REG_RTC_MODE2_ALARM_MASK0 (*(RwReg *)0x4000141CU) /**< \brief (RTC) MODE2_ALARM Alarm 0 Mask */
|
||||
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
|
||||
|
||||
/* ========== Instance parameters for RTC peripheral ========== */
|
||||
#define RTC_ALARM_NUM 1 // Number of Alarms
|
||||
#define RTC_COMP16_NUM 2 // Number of 16-bit Comparators
|
||||
#define RTC_COMP32_NUM 1 // Number of 32-bit Comparators
|
||||
#define RTC_GCLK_ID 4 // Index of Generic Clock
|
||||
#define RTC_NUM_OF_ALARMS 1 // Number of Alarms (obsolete)
|
||||
#define RTC_NUM_OF_COMP16 2 // Number of 16-bit Comparators (obsolete)
|
||||
#define RTC_NUM_OF_COMP32 1 // Number of 32-bit Comparators (obsolete)
|
||||
|
||||
#endif /* _SAMD21_RTC_INSTANCE_ */
|
||||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue