From f45e9572e2c87de00140f9edfb89b06848d51728 Mon Sep 17 00:00:00 2001
From: Jeff Epler <jepler@gmail.com>
Date: Sun, 23 Oct 2022 11:42:11 -0500
Subject: [PATCH] fix build?

---
 Makefile       | 15 ++++++++++-----
 py/minidump.py |  3 +++
 ulp.c          |  8 ++++++--
 ulp.riscv.ld   |  2 +-
 4 files changed, 20 insertions(+), 8 deletions(-)

diff --git a/Makefile b/Makefile
index 59157b9..7a6eebb 100644
--- a/Makefile
+++ b/Makefile
@@ -7,7 +7,8 @@ SOC := esp32s3
 CROSS := riscv32-esp-elf-
 CC := $(CROSS)gcc
 STRIP := $(CROSS)strip
-CFLAGS := -Os -march=rv32imc -mdiv -fdata-sections -ffunction-sections
+CFLAGS := -g -Os -march=rv32imc -mdiv -fdata-sections -ffunction-sections
+#CFLAGS += -fvisibility=hidden
 CFLAGS += -isystem $(IDF_PATH)/components/ulp/ulp_riscv/include/
 CFLAGS += -isystem $(IDF_PATH)/components/soc/$(SOC)/include
 CFLAGS += -isystem $(IDF_PATH)/components/esp_common/include
@@ -18,11 +19,15 @@ endif
 ifeq ($(SOC),esp32s2)
 CFLAGS += -DCONFIG_IDF_TARGET_ESP32S2
 endif
-LDFLAGS := -march=rv32imc --specs=nano.specs --specs=nosys.specs
+ifeq ($(origin USER_CFLAGS),undefined)
+CFLAGS += $(USER_CFLAGS)
+endif
+LDFLAGS := -Wl,-A,elf32-esp32s2ulp -nostdlib --specs=nano.specs --specs=nosys.specs -Wl,--gc-sections
 
 SRCS ?= ulp.c
 SRCS += $(IDF_PATH)/components/ulp/ulp_riscv/ulp_riscv_utils.c
-LDFLAGS += link.ld
+SRCS += $(IDF_PATH)/components/ulp/ulp_riscv/start.S
+LDFLAGS += -Wl,-T,link.ld
 
 
 .PHONY: default
@@ -30,8 +35,8 @@ default: a.out-stripped
 a.out-stripped: a.out
 	$(STRIP) -g -o $@ $<
 
-a.out: $(SRCS) link.ld
-	$(CC) -flto $(CFLAGS) $^ -o $@ $(LDFLAGS)
+a.out: $(SRCS) | link.ld Makefile
+	$(CC) $(CFLAGS) $^ -o $@ $(LDFLAGS)
 
 .PHONY: clean
 clean:
diff --git a/py/minidump.py b/py/minidump.py
index cd22b89..469da30 100755
--- a/py/minidump.py
+++ b/py/minidump.py
@@ -11,4 +11,7 @@ en = sy.entry
 for h in e.iter_headers():
     if h.p_type == PT_LOAD:
         print(f"@{h.p_vaddr:04x}: Load {h.p_filesz} bytes starting at {h.p_offset}")
+        content = e._readat(h.p_offset, 16)
+        print(" ".join(f"{b:02x}" for b in content))
+
 print(f"shared_mem @ 0x{en.st_value:04x} 0x{en.st_size:04x} bytes")
diff --git a/ulp.c b/ulp.c
index de54480..815c4dd 100644
--- a/ulp.c
+++ b/ulp.c
@@ -7,9 +7,13 @@
 #include "ulp_riscv/ulp_riscv_utils.h"
 #include "ulp_riscv/ulp_riscv_gpio.h"
 
+#define EXPORT __attribute__((used,visibility("default")))
 // global variables will be exported as public symbols, visible from main CPU
-__attribute__((used)) uint8_t shared_mem[1024];
-__attribute__((used)) uint16_t shared_mem_len = 1024;
+EXPORT uint8_t shared_mem[1024];
+EXPORT uint16_t shared_mem_len = 1024;
+
+#undef ULP_RISCV_CYCLES_PER_MS
+#define ULP_RISCV_CYCLES_PER_MS (int)(1000*ULP_RISCV_CYCLES_PER_US)
 
 int main (void) {
     shared_mem[0] = 10;
diff --git a/ulp.riscv.ld b/ulp.riscv.ld
index 86e88c8..6075b0d 100644
--- a/ulp.riscv.ld
+++ b/ulp.riscv.ld
@@ -17,7 +17,7 @@ SECTIONS
     . = ORIGIN(ram);
     .text :
     {
-        *start.S.obj(.text.vectors) /* Default reset vector must link to offset 0x0 */
+        *(.text.vectors) /* Default reset vector must link to offset 0x0 */
         *(.text)
         *(.text*)
     } >ram