a9be35c7b3
This change adds a boatload of ROM patches to alter screen base, resolution, words-per-line, and related variables so that MacOS will function correctly with a framebuffer other than 512x342 (which remains the default). The majority of the patches are actually to make ROM-drawn low-level things (such as disc icons, happy/sad Mac icons/crash hexadecimal info) render right and be positioned correctly. This works up to about 800x600; the limiting factor is patching int16 immediates for certain instructions, meaning a ~64KB framebuffer size is the current limit without more work. The Makefile can now take DISP_WIDTH/DISP_HEIGHT parameters to configure a build. There is no support for dynamic switching, or runtime-selected switching.
133 lines
5.5 KiB
C
133 lines
5.5 KiB
C
/*
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* Copyright 2024 Matt Evans
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*
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* Portions of the {READ,WRITE}_{BYTE,WORD,LONG} macros are from
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* Musashi, Copyright 1998-2002 Karl Stenerud.
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation files
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* (the "Software"), to deal in the Software without restriction,
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* including without limitation the rights to use, copy, modify, merge,
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* publish, distribute, sublicense, and/or sell copies of the Software,
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* and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef MACHW_H
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#define MACHW_H
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#include "rom.h"
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#define ROM_ADDR 0x400000 /* Regular base (and 0, when overlay=0 */
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#define RAM_SIZE (1024*UMAC_MEMSIZE)
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#define RAM_HIGH_ADDR 0x600000
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#define PV_SONY_ADDR 0xc00069 /* Magic address for replacement driver PV ops */
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////////////////////////////////////////////////////////////////////////////////
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// RAM accessors
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//
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// This isn't a wonderful place, but RAM access is needed in various files.
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extern uint8_t *_ram_base;
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extern uint8_t *_rom_base;
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static inline uint8_t *ram_get_base(void)
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{
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return _ram_base;
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}
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static inline uint8_t *rom_get_base(void)
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{
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return _rom_base;
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}
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extern int overlay;
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#define ADR24(x) ((x) & 0xffffff)
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/* Let's do it like this:
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*
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* When overlay=1: (reset)
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* - ROM is at 0-0x10_0000 (hm, to 0x40_0000 pretty much) and 0x40_0000-0x50_0000
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* - RAM is at 0x60_0000-0x80_0000
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*
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* When overlay=0:
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* - ROM is at 0x40_0000-0x50_0000
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* - RAM is at 0-0x40_0000
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* - manuals say 0x60_0000-0x80_00000 is "unassigned", but may as well make RAM here too
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*
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* i.e. RAM is 60-80, or !overlay and 0. And ROM is 40-50, or overlay and 0.
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*/
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#define IS_ROM(x) (((ADR24(x) & 0xf00000) == ROM_ADDR) || (overlay && (ADR24(x) & 0xf00000) == 0))
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/* RAM: always at 0x600000-0x7fffff, sometimes at 0 (0 most likely so check first!) */
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#define IS_RAM(x) ((!overlay && ((ADR24(x) & 0xc00000) == 0)) || ((ADR24(x) & 0xe00000) == RAM_HIGH_ADDR))
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/* For regular power-of-two memory sizes, this should resolve to a
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* simple mask (i.e. be fast). For non-Po2 (e.g. a Mac208K), this
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* involves a divide when an access is made off the end of memory.
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* But, that should never happen post-boot.
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*/
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#define CLAMP_RAM_ADDR(x) ((x) >= RAM_SIZE ? (x) % RAM_SIZE : (x))
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#define IS_VIA(x) ((ADR24(x) & 0xe80000) == 0xe80000)
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#define IS_IWM(x) ((ADR24(x) >= 0xdfe1ff) && (ADR24(x) < (0xdfe1ff + 0x2000)))
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#define IS_SCC_RD(x) ((ADR24(x) & 0xf00000) == 0x900000)
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#define IS_SCC_WR(x) ((ADR24(x) & 0xf00000) == 0xb00000)
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#define IS_DUMMY(x) (((ADR24(x) >= 0x800000) && (ADR24(x) < 0x9ffff8)) || ((ADR24(x) & 0xf00000) == 0x500000))
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#define IS_TESTSW(x) (ADR24(x) >= 0xf00000)
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/* Unaligned/BE read/write macros from Mushashi: */
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#define READ_BYTE(BASE, ADDR) (BASE)[ADDR]
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#define READ_WORD(BASE, ADDR) (((BASE)[ADDR]<<8) | \
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(BASE)[(ADDR)+1])
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#define READ_LONG(BASE, ADDR) (((BASE)[ADDR]<<24) | \
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((BASE)[(ADDR)+1]<<16) | \
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((BASE)[(ADDR)+2]<<8) | \
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(BASE)[(ADDR)+3])
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#define READ_WORD_AL(BASE, ADDR) (__builtin_bswap16(*(uint16_t *)&(BASE)[(ADDR)]))
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#define WRITE_BYTE(BASE, ADDR, VAL) do { \
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(BASE)[ADDR] = (VAL)&0xff; \
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} while(0)
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#define WRITE_WORD(BASE, ADDR, VAL) do { \
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(BASE)[ADDR] = ((VAL)>>8) & 0xff; \
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(BASE)[(ADDR)+1] = (VAL)&0xff; \
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} while(0)
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#define WRITE_LONG(BASE, ADDR, VAL) do { \
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(BASE)[ADDR] = ((VAL)>>24) & 0xff; \
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(BASE)[(ADDR)+1] = ((VAL)>>16)&0xff; \
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(BASE)[(ADDR)+2] = ((VAL)>>8)&0xff; \
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(BASE)[(ADDR)+3] = (VAL)&0xff; \
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} while(0)
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/* Specific RAM/ROM access: */
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#define RAM_RD8(addr) READ_BYTE(_ram_base, addr)
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#define RAM_RD16(addr) READ_WORD(_ram_base, addr)
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#define RAM_RD_ALIGNED_BE16(addr) READ_WORD_AL(_ram_base, addr)
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#define RAM_RD32(addr) READ_LONG(_ram_base, addr)
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#define RAM_WR8(addr, val) WRITE_BYTE(_ram_base, addr, val)
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#define RAM_WR16(addr, val) WRITE_WORD(_ram_base, addr, val)
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#define RAM_WR32(addr, val) WRITE_LONG(_ram_base, addr, val)
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#define ROM_RD8(addr) READ_BYTE(_rom_base, addr)
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#define ROM_RD16(addr) READ_WORD(_rom_base, addr)
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#define ROM_RD_ALIGNED_BE16(addr) READ_WORD_AL(_rom_base, addr)
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#define ROM_RD32(addr) READ_LONG(_rom_base, addr)
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#endif
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