I2S: Use 8 MHz oscillator source if 48MHz divider does not fit in 8 bits
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1 changed files with 11 additions and 2 deletions
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@ -398,15 +398,24 @@ void I2SClass::onReceive(void(*function)(void))
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void I2SClass::enableClock(int divider)
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{
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int div = SystemCoreClock / divider;
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int src = GCLK_GENCTRL_SRC_DFLL48M_Val;
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if (div > 255) {
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// divider is too big, use 8 MHz oscillator instead
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div = 8000000 / divider;
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src = GCLK_GENCTRL_SRC_OSC8M_Val;
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}
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// configure the clock divider
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while (GCLK->STATUS.bit.SYNCBUSY);
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GCLK->GENDIV.bit.ID = _clockGenerator;
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GCLK->GENDIV.bit.DIV = SystemCoreClock / divider;
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GCLK->GENDIV.bit.DIV = div;
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// use the DFLL as the source
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while (GCLK->STATUS.bit.SYNCBUSY);
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GCLK->GENCTRL.bit.ID = _clockGenerator;
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GCLK->GENCTRL.bit.SRC = GCLK_GENCTRL_SRC_DFLL48M_Val;
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GCLK->GENCTRL.bit.SRC = src;
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GCLK->GENCTRL.bit.IDC = 1;
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GCLK->GENCTRL.bit.GENEN = 1;
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