Commit graph

4197 commits

Author SHA1 Message Date
Scott Shawcroft
47acffe181
Merge remote-tracking branch 'renesas/support_renesas_ra8_ospi' into circuitpython 2025-01-23 12:46:08 -08:00
Quy Tran
913a137c6a dts: renesas: Add devicetree property for QSPI support on RA6
Add qspi node on Renesas RA6 devicetree to support QSPI flash driver

Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>
2025-01-21 19:33:35 +07:00
Tri Nguyen
99b401dcb6 drivers: flash: Initial support QSPI Flash driver for Renesas RA6
Add QSPI Flash driver supports for Renesas RA6.

Signed-off-by: Tri Nguyen <tri.nguyen.wj@bp.renesas.com>
Signed-off-by: Thao Luong <thao.luong.uw@renesas.com>
2025-01-21 19:33:34 +07:00
Tahsin Mutlugun
50596320d4 drivers: serial: uart_max32: Add async mode support
This commit adds asynchronous mode support to MAX32 UART driver. Each
direction uses a single DMA channel that is assigned in devicetree
configuration.

Asynchronous mode also depends on interrupts to refresh receive
timeouts.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2025-01-21 09:13:34 +01:00
Sven Ginka
4dcaa82537 drivers: gpio: add gpio support for sy1xx
Add gpio support for sensry soc sy1xx.

Signed-off-by: Sven Ginka <s.ginka@sensry.de>
2025-01-21 09:12:55 +01:00
Florian Weber
432c0cdc35 drivers: sensor: mlx90394: added driver
Added driver for Melexis MLX90394 magnetometer.

Signed-off-by: Florian Weber <Florian.Weber@live.de>
2025-01-21 09:12:41 +01:00
Guillaume Ranquet
b52f5cbef9 drivers: gpio: add MAX22017 gpio support
MAX22017 is a DAC with support for 6 GPIOs

Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
2025-01-21 07:07:33 +01:00
Guillaume Ranquet
31510fb3bf drivers: dac: Add support for MAX22017 DAC
The MAX22017 is a two-channel industrial-grade software-configurable
analog output device that can be used in either voltage or current output
mode.

Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
2025-01-21 07:07:33 +01:00
Guillaume Ranquet
e297293a54 drivers: mfd: add MAX22017 DAC/GPIO MFD
The MAX22017 DAC provides two 16 Channel Analog outputs and 6 GPIOs.

Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
2025-01-21 07:07:33 +01:00
Jakub Wasilewski
3a8c954021 boards: antmicro: add support for the Myra SiP Baseboard
Add support for the Antmicro's Myra SiP Baseboard. The board uses
Antmicro's Myra SiP which integrates STM32G491XX MCU and its SoC
configuration.

Signed-off-by: Jakub Wasilewski <jwasilewski@internships.antmicro.com>
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2025-01-20 20:55:37 +01:00
Mulin Chao
e2d4b98782 dts: arm: npcx: Add smb-wui prop. to support wake-up from sleep
Add `smb-wui` property to support wake-up from sleep mode by START
condition when i2c is configured to target mode.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2025-01-20 07:05:48 +01:00
Jilay Pandya
c1151c68a2 dts: bindings: led: replace underscore with hypen
replace underscore with hyphen as per device tree specification

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-01-19 19:22:37 +01:00
Quy Tran
84e49e565d dts: renesas: Add devicetree property for OSPI support on RA8
Add ospi node on Renesas RA8 devicetree to support QSPI flash driver

Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>
2025-01-20 00:07:33 +07:00
Tri Nguyen
cf0531046e drivers: flash: Initial support OSPI flash driver on RA8 boards
Support OSPI flash driver on EK-RA8M1 and EK-RA8D1 with ospi_b
and S28HL512T flash.

Signed-off-by: Tri Nguyen <tri.nguyen.wj@bp.renesas.com>
Signed-off-by: Thao Luong <thao.luong.uw@renesas.com>
2025-01-20 00:07:29 +07:00
Raffael Rostagno
fc8119deed drivers: pwm_led: esp32: Add inverted flag
Add inverted flag to bindings, as pwms field is supposed
to be used by application only.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2025-01-18 02:36:05 +01:00
Dat Nguyen Duy
e72af321d5 drivers: emios_pwm: do not configure period, duty and polarity at boot
Removing period, duty and polarity configuration from
channel devicetree. At boot time, only minimal setup like
pinctrl, prescaler, etc should be initialized. PWM signal
is produced by using pwm_set* API

Also after this change, PWM period, duty are changed at the
next counter period boundary

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2025-01-18 02:32:50 +01:00
Sven Ginka
e50645468c drivers: ethernet: vsc8541: add basic support for phy
add basic support for the microchip vsc8541 model phy.
as first starter, 1000MBit/s mode is implemented.

Signed-off-by: Sven Ginka <s.ginka@sensry.de>
2025-01-17 23:08:14 +01:00
Ibrahim Abdalkader
2a6e5902cc drivers: video: gc2145: Add support for a PWDN pin.
Add support for power-down pin. Some modules require this pin
to enable the power supply.

Signed-off-by: Ibrahim Abdalkader <i.abdalkader@gmail.com>
2025-01-17 16:36:22 +01:00
Krzysztof Chruściński
4abc98edc5 Revert "dts: nordic nrf-timer: Expose max frequency as DT property"
This reverts commit 0ecfac663d.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-01-17 09:07:58 +01:00
Qiang Zhang
85aff8385f dts: arm/nxp/mcxn94x: Add sai nodes for NXP mcxn94x
Add sai nodes for NXP mcxn94x

Signed-off-by: Qiang Zhang <qiang.zhang_6@nxp.com>
2025-01-17 02:13:01 +01:00
Qiang Zhang
cbb6c2886a drivers: drivers/i2s: fix sai issue for support frdm_mcxn497
i2s driver have not suooprt frdm_mcxn947 pll clk set.
  so add macro CONFIG_I2S_HAS_PLL_SETTING to control pll init.

Signed-off-by: Qiang Zhang <qiang.zhang_6@nxp.com>
2025-01-17 02:13:01 +01:00
Parthiban Veerasooran
7cfa5bf6cf drivers: mdio: lan865x: add mdio driver support
Implement lan865x mdio driver to provide interface between lan865x MAC
driver and internal PHY driver phy_microchip_t1s.c. This driver is needed
to support the driver architecture followed.

Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>
2025-01-16 22:45:03 +01:00
Parthiban Veerasooran
0b87a5469c drivers: ethernet: lan865x: remove internal PHY specific initialization
Remove internal PHY initialization part as the phy_microchip_t1s.c
driver will do the internal PHY initialization.

Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>
2025-01-16 22:45:03 +01:00
Parthiban Veerasooran
36c7feccf9 drivers: ethernet: phy: Add Microchip's LAN865X Rev.B0/B1 PHY support
Add support for LAN8650/1 Rev.B1. As per the latest configuration note
AN1760 released (Revision F (DS60001760G - June 2024)) for Rev.B0 is also
applicable for Rev.B1. Refer hardware revisions list in the latest AN1760
Revision F (DS60001760G - June 2024).
https://www.microchip.com/en-us/application-notes/an1760

Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>
2025-01-16 22:45:03 +01:00
Yishai Jaffe
62ea40bb9e drivers: spi: silabs: remove gecko from name
Gecko is being phased out so we changed every mention of gecko in the
silabs spi drivers

Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
2025-01-16 22:43:59 +01:00
Yishai Jaffe
1cbd13cd0e drivers: serial: uart_gecko: support uart_cfg options
Adde usage of uart_cfg struct and support its options of parity, data
bits, and start bits

Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
2025-01-16 22:38:15 +01:00
Andy Ross
2363b6b595 soc/mediatek: Add DTS binding and definitions for AFE
Add a DTS binding for the MediaTek Audio Front End device, and
definitions for the in-tree devices.

These .dts files were auto-generated from pre-existing SOF code (that
defined the devices as C structs) using a tool currently being
submitted in the SOF tree, thus are included here as separate files.
The expectation is that future variants will be authored in this
format directly.  Longer term we can move them directly into the core
board DTS.

Signed-off-by: Andy Ross <andyross@google.com>
2025-01-16 22:38:04 +01:00
Benjamin Geiger
c2cf52a213 dts: bindings: bluetooth: cyw43xxx: Add bt_hci_uart binding layer to desc
Add zephyr,bt-hci-uart binding to the CYW43xxx device tree example to
properly implement Zephyr's HCI UART abstraction layer.

Signed-off-by: Benjamin Geiger <BenjaminGeiger1@gmail.com>
2025-01-16 22:37:52 +01:00
Yishai Jaffe
d5c0d7acdd drivers: serial: gecko: add new driver UART communication via EUSART
Added a new driver to support UART communication via EUSART.

Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
2025-01-16 22:37:40 +01:00
Wajdi ELMuhtadi
01d9861d71 drivers: sensor: wsen_pdus_25131308XXXXX: add sensor driver
Add wsen_pdus_25131308XXXXX driver with
the corrected name and compatibility with
the hal update as well as added new features..

Signed-off-by: Wajdi ELMuhtadi <wajdi.elmuhtadi@we-online.com>
2025-01-16 22:35:47 +01:00
Jilay Pandya
f2f195de55 dts: bindings: i2s: replace underscore with hyphen
replace underscore with hyphen as per device tree specification

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-01-15 19:06:06 +01:00
James Roy
05599f74be dts: bindings: usb: Change the property names in the DTS
Change the property names in the bindings and DTS
to use hyphens(-) for separation instead of underscores(_).

Signed-off-by: James Roy <rruuaanng@outlook.com>
2025-01-15 19:05:54 +01:00
Yishai Jaffe
0df6736bb9 drivers: serial: define default values for basic options
Defined default values for baudrate, parity, stop bits, and data bits.
This removes complexity and obfuscation from the code.

Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
2025-01-15 19:04:56 +01:00
Pierrick Curt
8250cc68b7 drivers: adc: ad4114: add driver support
The AD4114 is a low power, low noise, 24-bit, sigma-delta ADC.
This driver allows to use it with the Zephyr ADC API. It uses
the continuous acquisition ADC feature.

This ADC allows many configutations, but this driver uses it as the
most generic way :
- each can channel can be enable or disable using the device
tree configuration
- configure two setups (one for unipolar inputs, one for bipolar inputs)
- use an external clock

Signed-off-by: Pierrick Curt <pierrickcurt@gmail.com>
2025-01-15 19:04:20 +01:00
Jianxiong Gu
391008b097 drivers: tcpc: Add TCPC driver for RT1715
Add support for RT1715.

Signed-off-by: Jianxiong Gu <jianxiong.gu@outlook.com>
2025-01-15 19:03:27 +01:00
Yangbo Lu
7c57fec0d0 drivers: firmware: scmi: add power domain protocol
Added helpers for ARM SCMI power dmomain protocol.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-01-15 19:03:00 +01:00
Jianxiong Gu
4e201f21c8 dts: riscv: include riscv,cpus.yaml in qingke-v2
This commit updates the qingke-v2 binding to include `riscv,cpus.yaml`
instead of `cpu.yaml`.

Signed-off-by: Jianxiong Gu <jianxiong.gu@outlook.com>
2025-01-15 11:58:58 +01:00
Jilay Pandya
c5aed65a54 dts: bindings: gpio: use hyphens instead of underscore
replace underscore with hyphens to comply with device tree spec

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-01-15 11:51:33 +01:00
James Roy
32e42856bc dts: bindings: display: Change the property names in the overlay
Unify property names in bindings and overlay, using
hyphens (-) instead of underscores (_) as separators.

Signed-off-by: James Roy <rruuaanng@outlook.com>
2025-01-15 11:51:23 +01:00
Jilay Pandya
ef8cb37cd2 dts: bindings: sdhc: replace underscore with hyphen
Adhering to device tree spec, underscore is replaced with hyphen

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-01-15 01:37:45 +01:00
Gerson Fernando Budke
ea7922195b clocks: atmel: sam0: Fix gclk and mclk clock bindings
The Atmel SAM0 SoC enable peripherals clocks in distinct places: PM and
MCLK. The old devices had defined the peripheral clock enable bit at PM.
On the newer devices this was extracted on a dedicated memory section
called Master Clock (MCLK). This change excludes the dedicated bindings
in favor of a generic approach that cover all cases.

Now the clocks properties is complemented by the atmel,assigned-clocks
property. It gives the liberty to user to customize the clock source
from a generic clock or configure the direct connections.

All peripherals drivers were reworked with the newer solution.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2025-01-14 20:49:03 +01:00
Gerson Fernando Budke
ecd0267508 dts: clock: Add atmel,assigned-clock property
Some platforms require special clock selection options. This could be
made using the already defined assigned-clocks from Linux clocks.

  See 93ee800895/dtschema/schemas/clock/clock.yaml (L24)

This introduces the vendor atmel,assigned-clocks and
atmel,assigned-clock-names properties to generalize those conditions
in Zephyr for Atmel sam0 SoC series.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2025-01-14 20:49:03 +01:00
Tom Chang
54a714a61d dts: flash: npcx: add property for SPI device size
This commit adds two properties. One is used to set size of the low
flash device and the other is used to select the low flash device. Then,
the eSPI TAF request can access between two flash devices base on this
setting.

Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
2025-01-14 17:57:50 +01:00
Lucien Zhao
87e4db9b86 drivers: gpio: update gpio_mcux.c driver
update gpio driver to adapt rt7xx gpio model:
1. There is no PORT_Type on RT7xx,so set PORT_Type as void
2. Add port_no parameter in gpio_mcux_config to adapt IOPCTL driver
3. Add gpio-port-offest parameter in blinding, it will help map the
   relation between index n and gpio port when some soc have domain
   access attribution.
3. Splite gpio_mcux_configure function into two functions(
   gpio_mcux_iopctl_configure and gpio_mcux_port_configure)
   according to CONFIG_PINCTRL_NXP_IOCON macro
4. Add code to adapt RT700 GPIO attribute configuration

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-01-14 17:56:53 +01:00
Lucien Zhao
1aa49ae28f dts: bindings: add the first version binding for nxp,xspi IP
add nxp,xspi-device.yaml
add nxp,xspi-mx25um51345g.yaml
add nxp,xspi.yaml

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-01-14 17:56:53 +01:00
Tim Lin
7114989c4e dts: mfd: it8801: Require irq-gpios to prevent driver crashes
Marked the irq-gpios property as "required: true" in the yaml file.
This ensures that the property is always defined in the device tree,
preventing the driver from crashing when irq-gpios is missing.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-01-14 17:55:51 +01:00
James Roy
d1b782e5b3 dts: bindings: counter: Change the property names in the overlay
Rename the following properties in binding and overlay:
-- primary_source => primary-source
-- secondary_source => secondary-source
-- filter_count => filter-count
-- filter_period => filter-period

Signed-off-by: James Roy <rruuaanng@outlook.com>
2025-01-14 13:24:14 +01:00
Lucien Zhao
605ade6bc4 drivers: dma: dma_mcux_edma: support EDMA IP in edma drivers
Multi channels share one IRQ, add channels-shared-irq-mask on RT1180
attribution to describe the channel shared status, and add code
implementation to register the handler function for each channel
in different interrupts.

Fix legacy building warning issue

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-01-13 10:08:36 +01:00
Minh Hoang
0b5e17f69b drivers: entropy: Add support for SCE9 to entropy driver
add support SCE9 to entropy driver for Renesas RA

Signed-off-by: Minh Hoang <minh.hoang.wm@bp.renesas.com>
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2025-01-13 08:44:53 +01:00
Henrik Brix Andersen
8998b1a78b dts: bindings: can: infineon: xmc4xxx: rename clock_div8 to clock-div8
Rename the Infineon XMC4xxx CAN node devicetree property clock_div8 to
clock-div8 (prefering hyphens over underscores to separate devicetree
property names).

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2025-01-10 21:08:31 +01:00