Andrew Davis 87a5410584 soc: ti_k3: Add TI J722s SoC MCU R5 ... Add initial SoC support for the TI J722s SoC series MCU-domain Cortex-R5 core. TRM for J722s: https://www.ti.com/lit/zip/sprujb3 Signed-off-by: Andrew Davis <afd@ti.com>		2025-01-16 22:35:57 +01:00
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am62x_m4.dtsi	dts: arm: ti: am62x_m4: Remove address-cells from gpio	2024-04-24 15:56:01 -04:00
am64x_m4.dtsi	dts: arm: ti: Add dtsi for AM64x M4	2024-04-24 15:56:01 -04:00
cc13xx_cc26xx.dtsi	drivers: cc13xx_cc26xx: pwm: Fix building blinky_pwm	2024-06-05 04:24:38 -07:00
cc32xx.dtsi
cc1352r.dtsi
cc1352r7.dtsi
cc2652r.dtsi
cc3220sf.dtsi
cc3235sf.dtsi
j721e_main_r5.dtsi	boards: beagle: Enable I2C6 on BeagleBone AI64 board	2025-01-09 23:26:23 +01:00
j722s_main.dtsi	soc: ti_k3: Add TI J722s SoC MAIN R5	2025-01-16 22:35:57 +01:00
j722s_main_r5.dtsi	soc: ti_k3: Add TI J722s SoC MCU R5	2025-01-16 22:35:57 +01:00
j722s_mcu.dtsi	soc: ti_k3: Add TI J722s SoC MCU R5	2025-01-16 22:35:57 +01:00
j722s_mcu_r5.dtsi	soc: ti_k3: Add TI J722s SoC MCU R5	2025-01-16 22:35:57 +01:00
lm3s6965.dtsi
msp432p4xx.dtsi
msp432p401r.dtsi