zephyr/dts/arm/ti
Vaishnav Achath 2480197b66 dts: arm: ti: am62x_m4: Add mailbox nodes
Add TI OMAP interprocessor mailbox nodes for AM62X M4,
the user ID assignment is as per thec corresponding mailbox
interrupt assignment for the core.

More details can be found in the device TRM Mailbox section:
https://www.ti.com/lit/ug/spruiv7a/spruiv7a.pdf

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
2025-01-23 16:34:39 +01:00
..
am62x_m4.dtsi dts: arm: ti: am62x_m4: Add mailbox nodes 2025-01-23 16:34:39 +01:00
am64x_m4.dtsi dts: arm: ti: Add dtsi for AM64x M4 2024-04-24 15:56:01 -04:00
cc13xx_cc26xx.dtsi drivers: cc13xx_cc26xx: pwm: Fix building blinky_pwm 2024-06-05 04:24:38 -07:00
cc32xx.dtsi drivers: pinctrl: add TI CC32XX driver 2023-06-17 07:55:43 -04:00
cc1352r.dtsi soc: ti: cc13/26xx: clean up include hierarchy 2023-07-07 18:46:24 -04:00
cc1352r7.dtsi soc: ti: cc13/26xx: clean up include hierarchy 2023-07-07 18:46:24 -04:00
cc2652r.dtsi soc: ti: cc13/26xx: clean up include hierarchy 2023-07-07 18:46:24 -04:00
cc3220sf.dtsi dts: arm: ti: Remove label property from devicetrees 2022-08-01 17:59:45 +02:00
cc3235sf.dtsi dts: arm: ti: Remove label property from devicetrees 2022-08-01 17:59:45 +02:00
j721e_main_r5.dtsi boards: beagle: Enable I2C6 on BeagleBone AI64 board 2025-01-09 23:26:23 +01:00
j722s_main.dtsi soc: ti_k3: Add TI J722s SoC MAIN R5 2025-01-16 22:35:57 +01:00
j722s_main_r5.dtsi soc: ti_k3: Add TI J722s SoC MCU R5 2025-01-16 22:35:57 +01:00
j722s_mcu.dtsi soc: ti_k3: Add TI J722s SoC MCU R5 2025-01-16 22:35:57 +01:00
j722s_mcu_r5.dtsi soc: ti_k3: Add TI J722s SoC MCU R5 2025-01-16 22:35:57 +01:00
lm3s6965.dtsi dts: arm: ti: Remove label property from devicetrees 2022-08-01 17:59:45 +02:00
msp432p4xx.dtsi dts: arm: ti: Remove label property from devicetrees 2022-08-01 17:59:45 +02:00
msp432p401r.dtsi