Fixes the CMake Warning on build/zephyr/zephyr.dts:
Warning (spi_bus_bridge): /soc/octospi@52005000: node name
for SPI buses should be 'spi'
<stdout>: Warning (spi_bus_reg): Failed prerequisite 'spi_bus_bridge'
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add clock source to timers which indicates maximum frequency of
the timer instance.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
i2s driver have not suooprt frdm_mcxn947 pll clk set.
so add macro CONFIG_I2S_HAS_PLL_SETTING to control pll init.
Signed-off-by: Qiang Zhang <qiang.zhang_6@nxp.com>
Implement lan865x mdio driver to provide interface between lan865x MAC
driver and internal PHY driver phy_microchip_t1s.c. This driver is needed
to support the driver architecture followed.
Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>
Remove internal PHY initialization part as the phy_microchip_t1s.c
driver will do the internal PHY initialization.
Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>
Add support for LAN8650/1 Rev.B1. As per the latest configuration note
AN1760 released (Revision F (DS60001760G - June 2024)) for Rev.B0 is also
applicable for Rev.B1. Refer hardware revisions list in the latest AN1760
Revision F (DS60001760G - June 2024).
https://www.microchip.com/en-us/application-notes/an1760
Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>
Add a DTS binding for the MediaTek Audio Front End device, and
definitions for the in-tree devices.
These .dts files were auto-generated from pre-existing SOF code (that
defined the devices as C structs) using a tool currently being
submitted in the SOF tree, thus are included here as separate files.
The expectation is that future variants will be authored in this
format directly. Longer term we can move them directly into the core
board DTS.
Signed-off-by: Andy Ross <andyross@google.com>
Add zephyr,bt-hci-uart binding to the CYW43xxx device tree example to
properly implement Zephyr's HCI UART abstraction layer.
Signed-off-by: Benjamin Geiger <BenjaminGeiger1@gmail.com>
Add initial SoC support for the TI J722s SoC series MCU-domain
Cortex-R5 core.
TRM for J722s: https://www.ti.com/lit/zip/sprujb3
Signed-off-by: Andrew Davis <afd@ti.com>
Add initial SoC support for the TI J722s SoC series MAIN-domain
Cortex-R5 core.
TRM for J722s: https://www.ti.com/lit/zip/sprujb3
Signed-off-by: Andrew Davis <afd@ti.com>
Add wsen_pdus_25131308XXXXX driver with
the corrected name and compatibility with
the hal update as well as added new features..
Signed-off-by: Wajdi ELMuhtadi <wajdi.elmuhtadi@we-online.com>
Change the property names in the bindings and DTS
to use hyphens(-) for separation instead of underscores(_).
Signed-off-by: James Roy <rruuaanng@outlook.com>
Defined default values for baudrate, parity, stop bits, and data bits.
This removes complexity and obfuscation from the code.
Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
This commit adds MBOX device tree entry for MCXN947.
Adds support for MCXN in NXP ipm and mbox drivers.
Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
The AD4114 is a low power, low noise, 24-bit, sigma-delta ADC.
This driver allows to use it with the Zephyr ADC API. It uses
the continuous acquisition ADC feature.
This ADC allows many configutations, but this driver uses it as the
most generic way :
- each can channel can be enable or disable using the device
tree configuration
- configure two setups (one for unipolar inputs, one for bipolar inputs)
- use an external clock
Signed-off-by: Pierrick Curt <pierrickcurt@gmail.com>
The CH32V003 belongs to the CH32V0 series. To improve code organization
and maintainability, all related files should be grouped together in a
dedicated subdirectory.
Signed-off-by: Jianxiong Gu <jianxiong.gu@outlook.com>
Unify property names in bindings and overlay, using
hyphens (-) instead of underscores (_) as separators.
Signed-off-by: James Roy <rruuaanng@outlook.com>
Move the Atmel SAM E70/V71 DMA PERIDs header file to
include/zephyr/dt-bindings/dma and unify it for use with the entire product
family (SAM E70/S70/V70/V71).
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Synchronize the Atmel SAM E70/V71 DMA Peripheral Hardware Requests HW
Interface Numbers and adjust them to match those listed in the SAM
E70/S70/V70/V71 datasheet.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Sort the Atmel SAMx7x periheral devicetree nodes according to their address
in the memory map.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The Atmel SAM0 SoC enable peripherals clocks in distinct places: PM and
MCLK. The old devices had defined the peripheral clock enable bit at PM.
On the newer devices this was extracted on a dedicated memory section
called Master Clock (MCLK). This change excludes the dedicated bindings
in favor of a generic approach that cover all cases.
Now the clocks properties is complemented by the atmel,assigned-clocks
property. It gives the liberty to user to customize the clock source
from a generic clock or configure the direct connections.
All peripherals drivers were reworked with the newer solution.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Some platforms require special clock selection options. This could be
made using the already defined assigned-clocks from Linux clocks.
See 93ee800895/dtschema/schemas/clock/clock.yaml (L24)
This introduces the vendor atmel,assigned-clocks and
atmel,assigned-clock-names properties to generalize those conditions
in Zephyr for Atmel sam0 SoC series.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This commit adds two properties. One is used to set size of the low
flash device and the other is used to select the low flash device. Then,
the eSPI TAF request can access between two flash devices base on this
setting.
Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
update gpio driver to adapt rt7xx gpio model:
1. There is no PORT_Type on RT7xx,so set PORT_Type as void
2. Add port_no parameter in gpio_mcux_config to adapt IOPCTL driver
3. Add gpio-port-offest parameter in blinding, it will help map the
relation between index n and gpio port when some soc have domain
access attribution.
3. Splite gpio_mcux_configure function into two functions(
gpio_mcux_iopctl_configure and gpio_mcux_port_configure)
according to CONFIG_PINCTRL_NXP_IOCON macro
4. Add code to adapt RT700 GPIO attribute configuration
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Marked the irq-gpios property as "required: true" in the yaml file.
This ensures that the property is always defined in the device tree,
preventing the driver from crashing when irq-gpios is missing.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Relocate the `power-states` node from under the `soc` node to
the `cpus` node, making it consistent with other STM32 SoC series.
This resolves the device-tree warning:
(simple_bus_reg): /soc/power-states: missing or empty reg/ranges property.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Rename the following properties in binding and overlay:
-- primary_source => primary-source
-- secondary_source => secondary-source
-- filter_count => filter-count
-- filter_period => filter-period
Signed-off-by: James Roy <rruuaanng@outlook.com>
Multi channels share one IRQ, add channels-shared-irq-mask on RT1180
attribution to describe the channel shared status, and add code
implementation to register the handler function for each channel
in different interrupts.
Fix legacy building warning issue
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
add support SCE9 to entropy driver for Renesas RA
Signed-off-by: Minh Hoang <minh.hoang.wm@bp.renesas.com>
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
