Since "JLink.exe" is also an executable distributed with JDK's, do an
explicit search on the standard SEGGER install directories for a JTAG
"JLink.exe" before falling back to whatever is first on PATH.
Fixes#51825.
Signed-off-by: Jordan Yates <jordan@embeint.com>
After writing option bytes, force them to be loaded. Failing to perform
this step means the values are never applied and not actually written
to non-volatile memory.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Fixes issue #83555, where UART transmit operations fail in Zephyr
sysbuild projects using MCUboot and the asynchronous UART API
(`CONFIG_UART_ASYNC_API=y`) on SAM0 devices such as the
ATSAMC21G18A.
The issue occurs because the DMA controller is not reset during
initialization, causing `BASEADDR` and `WRBADDR` registers to retain
MCUboot's configuration. This prevents the application from reconfiguring
these registers to its own RAM addresses, leading to UART transmit
timeouts and triggering the `UART_TX_ABORTED` callback.
This patch resolves the issue by resetting the DMA controller during
initialization in `dma_sam0.c`. The following actions are performed:
- Disables the DMA and CRC modules.
- Applies a software reset to ensure a clean state for reconfiguration.
With this change, UART transmit operations work as expected, improving
stability and compatibility between MCUboot and the application.
Signed-off-by: Tristen Pierson <tpierson@electrohire.com>
Refactor the devicetree files for the Atmel SAM E70 and SAM V71 product
series. These SoCs are part of a larger product family (SAM
E70/S70/V70/V71) and share a common set of peripherals.
Introduce a base samx7x.dtsi for all members of the family, containing the
union of all supported peripherals. Specific product series can use
/delete-node/ in their DTSI (e.g. same70.dtsi) for removing peripherals not
present in that product series.
Replace pin-count-specific DTSI files (e.g. same70q19b.dtsi) with
pin-count-agnostic DTSI files (e.g. same70x19b.dtsi) as the pin-count is
not taken into account in these anyways, and adjust the relevant board
devicetrees accordingly.
As part of this refactoring, introduce support for the missing flash memory
density variants of the SAM E70 product series.
Support for the two remaining product series (SAM S70/V70) is not part of
this refactoring as these will require further changes to the SoC support
code (soc/atmel/sam/).
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
qemu_x86/atom was failing tests/posix/fs in
test_fs_readdir_threadsafe for some reason and only for that
platform.
All other platforms pass the testsuite properly with the dirent
declared on the stack.
Declare the dirent object statically so that qemu_x86/atom will
pass test cases.
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
DIR is a POSIX type defined via the dirent.h header.
In Zephyr, we define it as `typedef void DIR`, since it is only
ever described via a pointer (much like `FILE`).
However, in checkpatch.pl, functions that return DIR* or accept
a DIR* argument are met with an error of the form below:
```
ERROR:SPACING: need consistent spacing around '*' (ctx:WxV)
```
Examples that trigger this false positive are, for example
```cpp
int dirfd(DIR *dirp);
DIR *fdopendir(int fd);
```
Include `DIR` as a class of specific POSIX types that should be
matched as types rather than other tokens.
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
Declare _POSIX_C_SOURCE in a consistent way for both the
posix/options library as well as the tests/posix/fs
testsuite.
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
The heap and stack are now consistent with other ESP32-C3 boards in
tree. This is necessary for Bluetooth to not crash on boot.
Signed-off-by: Xudong Zheng <7pkvm5aw@slicealias.com>
This is a squash of all the groundwork needed to
get a functioning driver for the DS3231 with the RTC API.
Signed-off-by: Gergo Vari <work@gergovari.com>
If a time-intensive task (like coredump storage over logging interface)
is run in the task watchdog callback, the hardware watchdog might
reset the system before the task finishes.
Increasing the delay from 1s to 10s, which should be sufficient for any
use case.
Signed-off-by: Martin Jäger <martin@libre.solar>
Add CONFIG_SECOND_CORE_MCUX_LAUNCHER. This Kconfig is only enabled when
using sysbuild targeting the Cortex-M4 core on the RT11xx series, and
results in loading a minimal application to the Cortex-M7 core that
boots the Cortex-M4 core. This makes developing on the M4 core simpler,
as the user can now simply target the core with sysbuild enabled and
flashing the application will work as expected.
Signed-off-by: Daniel DeGrasse <daniel@degrasse.com>
OCRAM region in Cortex-M4 memory map at 0x2020_0000 is simply an alias
to the M4 TCM at 0x1FFE_0000, which the zephyr,flash node was previously
set to. Using this base address for OCRAM allows the base address to
match the one used in the M7 memory map, which simplifies loading the M4
image from flash into RAM in the M7 init routine
Signed-off-by: Daniel DeGrasse <daniel@degrasse.com>
Since commit bda8ae8c3f ("drivers: clock_control: silabs: Add clock
control driver"), clock configuration is defined in Device Tree.
We can drop now unused configurations existing in board definitions.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
Silabs Series-2 (all the EFR32xg2x chips) use the new clock driver
introduced in commit bda8ae8c3f ("drivers: clock_control: silabs: Add
clock control driver"). This driver get all the configuration from the
Device Tree.
The CMU (Clock Management Unit) options (CMU_HFXO_FREQ, CMU_HFRCO_FREQ,
CMU_NEED_LFXO, CMU_HFCLK_HFXO, etc...) are now only used for Series-0
and Series-1. It does not make sense to bother the users with them.
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
It would time out when run on-device due to the NVS setting backend being
incredibly slow once enough entries exist.
Also, rename the tests which use different store implementations to make
that explicit.
Fixes https://github.com/zephyrproject-rtos/zephyr/issues/83210.
Signed-off-by: Tomi Fontanilles <tomi.fontanilles@nordicsemi.no>
Although I/DCACHE aren't included under cm33 architecture,
NXP design and integrate Code Cache/Sys Cache for cm33 to
speed up the core execution efficiency.
For the convenience of developers, we believe that software
developers can directly use Code/Sys Cache as arm's I/D Cache.
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Gives a hint to the compiler that the bail-out paths in both
k_thread_suspend() and k_thread_resume() are unlikely events.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Even though calculating the priority queue index in the priority
multiq is quick, caching it allows us to extract an extra 2% in
terms of performance as measured by the thread_metric cooperative
benchmark.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Adds customized yield implementations based upon the selected
scheduler (dumb, multiq or scalable). Although each follows the
same broad outline, some of them allow for additional tweaking
to extract maximal performance. For example, the multiq variant
improves the performance of k_yield() by about 20%.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Dequeuing from a doubly linked list is similar to removing an item
except that it does not re-initialize the dequeued node.
This comes in handy when sorting a doubly linked list (where the
node gets removed and re-added). In that circumstance, re-initializing
the node is required. Furthermore, the compiler does not always
'understand' this. Thus, when performance is critical, dequeuing
may be preferred to removing.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Minor cleanups include ...
1. Eliminating unnecessary if-defs and forward declarations
2. Co-locating routines of the same queue type
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
If no PCI device with DSP capability is reported, also try to
find compatible devices using PCI_CLASS=40300. This is mostly
useful on preproduction systems where incorrect PCI class data
is reported.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
first check if the chip has a hosh module to futher filter MAC addresses
if not then enabling the pass through for all multicast protocols
Signed-off-by: Adib Taraben <theadib@gmail.com>
I will be working on non-bluetooth topics, so removing myself as a
maintainer for the bluetooth groups
Signed-off-by: Andries Kruithof <andries.kruithof@nordicsemi.no>
The commit changes requirements for stream_flash_init, where size
can no longer be 0 and has to be explicitly set, to avoid situation
where size autodetection, invoked by size == 0, would miss changes in
layout and silently allow overflow of Stream Flash into other partitions.
There has also been new Kconfig option CONFIG_STREAM_FLASH_INSPECT,
set to y by default to keep legacy behaviour, that can be used to turn
off stream_flash_ctx vs device inspection, allowing user to shed
inspection code once it is not useful anymore.
Fixes: #71042
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Add new test sample.sensor.thermometer_i3c, can't assign the same
platform with i2c, and i3c at the same time.
Support the shield on FRDM_MCXN236 board by I2C and I3C way.
Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
Replaced incorrect rst link references in the description
of traversing ancestor nodes, along with some conflicting
descriptions.
Signed-off-by: James Roy <rruuaanng@outlook.com>
Add the cmake files for running static code analysis with the Polyspace
tools in the west build. The analysis leverages the compilation database.
Options for the analysis are documented in doc/develop/sca/polyspace.rst.
Analysis results are printed as command line output and provided as CSV.
Manually tested on v4.0.0 with various sample applications.
Signed-off-by: Martin Becker <mbecker@mathworks.com>
