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10 commits

Author SHA1 Message Date
Adrian Bieri
03fa6a0c33 mcux: drivers: xbara: drop HAS_MCUX_XBARA config
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The HAS_MCUX_XBARA is replaced by the DT_HAS_NXP_MCUX_XBAR_ENABLED

Signed-off-by: Adrian Bieri <adrian.bieri@loepfe.com>
2025-01-23 19:25:54 +01:00
Mathias Landolt
96146d5740 mcux: drivers: xbarb: add XBARB config option
Add the possibility to activate the XBARB driver
Update NXP HAL revision to include support for xbarb

Signed-off-by: Mathias Landolt <mathias.landolt@loepfe.com>
Signed-off-by: Adrian Bieri <adrian.bieri@loepfe.com>
2025-01-23 19:25:54 +01:00
Dominik Ermel
49f5598835 Bluetooth: Mesh: Improve logic for serving devices erase capabilities
The commit fixes issue where flash_area_flatten has been used where
code was only supposed to erase devices by hardware requirement prior
to write, by replacing the call with flash_area_erase and supporting
logic to select proper path.
There have been following Kconfig options added:
 - CONFIG_BT_MESH_BLOB_IO_FLASH_WITHOUT_ERASE
 - CONFIG_BT_MESH_BLOB_IO_FLASH_WITH_ERASE
that are available for user depending on devices in the system and allow
to turn off paths that are not used by BLOB IO; for example if user
never writes to device with erase CONFIG_BT_MESH_BLOB_IO_FLASH_WITH_ERASE
will disable the path.
Both Kconfig options are y by default and enable all paths.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
2025-01-23 19:25:27 +01:00
Geoffrey Hunter
fa795f4912 lib: smf: Fix handled bug causing events to not propagate.
When using the SMF for a project discovered that events would sometimes
 not propagate to parent states correctly. Could not create a minimum
reproducable test case for this, but it was found that these changes fixed
the bug. This commit creates a new function to reset internal state,
which is called on entry to smf_set_initial() and smf_set_state().

Closes #81300.

Signed-off-by: Geoffrey Hunter <gbmhunter@gmail.com>
2025-01-23 19:24:08 +01:00
Bastien Beauchamp
1e75491cdb dts: arm: silabs: Remove exit latency and min residency on Silabs S2 SoCs
The exit latency and min residency is handled by sl_power_manager.
This improve power consumption by letting the device sleep longer.

Signed-off-by: Bastien Beauchamp <bastien.beauchamp@silabs.com>
2025-01-23 19:23:27 +01:00
Bastien Beauchamp
ec1a2c6f47 soc: silabs: Fix the PRIMASK for Silabs S2 SoCs
sl_power_manager_sleep() doesn't expect the PRIMASK to be set when called.
Setting BASEPRI to 0 was moved to sl_power_manager_is_ok_to_sleep(),
this function is called after sl_power_manager_sleep() has set the PRIMASK.
Added sli_power_manager_on_wakeup() to force a clock restore before the
interrupt are handled. Added a call to retrieve the startup measurements,
reducing the early wakeup time.

Signed-off-by: Bastien Beauchamp <bastien.beauchamp@silabs.com>
2025-01-23 19:23:27 +01:00
Bastien Beauchamp
19756be822 soc: silabs: Fix double WFI for Silabs S2 SoCs
k_cpu_idle() and sl_power_manager_sleep() call WFI.
Remove the call to k_cpu_idle() and add back its tracing and
hook functions.

Signed-off-by: Bastien Beauchamp <bastien.beauchamp@silabs.com>
2025-01-23 19:23:27 +01:00
Bastien Beauchamp
d163d4268e soc: silabs: Fix EM4 enter for Silabs S2 SoCs
Fix PM_STATE_SOFT_OFF to properly enter EM4.

Signed-off-by: Bastien Beauchamp <bastien.beauchamp@silabs.com>
2025-01-23 19:23:27 +01:00
Khaoula Bidani
6fd8a453d9 boards: st: doc: clean up mbed and IDEs mentions
Clean up mbed and IDEs mentions of the st boards.

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
2025-01-23 19:23:09 +01:00
Dmitrii Golovanov
aa705089d3 twister: reporting: Add custom JSON encoder
Refactor Reporting to use custom ReportingJSONEncoder and encode
all pathlib.Path derived instances there which are possible
e.g. in 'environment.options' received from command line.

Fixes: #83823

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2025-01-23 19:22:40 +01:00
25 changed files with 158 additions and 151 deletions

View file

@ -29,7 +29,6 @@ Nucleo F030R8 provides the following hardware components:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@ -50,11 +49,6 @@ Nucleo F030R8 provides the following hardware components:
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32F030R8 can be found here:

View file

@ -29,7 +29,6 @@ Nucleo F070RB provides the following hardware components:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@ -50,11 +49,6 @@ Nucleo F070RB provides the following hardware components:
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32F070RB can be found in
the `STM32F070 reference manual`_ .

View file

@ -29,7 +29,6 @@ Nucleo F091RC provides the following hardware components:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@ -50,11 +49,6 @@ Nucleo F091RC provides the following hardware components:
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32F091RC can be found in the
`STM32F091 reference manual`_

View file

@ -29,7 +29,6 @@ Nucleo F103RB provides the following hardware components:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@ -50,11 +49,6 @@ Nucleo F103RB provides the following hardware components:
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32F103RB can be found here:

View file

@ -30,7 +30,6 @@ Nucleo F334R8 provides the following hardware components:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@ -51,11 +50,6 @@ Nucleo F334R8 provides the following hardware components:
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32F334R8 can be found in the
`STM32F334 reference manual`_

View file

@ -33,7 +33,6 @@ Nucleo G070RB provides the following hardware components:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@ -54,11 +53,6 @@ Nucleo G070RB provides the following hardware components:
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32G070RB can be found here:

View file

@ -33,7 +33,6 @@ Nucleo G071RB provides the following hardware components:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@ -54,11 +53,6 @@ Nucleo G071RB provides the following hardware components:
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32G071RB can be found here:

View file

@ -28,7 +28,6 @@ Nucleo L011K4 provides the following hardware components:
- Arduino* Nano V3 connectivity
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@ -49,11 +48,6 @@ Nucleo L011K4 provides the following hardware components:
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32L011K4 can be found in the
`STM32L0x1 reference manual`_

View file

@ -29,7 +29,6 @@ Nucleo L053R8 provides the following hardware components:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@ -50,11 +49,6 @@ Nucleo L053R8 provides the following hardware components:
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32L053R8 can be found in the
`STM32L0x3 reference manual`_

View file

@ -29,7 +29,6 @@ Nucleo L073RZ provides the following hardware components:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@ -50,11 +49,6 @@ Nucleo L073RZ provides the following hardware components:
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32L073RZ can be found in the
`STM32L0x3 reference manual`_

View file

@ -33,8 +33,6 @@ power consumption, and features.
mass storage, Virtual COM port, and debug port
- Comprehensive free software libraries and examples available with the
STM32CubeWL MCU Package
- Support of a wide choice of Integrated Development Environments (IDEs)
including IAR Embedded Workbench®, MDK-ARM, and STM32CubeIDE
- Suitable for rapid prototyping of end nodes based on LoRaWAN, Sigfox, wM-Bus,
and many other proprietary protocols
- Fully open hardware platform

View file

@ -26,6 +26,12 @@ config PINCTRL_IMX_SCMI
# TODO: Find better place for this option
config MCUX_XBARA
bool "MCUX XBARA driver"
depends on HAS_MCUX_XBARA
depends on DT_HAS_NXP_MCUX_XBAR_ENABLED
help
Enable the MCUX XBARA driver.
config MCUX_XBARB
bool "MCUX XBARB driver"
depends on DT_HAS_NXP_MCUX_XBAR_ENABLED
help
Enable the MCUX XBARB driver.

View file

@ -118,6 +118,9 @@
* Using BURTC as sys_clock instead of SysTick
* has implications on system performance. Read
* KConfig documentation entry before enabling it.
*
* The minimum residency and exit latency is
* managed by sl_power_manager on S2 devices.
*/
cpu-power-states = <&pstate_em1 &pstate_em2 &pstate_em3>;
};
@ -130,9 +133,7 @@
pstate_em1: em1 {
compatible = "zephyr,power-state";
power-state-name = "runtime-idle";
min-residency-us = <4>;
/* HFXO remains active */
exit-latency-us = <2>;
};
/*
@ -142,8 +143,6 @@
pstate_em2: em2 {
compatible = "zephyr,power-state";
power-state-name = "suspend-to-idle";
min-residency-us = <260>;
exit-latency-us = <250>;
};
/*
@ -155,8 +154,6 @@
pstate_em3: em3 {
compatible = "zephyr,power-state";
power-state-name = "standby";
min-residency-us = <20000>;
exit-latency-us = <2000>;
};
};
};

View file

@ -139,6 +139,10 @@
compatible = "arm,cortex-m33";
reg = <0>;
cpu-power-states = <&pstate_em1 &pstate_em2 &pstate_em3>;
/*
* The minimum residency and exit latency is
* managed by sl_power_manager on S2 devices.
*/
};
power-states {
@ -149,9 +153,7 @@
pstate_em1: em1 {
compatible = "zephyr,power-state";
power-state-name = "runtime-idle";
min-residency-us = <4>;
/* HFXO remains active */
exit-latency-us = <2>;
};
/*
@ -161,8 +163,6 @@
pstate_em2: em2 {
compatible = "zephyr,power-state";
power-state-name = "suspend-to-idle";
min-residency-us = <260>;
exit-latency-us = <250>;
};
/*
@ -174,8 +174,6 @@
pstate_em3: em3 {
compatible = "zephyr,power-state";
power-state-name = "standby";
min-residency-us = <20000>;
exit-latency-us = <2000>;
};
};
};

View file

@ -149,6 +149,10 @@
compatible = "arm,cortex-m33";
reg = <0>;
cpu-power-states = <&pstate_em1 &pstate_em2 &pstate_em3>;
/*
* The minimum residency and exit latency is
* managed by sl_power_manager on S2 devices.
*/
};
power-states {
@ -159,9 +163,7 @@
pstate_em1: em1 {
compatible = "zephyr,power-state";
power-state-name = "runtime-idle";
min-residency-us = <4>;
/* HFXO remains active */
exit-latency-us = <2>;
};
/*
@ -171,8 +173,6 @@
pstate_em2: em2 {
compatible = "zephyr,power-state";
power-state-name = "suspend-to-idle";
min-residency-us = <260>;
exit-latency-us = <250>;
};
/*
@ -184,8 +184,6 @@
pstate_em3: em3 {
compatible = "zephyr,power-state";
power-state-name = "standby";
min-residency-us = <20000>;
exit-latency-us = <2000>;
};
};
};

View file

@ -146,6 +146,10 @@
compatible = "arm,cortex-m33";
reg = <0>;
cpu-power-states = <&pstate_em1 &pstate_em2>;
/*
* The minimum residency and exit latency is
* managed by sl_power_manager on S2 devices.
*/
};
power-states {
@ -156,9 +160,7 @@
pstate_em1: em1 {
compatible = "zephyr,power-state";
power-state-name = "runtime-idle";
min-residency-us = <4>;
/* HFXO remains active */
exit-latency-us = <2>;
};
/*
@ -168,8 +170,6 @@
pstate_em2: em2 {
compatible = "zephyr,power-state";
power-state-name = "suspend-to-idle";
min-residency-us = <260>;
exit-latency-us = <250>;
};
};
};

View file

@ -148,8 +148,6 @@ static bool smf_execute_ancestor_run_actions(struct smf_ctx *ctx)
/* The child state either transitioned or handled it. Either way, stop propagating. */
if (internal->new_state || internal->handled) {
internal->new_state = false;
internal->handled = false;
return false;
}
@ -173,9 +171,6 @@ static bool smf_execute_ancestor_run_actions(struct smf_ctx *ctx)
}
}
internal->new_state = false;
internal->handled = false;
/* All done executing the run actions */
return false;
@ -209,10 +204,24 @@ static bool smf_execute_all_exit_actions(struct smf_ctx *const ctx, const struct
}
#endif /* CONFIG_SMF_ANCESTOR_SUPPORT */
void smf_set_initial(struct smf_ctx *ctx, const struct smf_state *init_state)
/**
* @brief Reset the internal state of the state machine back to default values.
* Should be called on entry to smf_set_initial() and smf_set_state().
*
* @param ctx State machine context.
*/
static void smf_clear_internal_state(struct smf_ctx *ctx)
{
struct internal_ctx *const internal = (void *)&ctx->internal;
internal->is_exit = false;
internal->terminate = false;
internal->handled = false;
internal->new_state = false;
}
void smf_set_initial(struct smf_ctx *ctx, const struct smf_state *init_state)
{
#ifdef CONFIG_SMF_INITIAL_TRANSITION
/*
* The final target will be the deepest leaf state that
@ -223,15 +232,14 @@ void smf_set_initial(struct smf_ctx *ctx, const struct smf_state *init_state)
}
#endif
internal->is_exit = false;
internal->terminate = false;
internal->handled = false;
internal->new_state = false;
smf_clear_internal_state(ctx);
ctx->current = init_state;
ctx->previous = NULL;
ctx->terminate_val = 0;
#ifdef CONFIG_SMF_ANCESTOR_SUPPORT
struct internal_ctx *const internal = (void *)&ctx->internal;
ctx->executing = init_state;
const struct smf_state *topmost = get_last_of(init_state);
@ -389,6 +397,11 @@ int32_t smf_run_state(struct smf_ctx *const ctx)
return ctx->terminate_val;
}
/* Executing a states run function could cause a transition, so clear the
* internal state to ensure that the transition is handled correctly.
*/
smf_clear_internal_state(ctx);
#ifdef CONFIG_SMF_ANCESTOR_SUPPORT
ctx->executing = ctx->current;
#endif

View file

@ -359,11 +359,6 @@ config HAS_MCUX_ADC_ETC
Set if the ADC External Trigger Control module is present
on the SoC.
config HAS_MCUX_XBARA
bool
help
Set if the XBARA module is present on the SoC.
config HAS_MCUX_XCACHE
bool
help

View file

@ -11,7 +11,7 @@ import string
import xml.etree.ElementTree as ET
from datetime import datetime
from enum import Enum
from pathlib import Path, PosixPath
from pathlib import Path
from colorama import Fore
from twisterlib.statuses import TwisterStatus
@ -29,6 +29,13 @@ class ReportStatus(str, Enum):
SKIP = 'skipped'
class ReportingJSONEncoder(json.JSONEncoder):
def default(self, obj):
if isinstance(obj, Path):
return str(obj)
return super().default(obj)
class Reporting:
json_filters = {
@ -294,10 +301,6 @@ class Reporting:
else:
report_options = self.env.non_default_options()
# Resolve known JSON serialization problems.
for k,v in report_options.items():
report_options[k] = str(v) if type(v) in [PosixPath] else v
report = {}
report["environment"] = {"os": os.name,
"zephyr_version": version,
@ -483,7 +486,7 @@ class Reporting:
report["testsuites"] = suites
with open(filename, 'w') as json_file:
json.dump(report, json_file, indent=4, separators=(',',':'))
json.dump(report, json_file, indent=4, separators=(',',':'), cls=ReportingJSONEncoder)
def compare_metrics(self, filename):

View file

@ -87,7 +87,6 @@ config SOC_MIMXRT1052
select HAS_MCUX_FLEXCAN
select HAS_MCUX_PWM
select HAS_MCUX_SRC
select HAS_MCUX_XBARA
config SOC_MIMXRT1062
select HAS_MCUX_ELCDIF
@ -107,7 +106,6 @@ config SOC_MIMXRT1062
select HAS_MCUX_I2S
select HAS_MCUX_ADC_ETC
select HAS_MCUX_SRC
select HAS_MCUX_XBARA
config SOC_MIMXRT1064
select HAS_MCUX_ELCDIF

View file

@ -42,7 +42,6 @@ config SOC_SERIES_IMXRT11XX
select HAS_MCUX_USB_EHCI
select HAS_MCUX_SRC_V2
select HAS_MCUX_IOMUXC
select HAS_MCUX_XBARA
select HAS_SWO
select HAS_PM

View file

@ -8,6 +8,8 @@
#include <zephyr/logging/log.h>
#include <zephyr/pm/pm.h>
#include <sl_power_manager.h>
#include <sl_hfxo_manager.h>
#include <sli_hfxo_manager.h>
LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
@ -46,31 +48,25 @@ void pm_state_set(enum pm_state state, uint8_t substate_id)
break;
}
/* FIXME: When this function is entered the Kernel has disabled
* interrupts using BASEPRI register. This is incorrect as it prevents
* waking up from any interrupt which priority is not 0. Work around the
* issue and disable interrupts using PRIMASK register as recommended
* by ARM.
*/
/* Set PRIMASK */
__disable_irq();
/* Set BASEPRI to 0 */
irq_unlock(0);
LOG_DBG("Entry to energy mode %d", energy_mode);
if (energy_mode != SL_POWER_MANAGER_EM0) {
if (energy_mode == SL_POWER_MANAGER_EM4) {
sl_power_manager_enter_em4();
} else if (energy_mode != SL_POWER_MANAGER_EM0) {
/* Calling the tracing and hook functions provided in arch_cpu_idle(). */
#if defined(CONFIG_TRACING)
sys_trace_idle();
#endif
#if CONFIG_ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK
z_arm_on_enter_cpu_idle_prepare();
#endif
sl_power_manager_add_em_requirement(energy_mode);
sl_power_manager_sleep();
k_cpu_idle();
sl_power_manager_remove_em_requirement(energy_mode);
}
LOG_DBG("Exit from energy mode %d", energy_mode);
/* Clear PRIMASK */
__enable_irq();
}
void pm_state_exit_post_ops(enum pm_state state, uint8_t substate_id)
@ -79,6 +75,33 @@ void pm_state_exit_post_ops(enum pm_state state, uint8_t substate_id)
ARG_UNUSED(substate_id);
}
/* This function is called by sl_power_manager_sleep() after it has set the PRIMASK. */
bool sl_power_manager_is_ok_to_sleep(void)
{
/* FIXME: When this function is entered the Kernel has disabled
* interrupts using BASEPRI register. This is incorrect as it prevents
* waking up from any interrupt which priority is not 0. Work around the
* issue and disable interrupts using PRIMASK register as recommended
* by ARM.
*/
/* Set BASEPRI to 0. */
irq_unlock(0);
return true;
}
/* This function is called by sl_power_manager_sleep() right after it was woken up from WFI. */
void sli_power_manager_on_wakeup(void)
{
#if defined(HFXO_MANAGER_SLEEPTIMER_SYSRTC_INTEGRATION_ON)
/* Handle the HFXO IRQ as soon as possible to retrieve the startup time. */
sl_hfxo_manager_irq_handler();
#endif
/* Forces a clock restore before handling interrupts. */
sl_power_manager_add_em_requirement(SL_POWER_MANAGER_EM1);
sl_power_manager_remove_em_requirement(SL_POWER_MANAGER_EM1);
}
/**
* Some SiLabs blobs, such as RAIL, call directly into sl_power_manager, and
* for that they had to include sl_power_manager.h during build. Some of those

View file

@ -1040,6 +1040,30 @@ config BT_MESH_BLOB_IO_FLASH
Enable the BLOB flash stream for reading and writing BLOBs directly to
and from flash.
if BT_MESH_BLOB_IO_FLASH
config BT_MESH_BLOB_IO_FLASH_WITHOUT_ERASE
bool "BLOB flash support for devices without erase"
default y if FLASH_HAS_NO_EXPLICIT_ERASE
depends on FLASH_HAS_NO_EXPLICIT_ERASE
help
Enable path supporting devices without erase. This option appears only
if there are devices without explicit erase requirements in the system
and may be disabled to reduce code size in case when no operations
are intended on such type of devices.
config BT_MESH_BLOB_IO_FLASH_WITH_ERASE
bool "BLOB flash support for devices with erase"
default y if FLASH_HAS_EXPLICIT_ERASE
depends on FLASH_HAS_EXPLICIT_ERASE
help
Enable path supporting devices with erase. This option appears only
if there are devices requiring erase, before write, in the system
and may be disabled to reduce code size in case when no operations
are intended on such type of devices.
endif # BT_MESH_BLOB_IO_FLASH
config BT_MESH_DFU_SRV
bool "Support for Firmware Update Server model"
depends on BT_MESH_MODEL_EXTENSIONS

View file

@ -56,40 +56,55 @@ static void io_close(const struct bt_mesh_blob_io *io,
flash_area_close(flash->area);
}
static inline int erase_device_block(const struct flash_area *fa, off_t start, size_t size)
{
/* If there are no devices requiring erase, then there is nothing to do */
if (IS_ENABLED(CONFIG_BT_MESH_BLOB_IO_FLASH_WITH_ERASE)) {
const struct device *fdev = flash_area_get_device(fa);
if (!fdev) {
return -ENODEV;
}
/* We have a mix of devices in system */
if (IS_ENABLED(CONFIG_BT_MESH_BLOB_IO_FLASH_WITHOUT_ERASE)) {
const struct flash_parameters *fparam = flash_get_parameters(fdev);
/* If device has no erase requirement then do nothing */
if (!(flash_params_get_erase_cap(fparam) & FLASH_ERASE_C_EXPLICIT)) {
return 0;
}
}
if (IS_ENABLED(CONFIG_FLASH_PAGE_LAYOUT)) {
struct flash_pages_info page;
int err;
err = flash_get_page_info_by_offs(fdev, start, &page);
if (err) {
return err;
}
size = page.size * DIV_ROUND_UP(size, page.size);
start = page.start_offset;
}
return flash_area_erase(fa, start, size);
}
return 0;
}
static int block_start(const struct bt_mesh_blob_io *io,
const struct bt_mesh_blob_xfer *xfer,
const struct bt_mesh_blob_block *block)
{
struct bt_mesh_blob_io_flash *flash = FLASH_IO(io);
size_t erase_size;
if (flash->mode == BT_MESH_BLOB_READ) {
return 0;
}
#if defined(CONFIG_FLASH_PAGE_LAYOUT)
struct flash_pages_info page;
const struct device *flash_dev;
int err;
flash_dev = flash_area_get_device(flash->area);
if (!flash_dev) {
return -ENODEV;
}
err = flash_get_page_info_by_offs(flash_dev,
flash->offset + block->offset, &page);
if (err) {
return err;
}
erase_size = page.size * DIV_ROUND_UP(block->size, page.size);
#else
erase_size = block->size;
#endif
return flash_area_flatten(flash->area, flash->offset + block->offset,
erase_size);
return erase_device_block(flash->area, flash->offset + block->offset, block->size);
}
static int rd_chunk(const struct bt_mesh_blob_io *io,

View file

@ -203,7 +203,7 @@ manifest:
groups:
- hal
- name: hal_nxp
revision: 5576d444d203e8973f7e8f5be18263b3d8a7bb1f
revision: d599b6fe16c2ce4a48fc0597ee4228c64f2ba147
path: modules/hal/nxp
groups:
- hal