Add TI OMAP interprocessor mailbox nodes for AM62X A53,
the user ID assignment is as per thec corresponding mailbox
interrupt assignment for the core. Also while at it update the
supported feature list in corresponding boards.
More details can be found in the device TRM Mailbox section:
https://www.ti.com/lit/ug/spruiv7a/spruiv7a.pdf
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
The models include enough of the CRACEN to run the same
nrfx drivers as in Zephyr. So let's add it to the list.
Also let's remove the RTC from the list as the hal does not
expose it anymore for this platform as the GRTC is to be used
instead.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Fixes the the node value of zephyr,sram for the following boards:
- esp32s2_devkitcc
- esp32s2_saola
- esp32s2_franzininho
- esp32s2_lolin_mini
- ttgo_t7v1_5_esp32
Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
Let's default to this new driver.
And therefore change the conditions in the BT controller kconfig
which were selecting the native_posix fake entropy driver
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The default partition file included in the board definition is for 4MB
flash. However, this board has 16MB flash.
Signed-off-by: Rahul Arasikere <arasikere.rahul@gmail.com>
This commit replaces a bunch of ifdefs and bindings with a single
extensible binding, and makes all standard mtime system timers consistent.
Signed-off-by: Camille BAUD <mail@massdriver.space>
Sets LinkServer as the default runner for the mimxrt1180-evk board,
as the board is configured for CMSIS-DAP by default.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
Add the appropriate mass erase command for STM32 SoC families.
Family to command mapping taken from:
https://openocd.org/doc/html/Flash-Commands.html
Signed-off-by: Jordan Yates <jordan@embeint.com>
In order to show how to use OpenThread and CoAP, add an application.
This example could be build to run a client or server.
The server could expose LEDs and buttons and client could get their
state and set the LEDs state.
The network is created automatically using the network key predefined
in the config. The goal is to make the example simple by removing
the commisionning and joinning process.
If a client application has a button, it could use it to toggle the first
LED on any boards running the server application.
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
- insert various additional information content
- use tabs to distinguish board versions
- west flash is now usable for flashing
- show steps for using USB-console
- move images to img subfolder
Signed-off-by: Bernhard Krämer <bdkrae@gmail.com>
The on-board S26HS512T 512M-bit HyperFlash memory is connected to
the QSPI controller port A1.
This board configuration selects it as the default flash controller.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Create common source code to use for supporting HyperFlash.
Rename 'FLASH_NXP_S32_QSPI_NOR_SFDP_RUNTIME' to
'FLASH_NXP_S32_QSPI_SFDP_RUNTIME' as a common kconfig.
Add the 'max-program-buffer-size' property to use for
setting memory pageSize, instead of using
'CONFIG_FLASH_NXP_S32_QSPI_LAYOUT_PAGE_SIZE' for setting.
Add the 'write-block-size' propertyto use for setting
the number of bytes used in write operations, it also
uses to instead of the 'memory-alignment' property.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Add comment to DTS file about SRAM partitions similar to the RTXXX
series has comments.
Add also a doc section to the frdm_rw612 about this.
Also fix the section hierarchy of the frdm_rw612 doc, the header levels
were wrong since the wifi and bluetooth, and reference sections were
under the debugging section.
Group all the wireless connectivity info together.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add support for the Antmicro's Myra SiP Baseboard. The board uses
Antmicro's Myra SiP which integrates STM32G491XX MCU and its SoC
configuration.
Signed-off-by: Jakub Wasilewski <jwasilewski@internships.antmicro.com>
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
P1.7 used for led 0 was not passing gpio_api_1pin test (probably
shortened with another pin in the test setup. Use different pin
that passes the gpio_api_1pin test. At current stage this PDK is
'virtual' so this pin is not attached to any LED and it can be
changed.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Added a support for new mps2 board an386 to enable testing with ARM FVP.
Qualifier to build/run application with board is mps2/an386.
Signed-off-by: Samuel Chee <samche01@arm.com>
Add support PWM eMIOS for s32z2xxdc2 board. There is no LED
on-board dedicated for PWM, so no sample is supported. Only
enabling some pwm tests
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Removing period, duty and polarity configuration from
channel devicetree. At boot time, only minimal setup like
pinctrl, prescaler, etc should be initialized. PWM signal
is produced by using pwm_set* API
Also after this change, PWM period, duty are changed at the
next counter period boundary
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Since the ospi@ node does not exist anymore for the stm32u5 device
there is no more need for this pre_dt_board.cmake file.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
On the nucleo_g071rb , nucleo_g070rb and nucleo_g0b1re boards,
the CN7 MORPHO_L_9 to 11 pin are not correctly defined
in the st_morpho_connector.dtsi. This PR is fixing this.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit removes all references to the `xtools` toolchain variant in the
board YAML files.
Note that the `xtools` toolchain variant has been deprecated since Zephyr
v3.3.0 and now removed.
The removal process was automated using the following command line:
git grep -l xtools -- boards/*.{yml,yaml} | \
xargs -n 1 -P $(nproc) \
yq -i 'del(.toolchain[] | select(. == "xtools"))'
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Segger started to support MAX78002 with JLink version V8.12. So,
MAX78002EVKIT board has JLink support.
Signed-off-by: Furkan Akkiz <hasanfurkan.akkiz@analog.com>
nrf54l20pdk and nrf54l09pdk must use 64 MHz for now. So far it was
done by using SOC_NRF54LX_SKIP_CLOCK_CONFIG Kconfig option which was
skipping oscillator configuration so that it was running the default
frequency (which is 64 MHz). This approach was a bit cryptic because
DT was indicating that CPU was running 128 MHz when actual frequency
was different (and it was relying on assumption that default frequency
is 64 MHz).
After adding hfpll as clock source for CPU Kconfig option can
be replaced with DT setting where actual frequency is correctly
indicated. Since hfpll is a clock source for fast peripherals (e.g.
TIMER00) it is possible to have single source of information
regarding frequency.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Do not delete clocks for the bsim target. Clocks are referenced
by peripherals and it can be used to get frequency that clocks
the peripheral.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
