Add the stm32f413h_disco target to the boards/st
Add the PLLi2S when needed by the USB or SDMMC or RNG.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
J-Link firmware images for silabs boards are not distributed by
SEGGER, fw update should be done with Simplicity Studio instead.
Signed-off-by: Daniel Fuchs <software@sagacioussuricata.com>
Based on board files for DK2601B. The EFR32xG24 Explorer Kit
(xG24-EK2703A) is similar to the DK2601B but does not have any
sensors onboard.
Signed-off-by: Daniel Fuchs <software@sagacioussuricata.com>
Add initial support for the RP2350's DMA peripheral, allow tests
under drivers/dma/loop_transfer to run on on the Raspberry Pi Pico 2,
and update the board's documentation.
Signed-off-by: Manuel Aebischer <manuel.aebischer@belden.com>
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
Add initial support for the RP2350's PIO peripherals, extend the
existing example under samples/boards/raspberrypi/rpi_pico/uart_pio to
demonstrate this on the Raspberry Pi Pico 2, and update the board's
documentation.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
Signed-off-by: Manuel Aebischer <manuel.aebischer@belden.com>
Add OpenOCD debugger support.
For now we will need Raspberry Pi'a forked version of OpenOCD from
https://github.com/raspberrypi/openocd .
The default adapter speed is set to match Raspberry Pi's documentation.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
Add UF2 Family ID for Raspberry Pi 2350 and build
UF2 image by default for Pico 2 board
Signed-off-by: Ryan Grachek <grachek@gmail.com>
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
The Raspberry Pi Pico 2 is Raspberry Pi's first board fitted with their
RP2350A SoC.
This adds a minimal board definition, sufficient to build and run
`samples/hello_world` and `samples/basic/blinky` on the board. Images
can be run on the target using OpenOCD. Raspberry Pi's `picotool` can
create a UF2 binary, which ensures that errata RP2350-E10 is avoided
e.g.
```
> picotool uf2 convert build\rpi_pico2\hello_world\zephyr\zephyr.elf \
build\rpi_pico2\hello_world\zephyr\zephyr.uf2 \
--family rp2350-arm-s --abs-block`
```
Raspberry Pi Pico 2 is a low-cost, high-performance microcontroller
board with flexible digital interfaces. Key features include:
- RP2350A microcontroller chip designed by Raspberry Pi in the United
Kingdom
- Dual Cortex-M33 or Hazard3 processors at up to 150MHz
- 520KB of SRAM, and 4MB of on-board flash memory
- USB 1.1 with device and host support
- Low-power sleep and dormant modes
- Drag-and-drop programming using mass storage over USB
- 26x multi-function GPIO pins including 3 that can be used for ADC
- 2x SPI, 2x I2C, 2x UART, 3x 12-bit 500ksps Analogue to Digital
Converter (ADC), 24x controllable PWM channels
- 2x Timer with 4 alarms, 1x AON Timer
- Temperature sensor
- 3x Programmable IO (PIO) blocks, 12 state machines total for custom
peripheral support
- Flexible, user-programmable high-speed IO
- Can emulate interfaces such as SD Card and VGA
The Raspberry Pi Pico 2 comes as a castellated module which allows
soldering direct to carrier boards.
Only enable timer 0 for now. Timer 1 won't work correctly until the
rpi_pico HAL has picked up the fix for `hardware_alarm_irq_handler`. See
https://github.com/raspberrypi/pico-sdk/pull/1949 .
Added some documentation for the board itself (mostly aiming to refer to
canonical sources of information rather duplicate). Add entries in the
release notes where applicable.
boards/raspberrypi/rpi_pico2/doc/img/rpi_pico2.webp is a cropped and
compressed version of https://www.raspberrypi.com/documentation/microcontrollers/images/pico-2.png
which is released under the CC-BY-SA-4.0 license. See https://github.com/raspberrypi/documentation/blob/develop/LICENSE.md
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
A significant amount of the pin muxing is duplicated between the RP2040,
the RP2350A, and RP2350B. Reflect this in the file structure, with a
`-common` suffix used to to indicate this.
Macros are defined in ascending order of the function index in the
relevant table in the datasheet. SoC/SoC-series specific macros are
defined in their respective tables. Functions that are not currently
used (e.g. the new HSTX) are intentionally not defined here as they do
not (currently) have any use in the Zephyr tree (i.e. there's no drivers
that make use of this functionality).
clang-format has been run over the existing definitions to reduce the
noise generated by CI. These are cosmetic changes; I've tried to retain
attribution to the relevant authors where applicable.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
Completes the PLLi2S configuration for this board based on stm32f411
with a PLLI2S compatible = "st,stm32f411-plli2s-clock";
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Completes the PLLi2S configuration for those boards based on stm32f4
with a PLLI2S compatible = "st,stm32f411-plli2s-clock";
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Added support for the SPI interface which is availble on the shield
if the jumper configurations are changed.
Signed-off-by: Ian Morris <ian.d.morris@outlook.com>
- Enables a MCUboot support for frdm-mcxa156.
- Enables MCUMgr OTA and MCUBoot recovery for frdm-mcxa156.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
Convert qspi and hyperflash to variants instead of revisions by popular
demand.
And convert evkb into a revision instead of a different board.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Rename "nxp,kinetis-ftm-pwm" compatible to "nxp,ftm-pwm" to remove the
device family from its name.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
With recent SDSC bundles, 54H fails the app core boot in case of a
unsupported GPIO in the UICR.
As Wi-Fi SR co-existence on nRF54H20DK is not yet supported, remove this
GPIO for 54H. This will be fixed properly once co-existence is
revisited.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Removed FLASH_BASE_ADDRESS configuration from various boards' Kconfig.
The only thing needed in order to do this was to update the relevant dtsi
files so that the flash0 node has its reg property configured properly.
Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
This board has a built-in debug adapter that provides a serial
connection to the host. This is mentioned in the board documentation.
The SoC pins P0.15 (RX) and P0.19 (TX) are connected to the debug
adapter pins TXD and RXD, respectively. This board should not configure
any other serial connection by default.
Update the board documentation accordingly.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Test "drivers.gpio.1pin.aw9523b" fails on stm32u083c_dk platform
because "arduino_i2c" definition does not exists in the device tree
of stm32u083c_dk board. Also updated the baord yaml
Signed-off-by: Arif Balik <arifbalik@outlook.com>
Added aliases to nucleo_l4r5zi/stm32f4_disco/stm32f411e_disco for
die_temp die_temp/vref/vbat nodes so that the die_temp_polling
and soc_voltage samples work for them.
Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
The documentation incorrectly referred to the Semtech shield as
semtech_sx1271mb1mas. It should be semtech_sx1276mb1mas.
Signed-off-by: Sreeraj Sudhakaran <sreerajsudhakaran@gmail.com>
Now that MbedTLS is capable of automatically enabling
CONFIG_ENTROPY_GENERATOR (when available), we can remove forced
enablements in boards|soc deconfig files.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Creation of the new zephyr\soc\nxp\common\nxp_nbu.c driver which manage
the interruption of the NBU. This modification is mandatory to support a
coex application which includes Bluetooth and 802.15.4 on the same
narrow band path.
Signed-off-by: Xavier Razavet <xavier.razavet@nxp.com>
Secure domain firmware v9.0.0 and onward no longer supports the
non-essential domain reset procedure which was used in the custom
JLink reset scheme for
nrf54h20dk/nrf54h20/cpuapp, nrf54h20dk/nrf54h20/cpurad,
nrf9280pdk/nrf9280/cpuapp and nrf9280pdk/nrf9280/cpurad.
All resets done through the ADAC interface now do a global reset
instead, which as of now "kills" the JLink session.
Remove the custom reset behavior as it will not work anymore moving
forward. This means that "monitor reset" in GDB can no longer be used
to debug the application from the start of execution. Using current
tooling, it is possible to debug from the start of execution by first
resetting the cores into a halted state, starting cores other than the
one you are debugging and then attaching GDB. For example:
> nrfutil device reset --reset-kind RESET_VIA_SECDOM
> nrfutil device go --core Network
> west attach
Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
This commit enables support for DMA,
SPI, RNG, Crypto, USB and RTC.
Signed-off-by: Mohammad Badawi <zephyr@exalt.ps>
Signed-off-by: Sara Touqan <zephyr@exalt.ps>
