Add clock source to timers which indicates maximum frequency of
the timer instance.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
i2s driver have not suooprt frdm_mcxn947 pll clk set.
so add macro CONFIG_I2S_HAS_PLL_SETTING to control pll init.
Signed-off-by: Qiang Zhang <qiang.zhang_6@nxp.com>
Implement lan865x mdio driver to provide interface between lan865x MAC
driver and internal PHY driver phy_microchip_t1s.c. This driver is needed
to support the driver architecture followed.
Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>
Remove internal PHY initialization part as the phy_microchip_t1s.c
driver will do the internal PHY initialization.
Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>
Add support for LAN8650/1 Rev.B1. As per the latest configuration note
AN1760 released (Revision F (DS60001760G - June 2024)) for Rev.B0 is also
applicable for Rev.B1. Refer hardware revisions list in the latest AN1760
Revision F (DS60001760G - June 2024).
https://www.microchip.com/en-us/application-notes/an1760
Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>
Add a DTS binding for the MediaTek Audio Front End device, and
definitions for the in-tree devices.
These .dts files were auto-generated from pre-existing SOF code (that
defined the devices as C structs) using a tool currently being
submitted in the SOF tree, thus are included here as separate files.
The expectation is that future variants will be authored in this
format directly. Longer term we can move them directly into the core
board DTS.
Signed-off-by: Andy Ross <andyross@google.com>
Add zephyr,bt-hci-uart binding to the CYW43xxx device tree example to
properly implement Zephyr's HCI UART abstraction layer.
Signed-off-by: Benjamin Geiger <BenjaminGeiger1@gmail.com>
Add initial SoC support for the TI J722s SoC series MCU-domain
Cortex-R5 core.
TRM for J722s: https://www.ti.com/lit/zip/sprujb3
Signed-off-by: Andrew Davis <afd@ti.com>
Add initial SoC support for the TI J722s SoC series MAIN-domain
Cortex-R5 core.
TRM for J722s: https://www.ti.com/lit/zip/sprujb3
Signed-off-by: Andrew Davis <afd@ti.com>
Add wsen_pdus_25131308XXXXX driver with
the corrected name and compatibility with
the hal update as well as added new features..
Signed-off-by: Wajdi ELMuhtadi <wajdi.elmuhtadi@we-online.com>
Change the property names in the bindings and DTS
to use hyphens(-) for separation instead of underscores(_).
Signed-off-by: James Roy <rruuaanng@outlook.com>
Defined default values for baudrate, parity, stop bits, and data bits.
This removes complexity and obfuscation from the code.
Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
This commit adds MBOX device tree entry for MCXN947.
Adds support for MCXN in NXP ipm and mbox drivers.
Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
The AD4114 is a low power, low noise, 24-bit, sigma-delta ADC.
This driver allows to use it with the Zephyr ADC API. It uses
the continuous acquisition ADC feature.
This ADC allows many configutations, but this driver uses it as the
most generic way :
- each can channel can be enable or disable using the device
tree configuration
- configure two setups (one for unipolar inputs, one for bipolar inputs)
- use an external clock
Signed-off-by: Pierrick Curt <pierrickcurt@gmail.com>
The CH32V003 belongs to the CH32V0 series. To improve code organization
and maintainability, all related files should be grouped together in a
dedicated subdirectory.
Signed-off-by: Jianxiong Gu <jianxiong.gu@outlook.com>
Unify property names in bindings and overlay, using
hyphens (-) instead of underscores (_) as separators.
Signed-off-by: James Roy <rruuaanng@outlook.com>
Move the Atmel SAM E70/V71 DMA PERIDs header file to
include/zephyr/dt-bindings/dma and unify it for use with the entire product
family (SAM E70/S70/V70/V71).
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Synchronize the Atmel SAM E70/V71 DMA Peripheral Hardware Requests HW
Interface Numbers and adjust them to match those listed in the SAM
E70/S70/V70/V71 datasheet.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Sort the Atmel SAMx7x periheral devicetree nodes according to their address
in the memory map.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The Atmel SAM0 SoC enable peripherals clocks in distinct places: PM and
MCLK. The old devices had defined the peripheral clock enable bit at PM.
On the newer devices this was extracted on a dedicated memory section
called Master Clock (MCLK). This change excludes the dedicated bindings
in favor of a generic approach that cover all cases.
Now the clocks properties is complemented by the atmel,assigned-clocks
property. It gives the liberty to user to customize the clock source
from a generic clock or configure the direct connections.
All peripherals drivers were reworked with the newer solution.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Some platforms require special clock selection options. This could be
made using the already defined assigned-clocks from Linux clocks.
See 93ee800895/dtschema/schemas/clock/clock.yaml (L24)
This introduces the vendor atmel,assigned-clocks and
atmel,assigned-clock-names properties to generalize those conditions
in Zephyr for Atmel sam0 SoC series.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This commit adds two properties. One is used to set size of the low
flash device and the other is used to select the low flash device. Then,
the eSPI TAF request can access between two flash devices base on this
setting.
Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
update gpio driver to adapt rt7xx gpio model:
1. There is no PORT_Type on RT7xx,so set PORT_Type as void
2. Add port_no parameter in gpio_mcux_config to adapt IOPCTL driver
3. Add gpio-port-offest parameter in blinding, it will help map the
relation between index n and gpio port when some soc have domain
access attribution.
3. Splite gpio_mcux_configure function into two functions(
gpio_mcux_iopctl_configure and gpio_mcux_port_configure)
according to CONFIG_PINCTRL_NXP_IOCON macro
4. Add code to adapt RT700 GPIO attribute configuration
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Marked the irq-gpios property as "required: true" in the yaml file.
This ensures that the property is always defined in the device tree,
preventing the driver from crashing when irq-gpios is missing.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Relocate the `power-states` node from under the `soc` node to
the `cpus` node, making it consistent with other STM32 SoC series.
This resolves the device-tree warning:
(simple_bus_reg): /soc/power-states: missing or empty reg/ranges property.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Rename the following properties in binding and overlay:
-- primary_source => primary-source
-- secondary_source => secondary-source
-- filter_count => filter-count
-- filter_period => filter-period
Signed-off-by: James Roy <rruuaanng@outlook.com>
Multi channels share one IRQ, add channels-shared-irq-mask on RT1180
attribution to describe the channel shared status, and add code
implementation to register the handler function for each channel
in different interrupts.
Fix legacy building warning issue
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
add support SCE9 to entropy driver for Renesas RA
Signed-off-by: Minh Hoang <minh.hoang.wm@bp.renesas.com>
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
Rename the Infineon XMC4xxx CAN node devicetree property clock_div8 to
clock-div8 (prefering hyphens over underscores to separate devicetree
property names).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
We add a serial UART driver for Microchip MEC5 HAL based chips.
The driver supports polling, interrupts, and runtime configuration
features. Power management will be implemented in a future PR.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
The OMAP I2C provides support for I2C serial interface on TI K3 series.
It is compatible with Philips I2C physical layer.
The commit includes:
Zephyr i2c api implementation
Polling Mode
Signed-off-by: Dhruv Menon <dhruvmenon1104@gmail.com>
TIM8 was missing from the dts board file. This is one of the
advandaced-control timers on the STM32H562xx/STM32H563xx processors.
Signed-off-by: Omeed Baboli <omeedbaboli@gmail.com>
Use a string for the xfr-min-bits property over an integer value, as this
significantly improves the readability of the MIPI DBI SPI device binding.
Signed-off-by: Stephan Linz <linz@li-pro.net>
- Add Flash HP support for ra6-cm4, ra6-cm33, ra4-cm33 (except
r7fa4w1ad2cng)
- Add config to set the minimal size of data which can be written
for RA4E2, RA4M2, RA4M3, RA6E1, RA6E2, RA6M1, RA6M2, RA6M3, RA6M4,
RA6M5
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Signed-off-by: Phi Tran <phi.tran.jg@bp.renesas.com>
- Bring macro defined of RA8 in flash_hp_ra.h to device tree
- Change to use irq_lock instead of semaphore for code flash
- Modify and add conditions to check and make decision to perform
action at last block.
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Signed-off-by: Tran Van Quy <quy.tran.pz@renesas.com>
This implements to generate the MAC address of the device UUID.
The UUID is hashed to reduce the size to 3 bytes.
Ideas taken from eth_nxp_enet.c
Adding dependencies on: HWInfo and CRC
Signed-off-by: Adib Taraben <theadib@gmail.com>
Fixes issue introduced in #76460
The previous code attempted to detect whether TMAG5273 or TMAG3001 was
connected based on DEVICE ID register. This doesn't work as the bits that
denote the version on one part are undefined on the other part, and cannot
be relied on to be zero.
This commit adds a TMAG3001 compatible which (for now) is just derived from
the TMAG5273 compatible. This allows TMAG3001 to be specified directly in
the DT. The driver code is updated to support both compatibles.
Signed-off-by: Yiding Jia <yiding.jia@gmail.com>
After updating the "st,stm32-vref" binding with a new property containing
the calibration data resolution ("vrefint-cal-resolution"), update the
corresponding nodes in SoC DTSI files with the proper value.
Note that the property is not set on SoCs with resolution of 12, as it is
the default value specified for the property in the binding.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Add a property holding calibration resolution, similar to what already
exists in the st,stm32-temp-cal-common binding.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Refactor the devicetree files for the Atmel SAM E70 and SAM V71 product
series. These SoCs are part of a larger product family (SAM
E70/S70/V70/V71) and share a common set of peripherals.
Introduce a base samx7x.dtsi for all members of the family, containing the
union of all supported peripherals. Specific product series can use
/delete-node/ in their DTSI (e.g. same70.dtsi) for removing peripherals not
present in that product series.
Replace pin-count-specific DTSI files (e.g. same70q19b.dtsi) with
pin-count-agnostic DTSI files (e.g. same70x19b.dtsi) as the pin-count is
not taken into account in these anyways, and adjust the relevant board
devicetrees accordingly.
As part of this refactoring, introduce support for the missing flash memory
density variants of the SAM E70 product series.
Support for the two remaining product series (SAM S70/V70) is not part of
this refactoring as these will require further changes to the SoC support
code (soc/atmel/sam/).
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This is a squash of all the groundwork needed to
get a functioning driver for the DS3231 with the RTC API.
Signed-off-by: Gergo Vari <work@gergovari.com>
Some nodes in nRF54H20 DT files did not have a `reg` entry matching the
node address. While not used in practice, this aligns with the DT spec.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Fixes misassignment of cpuflpr_vevif label to cpuppr_vevif_tx node by
instead assigning to cpuflpr_vevif_tx node.
Signed-off-by: Daniel Mangum <georgedanielmangum@gmail.com>
Adds a dependency to `power.yaml`, as already exists for SPI and I2C
devices.
Signed-off-by: Stefan Schwendeler <Stefan.Schwendeler@husqvarnagroup.com>
The PL011 driver has already implemented supporting reset device
behavior.
However, the support is incomplete because the `arm,pl011.yaml`,
does not contain a `reset-device.yaml`.
Add include directive to `arm,pl011.yaml` to including
`reset-device.yaml` to complete the support for reset device.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Add support for STM32H757 SoC, which shares its design
with STM32H747 with added cryptography peripherals.
Signed-off-by: Grzegorz Runc <g.runc@grinn-global.com>
Add the Sensor Fusion Low Power (SFLP) FIFO streaming capability,
using RTIO. The decode function is now aware of parsing following FIFO
tags:
- LSM6DSV16X_SFLP_GAME_ROTATION_VECTOR_TAG
- LSM6DSV16X_SFLP_GYROSCOPE_BIAS_TAG
- LSM6DSV16X_SFLP_GRAVITY_VECTOR_TAG
To activate SFLP the user should put in DT the proper configuration.
For example, to activate a 60Hz SFLP FIFO batching rate of game rotation
vector, gravity vector and gbias components, the user should add in DT
the following:
sflp-odr = <LSM6DSV16X_DT_SFLP_ODR_AT_60Hz>;
sflp-fifo-enable = <LSM6DSV16X_DT_SFLP_FIFO_GAME_ROTATION_GRAVITY_GBIAS>;
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The it8801 template is helpful but in the current state it does not
allow changing the device address as that is in the template itself. Fix
that by moving the template content down a level in the hierarchy, so
that it extends the mfd device itself rather than than instantiate it,
then the base instance can have any address, now the only limitation is
that only one instance is possible, but that is probably alright for
now.
Alternatives would be to use a define for the address, or even a
template per address, but this feels like a better compromise for now.
This may also use
https://github.com/zephyrproject-rtos/zephyr/pull/82825 in the future if
that ever becomes a thing.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The EFR32MG24B210F1536IM48 has 4 more GPIOs than the
EFR32MG24B310F1536IM48, and does not support the high accuracy
mode for the IADC.
Signed-off-by: Daniel Fuchs <software@sagacioussuricata.com>
