mcux: drivers: xbara: drop HAS_MCUX_XBARA config

The HAS_MCUX_XBARA is replaced by the DT_HAS_NXP_MCUX_XBAR_ENABLED

Signed-off-by: Adrian Bieri <adrian.bieri@loepfe.com>

MAINTAINERS.yml

@@ -4168,6 +4168,8 @@ TI K3 Platforms:
     - dnltz
   files:
     - boards/ti/*am62*/
+    - drivers/*/*davinci*
+    - drivers/*/*omap*
     - drivers/*/*ti_k3*
     - dts/bindings/*/ti,k3*
     - soc/ti/k3/

arch/arm/core/mpu/Kconfig

@@ -8,6 +8,7 @@ if CPU_HAS_MPU
 config ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
 	int
 	default 256 if ARM_MPU && ARMV6_M_ARMV8_M_BASELINE && !ARMV8_M_BASELINE
+	default 128 if ARM_MPU && FPU_SHARING && MPU_STACK_GUARD
 	default 64 if ARM_MPU && AARCH32_ARMV8_R
 	default 32 if ARM_MPU
 	default 4

arch/arm64/core/Kconfig

@@ -143,17 +143,6 @@ config ARM64_SAFE_EXCEPTION_STACK
 	  used for user stack overflow checking, because kernel stack support
 	  the checking work.
 
-config ARM64_ENABLE_FRAME_POINTER
-	bool
-	depends on OVERRIDE_FRAME_POINTER_DEFAULT && !OMIT_FRAME_POINTER
-	depends on !FRAME_POINTER
-	select DEPRECATED
-	help
-	  Deprecated. Use CONFIG_FRAME_POINTER instead.
-	  Hidden option to simplify access to OVERRIDE_FRAME_POINTER_DEFAULT
-	  and OMIT_FRAME_POINTER. It is automatically enabled when the frame
-	  pointer unwinding is enabled.
-
 config ARM64_EXCEPTION_STACK_TRACE
 	bool
 	default y

arch/common/CMakeLists.txt

@@ -27,8 +27,6 @@ zephyr_library_sources_ifdef(
   multilevel_irq.c
   )
 
-zephyr_library_sources_ifdef(CONFIG_LEGACY_MULTI_LEVEL_TABLE_GENERATION multilevel_irq_legacy.c)
-
 zephyr_library_sources_ifdef(CONFIG_SHARED_INTERRUPTS shared_irq.c)
 
 if(NOT CONFIG_ARCH_HAS_TIMING_FUNCTIONS AND

arch/common/Kconfig

@@ -16,21 +16,6 @@ config SEMIHOST
 	  This option is compatible with hardware and with QEMU, through the
 	  (automatic) use of the -semihosting-config switch when invoking it.
 
-config LEGACY_MULTI_LEVEL_TABLE_GENERATION
-	bool "Auto generates the multi-level interrupt LUT (deprecated)"
-	default y
-	select DEPRECATED
-	depends on MULTI_LEVEL_INTERRUPTS
-	depends on !PLIC
-	depends on !NXP_IRQSTEER
-	depends on !RV32M1_INTMUX
-	depends on !CAVS_ICTL
-	depends on !DW_ICTL_ACE
-	depends on !DW_ICTL
-	help
-	  A make-shift Kconfig to continue generating the multi-level interrupt LUT
-	  with the legacy way using DT macros.
-
 config ISR_TABLE_SHELL
 	bool "Shell command to dump the ISR tables"
 	depends on GEN_SW_ISR_TABLE

arch/common/multilevel_irq_legacy.c

@@ -1,72 +0,0 @@
-/*
- * Copyright (c) 2018 Intel Corporation.
- * Copyright (c) 2024 Meta.
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-
-#include <zephyr/sw_isr_table.h>
-#include <zephyr/sys/util.h>
-
-/**
- * @file
- * @brief This file houses the deprecated legacy macros-generated multi-level interrupt lookup
- * table code, compiled when `CONFIG_LEGACY_MULTI_LEVEL_TABLE_GENERATION` is enabled.
- */
-
-/*
- * Insert code if the node_id is an interrupt controller
- */
-#define Z_IF_DT_IS_INTC(node_id, code)                                                             \
-	IF_ENABLED(DT_NODE_HAS_PROP(node_id, interrupt_controller), (code))
-
-/*
- * Expands to node_id if its IRQN is equal to `_irq`, nothing otherwise
- * This only works for `_irq` between 0 & 4095, see `IS_EQ`
- */
-#define Z_IF_DT_INTC_IRQN_EQ(node_id, _irq) IF_ENABLED(IS_EQ(DT_IRQ(node_id, irq), _irq), (node_id))
-
-/*
- * Expands to node_id if it's an interrupt controller & its IRQN is `irq`, or nothing otherwise
- */
-#define Z_DT_INTC_GET_IRQN(node_id, _irq)                                                          \
-	Z_IF_DT_IS_INTC(node_id, Z_IF_DT_INTC_IRQN_EQ(node_id, _irq))
-
-/**
- * Loop through child of "/soc" and get root interrupt controllers with `_irq` as IRQN,
- * this assumes only one device has the IRQN
- * @param _irq irq number
- * @return node_id(s) that has the `_irq` number, or empty if none of them has the `_irq`
- */
-#define INTC_DT_IRQN_GET(_irq)                                                                     \
-	DT_FOREACH_CHILD_STATUS_OKAY_VARGS(DT_PATH(soc), Z_DT_INTC_GET_IRQN, _irq)
-
-#define INIT_IRQ_PARENT_OFFSET_2ND(n, d, i, o)                                                     \
-	IRQ_PARENT_ENTRY_DEFINE(intc_l2_##n, DEVICE_DT_GET_OR_NULL(d), i, o, 2)
-
-#define IRQ_INDEX_TO_OFFSET(i, base) (base + i * CONFIG_MAX_IRQ_PER_AGGREGATOR)
-
-#define CAT_2ND_LVL_LIST(i, base)                                                                  \
-	INIT_IRQ_PARENT_OFFSET_2ND(i, INTC_DT_IRQN_GET(CONFIG_2ND_LVL_INTR_0##i##_OFFSET),         \
-				   CONFIG_2ND_LVL_INTR_0##i##_OFFSET,                              \
-				   IRQ_INDEX_TO_OFFSET(i, base))
-
-LISTIFY(CONFIG_NUM_2ND_LEVEL_AGGREGATORS, CAT_2ND_LVL_LIST, (;), CONFIG_2ND_LVL_ISR_TBL_OFFSET);
-
-#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
-
-BUILD_ASSERT((CONFIG_NUM_3RD_LEVEL_AGGREGATORS * CONFIG_MAX_IRQ_PER_AGGREGATOR) <=
-		     BIT(CONFIG_3RD_LEVEL_INTERRUPT_BITS),
-	     "L3 bits not enough to cover the number of L3 IRQs");
-
-#define INIT_IRQ_PARENT_OFFSET_3RD(n, d, i, o)                                                     \
-	IRQ_PARENT_ENTRY_DEFINE(intc_l3_##n, DEVICE_DT_GET_OR_NULL(d), i, o, 3)
-
-#define CAT_3RD_LVL_LIST(i, base)                                                                  \
-	INIT_IRQ_PARENT_OFFSET_3RD(i, INTC_DT_IRQN_GET(CONFIG_3RD_LVL_INTR_0##i##_OFFSET),         \
-				   CONFIG_3RD_LVL_INTR_0##i##_OFFSET,                              \
-				   IRQ_INDEX_TO_OFFSET(i, base))
-
-LISTIFY(CONFIG_NUM_3RD_LEVEL_AGGREGATORS, CAT_3RD_LVL_LIST, (;), CONFIG_3RD_LVL_ISR_TBL_OFFSET);
-
-#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */

arch/x86/include/x86_mmu.h

@@ -139,7 +139,7 @@ extern uint8_t z_shared_kernel_page_start;
 /* Called from page fault handler. ptables here is the ptage tables for the
  * faulting user thread and not the current set of page tables
  */
-extern bool z_x86_kpti_is_access_ok(void *virt, pentry_t *ptables)
+extern bool z_x86_kpti_is_access_ok(void *virt, pentry_t *ptables);
 #endif /* CONFIG_DEMAND_PAGING */
 #endif /* CONFIG_X86_KPTI */
 #endif /* CONFIG_USERSPACE */

boards/adi/max78000evkit/Kconfig.max78000evkit

@@ -0,0 +1,7 @@
+# MAX78000EVKIT boards configuration
+
+# Copyright (c) 2025 Analog Devices, Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_MAX78000EVKIT
+	select SOC_MAX78000_M4 if BOARD_MAX78000EVKIT_MAX78000_M4

boards/adi/max78000evkit/board.cmake

@@ -0,0 +1,9 @@
+# Copyright (c) 2025 Analog Devices, Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(openocd --cmd-pre-init "source [find interface/cmsis-dap.cfg]")
+board_runner_args(openocd --cmd-pre-init "source [find target/max78000.cfg]")
+board_runner_args(jlink "--device=MAX78000" "--reset-after-load")
+
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/adi/max78000evkit/board.yml

@@ -0,0 +1,9 @@
+# Copyright (c) 2025 Analog Devices, Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+board:
+  name: max78000evkit
+  full_name: MAX78000EVKIT
+  vendor: adi
+  socs:
+    - name: max78000

boards/adi/max78000evkit/doc/index.rst

@@ -0,0 +1,308 @@
+.. zephyr:board:: max78000evkit
+
+Overview
+********
+The MAX78000 evaluation kit (EV kit) provides a platform for leveraging the capabilities of the MAX78000 to build
+new generations of artificial intelligence (AI) devices. Onboard hardware includes a digital microphone, a gyroscope/accelerometer, parallel camera module support
+and a 3.5in touch-enabled color TFT display. A secondary display is driven by a power accumulator for tracking
+device power consumption over time. Uncommitted GPIO as well as analog inputs are readily accessible through
+0.1in pin headers. Primary system power as well as UART access is provided by a USB Micro-B connector. A USB
+to SPI bridge provides rapid access to onboard memory, allowing large networks or images to load quickly
+
+The Zephyr port is running on the MAX78000 MCU.
+
+.. image:: img/max78000evkit_img1.webp
+   :align: center
+   :alt: MAX78000 EVKIT
+
+Hardware
+********
+
+- MAX78000 MCU:
+
+  - Dual-Core, Low-Power Microcontroller
+
+    - Arm Cortex-M4 Processor with FPU up to 100MHz
+    - 512KB Flash and 128KB SRAM
+    - Optimized Performance with 16KB Instruction Cache
+    - Optional Error Correction Code (ECC-SEC-DED) for SRAM
+    - 32-Bit RISC-V Coprocessor up to 60MHz
+    - Up to 52 General-Purpose I/O Pins
+    - 12-Bit Parallel Camera Interface
+    - One I2S Master/Slave for Digital Audio Interface
+
+  - Neural Network Accelerator
+
+    - Highly Optimized for Deep Convolutional Neural Networks
+    - 442k 8-Bit Weight Capacity with 1,2,4,8-Bit Weights
+    - Programmable Input Image Size up to 1024 x 1024 pixels
+    - Programmable Network Depth up to 64 Layers
+    - Programmable per Layer Network Channel Widths up to 1024 Channels
+    - 1 and 2 Dimensional Convolution Processing
+    - Streaming Mode
+    - Flexibility to Support Other Network Types, Including MLP and Recurrent Neural Networks
+
+  - Power Management Maximizes Operating Time for Battery Applications
+
+    - Integrated Single-Inductor Multiple-Output (SIMO) Switch-Mode Power Supply (SMPS)
+    - 2.0V to 3.6V SIMO Supply Voltage Range
+    - Dynamic Voltage Scaling Minimizes Active Core Power Consumption
+    - 22.2μA/MHz While Loop Execution at 3.0V from Cache (CM4 Only)
+    - Selectable SRAM Retention in Low-Power Modes with Real-Time Clock (RTC) Enabled
+
+  - Security and Integrity
+
+    - Available Secure Boot
+    - AES 128/192/256 Hardware Acceleration Engine
+    - True Random Number Generator (TRNG) Seed Generator
+
+Supported Features
+==================
+
+The ``max78000evkit/max78000/m4`` board target supports the following interfaces:
+
++-----------+------------+-------------------------------------+
+| Interface | Controller | Driver/Component                    |
++===========+============+=====================================+
+| NVIC      | on-chip    | nested vector interrupt controller  |
++-----------+------------+-------------------------------------+
+| SYSTICK   | on-chip    | systick                             |
++-----------+------------+-------------------------------------+
+| CLOCK     | on-chip    | clock and reset control             |
++-----------+------------+-------------------------------------+
+| GPIO      | on-chip    | gpio                                |
++-----------+------------+-------------------------------------+
+| UART      | on-chip    | serial                              |
++-----------+------------+-------------------------------------+
+| TRNG      | on-chip    | entropy                             |
++-----------+------------+-------------------------------------+
+| I2C       | on-chip    | i2c                                 |
++-----------+------------+-------------------------------------+
+| DMA       | on-chip    | dma controller                      |
++-----------+------------+-------------------------------------+
+| Watchdog  | on-chip    | watchdog                            |
++-----------+------------+-------------------------------------+
+| SPI       | on-chip    | spi                                 |
++-----------+------------+-------------------------------------+
+| ADC       | on-chip    | adc                                 |
++-----------+------------+-------------------------------------+
+| Flash     | on-chip    | flash                               |
++-----------+------------+-------------------------------------+
+| Timer     | on-chip    | pwm                                 |
++-----------+------------+-------------------------------------+
+| RTC       | on-chip    | real time clock                     |
++-----------+------------+-------------------------------------+
+| Timer     | on-chip    | counter                             |
++-----------+------------+-------------------------------------+
+| W1        | on-chip    | one wire master                     |
++--------------------------------------------------------------+
+
+Connections and IOs
+===================
+
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| Name      | Name              | Settings          | Description                                                                                  |
++===========+===================+===================+==============================================================================================+
+| JP1       | LED1 EN           | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | Enables auxiliary LED1                                                                  | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | Open          | |  | Disables auxiliary LED1                                                                 | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP2       | LED2 EN           | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | Enables auxiliary LED2                                                                  | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | Open          | |  | Disables auxiliary LED2                                                                 | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP3       | TRIG1             | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | Enables power monitor event trigger 1                                                   | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | Open          | |  | Disables power monitor event trigger 1                                                  | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP4       | TRIG2             | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | Enables power monitor event trigger 2                                                   | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | Open          | |  | Disables power monitor event trigger 2                                                  | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP5       | VREGI             | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | Enables 3V3 VREGI power                                                                 | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | Open          | |  | Disables 3V3 VREGI power                                                                | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP6       | VREGIA            | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | Enables 3V3 VREGIA power                                                                | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | Open          | |  | Disables 3V3 VREGIA power                                                               | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP7       | CNN BOOST         | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | Enables 1V1 boost LDO power                                                             | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | Open          | |  | Disables 1V1 boost LDO power                                                            | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP8       | VDDA              | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | Internal SIMO powers VDDA                                                               | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 2-3           | |  | External LDO powers VDDA                                                                | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP9       | VDDIO             | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | Internal SIMO powers VDDIO                                                              | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 2-3           | |  | External LDO powers VDDIO                                                               | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP10      | VDDIOH            | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | DUT LDO powers VDDIOH                                                                   | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 2-3           | |  | AUX LDO powers VDDIOH                                                                   | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP11      | VCOREB            | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | Internal SIMO powers VCOREB                                                             | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 2-3           | |  | External LDO powers VCOREB                                                              | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP12      | VCOREA            | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | Internal SIMO powers VCOREA                                                             | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 2-3           | |  | External LDO powers VCOREA                                                              | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP13      | VREGI PM BYPASS   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | Bypasses power monitor shunt                                                            | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | Open          | |  | Enables power monitoring using power accumulator                                        | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP14      | CNN 1V1           | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | Connects 1V1 boost LDO to VCOREA                                                        | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | Open          | |  | Disables 1V1 boost LDO                                                                  | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP15      | VCOREA PM BYPASS  | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | Bypasses power monitor shunt                                                            | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | Open          | |  | Enables power monitoring using power accumulator                                        | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP16      | VCOREB PM BYPASS  | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | Bypasses power monitor shunt                                                            | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | Open          | |  | Enables power monitoring using power accumulator                                        | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP17      | VREG_A PM BYPASS  | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | Bypasses power monitor shunt                                                            | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | Open          | |  | Enables power monitoring using power accumulator                                        | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP18      | RESET EN          | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | Enables RV JTAG adapter to perform full system reset                                    | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | Open          | |  | Disables system reset by RV JTAG adapter                                                | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP19      | TFT BL            | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | Enables main TFT screen backlight                                                       | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | Open          | |  | Disables main TFT screen backlight                                                      | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP20      | I2S CLK SEL       | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | Onboard 12.288MHz oscillator drives I2S clock                                           | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 2-3           | |  | External 1V8 CMOS LEVEL source drives I2S clock                                         | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP21      | DUT I             | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | DUT 3V3 total current monitor point                                                     | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | Open          | |  | Open to insert current meter                                                            | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JP22      | USB-SPI/CAM       | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2           | |  | Enables USB-SPI bridge                                                                  | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 2-3           | |  | Enables camera                                                                          | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JH1       | UART 0 EN         | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | 1-2, 3-4      | |  | Enables USB-UART0 bridge, software flow control                                         | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | All Open      | |  | Disables USB-UART0 bridge, allows reuse of port pins                                    | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+| JH2       | UART 1 EN         | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | |All installed  | |  | Enables USB-UART1 bridge                                                                | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   | | All Open      | |  | Disables USB-UART1 bridge, allows reuse of port pins                                    | |
+|           |                   | +---------------+ |  +-----------------------------------------------------------------------------------------+ |
+|           |                   |                   |                                                                                              |
++-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
+
+Programming and Debugging
+*************************
+
+Flashing
+========
+
+The MAX78000 MCU can be flashed by connecting an external debug probe to the
+SWD port. SWD debug can be accessed through the Cortex 10-pin connector, JH5.
+Logic levels are fixed to VDDIO (1.8V).
+
+Once the debug probe is connected to your host computer, then you can simply run the
+``west flash`` command to write a firmware image into flash.
+
+.. note::
+
+   This board uses OpenOCD as the default debug interface. You can also use
+   a Segger J-Link with Segger's native tooling by overriding the runner,
+   appending ``--runner jlink`` to your ``west`` command(s). The J-Link should
+   be connected to the standard 2*5 pin debug connector (JH5) using an
+   appropriate adapter board and cable.
+
+Debugging
+=========
+
+Please refer to the `Flashing`_ section and run the ``west debug`` command
+instead of ``west flash``.
+
+References
+**********
+
+- `MAX78000EVKIT web page`_
+
+.. _MAX78000EVKIT web page:
+   https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max78000evkit.html

boards/adi/max78000evkit/max78000evkit_max78000_m4.dts

@@ -0,0 +1,132 @@
+/*
+ * Copyright (c) 2025 Analog Devices, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <adi/max32/max78000.dtsi>
+#include <adi/max32/max78000-pinctrl.dtsi>
+#include <zephyr/dt-bindings/gpio/adi-max32-gpio.h>
+#include <zephyr/dt-bindings/input/input-event-codes.h>
+
+/ {
+	model = "Analog Devices MAX78000EVKIT";
+	compatible = "adi,max78000evkit";
+
+	chosen {
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,sram = &sram2;
+		zephyr,flash = &flash0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led1: led_1 {
+			gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
+			label = "Green LED";
+		};
+
+		led2: led_2 {
+			gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
+			label = "Red LED";
+		};
+	};
+
+	buttons {
+		compatible = "gpio-keys";
+
+		pb1: pb1 {
+			gpios = <&gpio2 6 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+			label = "SW2";
+			zephyr,code = <INPUT_KEY_0>;
+		};
+
+		pb2: pb2 {
+			gpios = <&gpio2 7 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+			label = "SW3";
+			zephyr,code = <INPUT_KEY_1>;
+		};
+
+		pb_wakeup: pb_wakeup {
+			gpios = <&gpio3 1 (GPIO_PULL_UP | GPIO_ACTIVE_LOW
+				| MAX32_GPIO_VSEL_VDDIOH)>;
+			label = "Wakeup";
+			zephyr,code = <INPUT_KEY_WAKEUP>;
+		};
+	};
+
+	/* These aliases are provided for compatibility with samples */
+	aliases {
+		led0 = &led1;
+		led1 = &led2;
+		sw0 = &pb1;
+		sw1 = &pb2;
+		watchdog0 = &wdt0;
+	};
+};
+
+&uart0 {
+	pinctrl-0 = <&uart0a_tx_p0_1 &uart0a_rx_p0_0>;
+	pinctrl-names = "default";
+	current-speed = <115200>;
+	data-bits = <8>;
+	parity = "none";
+	status = "okay";
+};
+
+&clk_ipo {
+	status = "okay";
+};
+
+&clk_ibro {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&gpio2 {
+	status = "okay";
+};
+
+&gpio3 {
+	status = "okay";
+};
+
+&trng {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+	pinctrl-0 = <&i2c0_scl_p0_10 &i2c0_sda_p0_11>;
+	pinctrl-names = "default";
+};
+
+&spi0 {
+	status = "okay";
+	pinctrl-0 = <&spi0_mosi_p0_5 &spi0_miso_p0_6 &spi0_sck_p0_7 &spi0_ss0_p0_4>;
+	pinctrl-names = "default";
+};
+
+&dma0 {
+	status = "okay";
+};
+
+&wdt0 {
+	status = "okay";
+};
+
+&w1 {
+	pinctrl-0 = <&owm_io_p0_18 &owm_pe_p0_19>;
+	pinctrl-names = "default";
+};

boards/adi/max78000evkit/max78000evkit_max78000_m4.yaml

@@ -0,0 +1,24 @@
+identifier: max78000evkit/max78000/m4
+name: max78000evkit m4
+vendor: adi
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools
+supported:
+  - adc
+  - counter
+  - dma
+  - flash
+  - gpio
+  - i2c
+  - pwm
+  - serial
+  - spi
+  - trng
+  - w1
+  - watchdog
+ram: 128
+flash: 512

boards/adi/max78000evkit/max78000evkit_max78000_m4_defconfig

@@ -0,0 +1,16 @@
+# Copyright (c) 2025 Analog Devices, Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+# Console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Enable UART
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y

boards/adi/max78000fthr/Kconfig.max78000fthr

@@ -0,0 +1,7 @@
+# MAX78000FTHR boards configuration
+
+# Copyright (c) 2025 Analog Devices, Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_MAX78000FTHR
+	select SOC_MAX78000_M4 if BOARD_MAX78000FTHR_MAX78000_M4

boards/adi/max78000fthr/board.cmake

@@ -0,0 +1,7 @@
+# Copyright (c) 2025 Analog Devices, Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(openocd --cmd-pre-init "source [find interface/cmsis-dap.cfg]")
+board_runner_args(openocd --cmd-pre-init "source [find target/max78000.cfg]")
+
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

boards/adi/max78000fthr/board.yml

@@ -0,0 +1,9 @@
+# Copyright (c) 2025 Analog Devices, Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+board:
+  name: max78000fthr
+  full_name: MAX78000FTHR
+  vendor: adi
+  socs:
+    - name: max78000

boards/adi/max78000fthr/doc/index.rst

@@ -0,0 +1,210 @@
+.. zephyr:board:: max78000fthr
+
+Overview
+********
+The MAX78000FTHR is a rapid development platform to help engineers quickly implement ultra low-power, artificial
+intelligence (AI) solutions using the MAX78000 Arm® Cortex®-M4F processor with an integrated Convolutional Neural Network
+accelerator. The board also includes the MAX20303 PMIC for battery and power management. The form factor is 0.9in x 2.6in
+dual-row header footprint that is compatible with Adafruit Feather Wing peripheral expansion boards. The board includes a
+variety of peripherals, such as a CMOS VGA image sensor, digital microphone, low-power stereo audio CODEC, 1MB QSPI
+SRAM, micro SD card connector, RGB indicator LED, and pushbutton. The MAX78000FTHR provides a poweroptimized flexible
+platform for quick proof-of-concepts and early software development to enhance time to market.
+
+The Zephyr port is running on the MAX78000 MCU.
+
+.. image:: img/max78000fthr_img1.webp
+   :align: center
+   :alt: MAX78000 FTHR
+
+Hardware
+********
+
+- MAX78000 MCU:
+
+  - Dual-Core, Low-Power Microcontroller
+
+    - Arm Cortex-M4 Processor with FPU up to 100MHz
+    - 512KB Flash and 128KB SRAM
+    - Optimized Performance with 16KB Instruction Cache
+    - Optional Error Correction Code (ECC-SEC-DED) for SRAM
+    - 32-Bit RISC-V Coprocessor up to 60MHz
+    - Up to 52 General-Purpose I/O Pins
+    - 12-Bit Parallel Camera Interface
+    - One I2S Master/Slave for Digital Audio Interface
+
+  - Neural Network Accelerator
+
+    - Highly Optimized for Deep Convolutional Neural Networks
+    - 442k 8-Bit Weight Capacity with 1,2,4,8-Bit Weights
+    - Programmable Input Image Size up to 1024 x 1024 pixels
+    - Programmable Network Depth up to 64 Layers
+    - Programmable per Layer Network Channel Widths up to 1024 Channels
+    - 1 and 2 Dimensional Convolution Processing
+    - Streaming Mode
+    - Flexibility to Support Other Network Types, Including MLP and Recurrent Neural Networks
+
+  - Power Management Maximizes Operating Time for Battery Applications
+
+    - Integrated Single-Inductor Multiple-Output (SIMO) Switch-Mode Power Supply (SMPS)
+    - 2.0V to 3.6V SIMO Supply Voltage Range
+    - Dynamic Voltage Scaling Minimizes Active Core Power Consumption
+    - 22.2μA/MHz While Loop Execution at 3.0V from Cache (CM4 Only)
+    - Selectable SRAM Retention in Low-Power Modes with Real-Time Clock (RTC) Enabled
+
+  - Security and Integrity
+
+    - Available Secure Boot
+    - AES 128/192/256 Hardware Acceleration Engine
+    - True Random Number Generator (TRNG) Seed Generator
+
+Supported Features
+==================
+
+The ``max78000fthr/max78000/m4`` board target supports the following interfaces:
+
++-----------+------------+-------------------------------------+
+| Interface | Controller | Driver/Component                    |
++===========+============+=====================================+
+| NVIC      | on-chip    | nested vector interrupt controller  |
++-----------+------------+-------------------------------------+
+| SYSTICK   | on-chip    | systick                             |
++-----------+------------+-------------------------------------+
+| CLOCK     | on-chip    | clock and reset control             |
++-----------+------------+-------------------------------------+
+| GPIO      | on-chip    | gpio                                |
++-----------+------------+-------------------------------------+
+| UART      | on-chip    | serial                              |
++-----------+------------+-------------------------------------+
+| TRNG      | on-chip    | entropy                             |
++-----------+------------+-------------------------------------+
+| I2C       | on-chip    | i2c                                 |
++-----------+------------+-------------------------------------+
+| DMA       | on-chip    | dma controller                      |
++-----------+------------+-------------------------------------+
+| Watchdog  | on-chip    | watchdog                            |
++-----------+------------+-------------------------------------+
+| SPI       | on-chip    | spi                                 |
++-----------+------------+-------------------------------------+
+| ADC       | on-chip    | adc                                 |
++-----------+------------+-------------------------------------+
+| Flash     | on-chip    | flash                               |
++-----------+------------+-------------------------------------+
+| Timer     | on-chip    | pwm                                 |
++-----------+------------+-------------------------------------+
+| RTC       | on-chip    | real time clock                     |
++-----------+------------+-------------------------------------+
+| Timer     | on-chip    | counter                             |
++-----------+------------+-------------------------------------+
+| W1        | on-chip    | one wire master                     |
++--------------------------------------------------------------+
+
+Connections and IOs
+===================
+
+J8 Pinout
+**********
+
++---------+----------+-------------------------------------------------------------------------------------------------+
+| Pin     | Name     | Description                                                                                     |
++=========+==========+=================================================================================================+
+| 1       | RST      | Master Reset Signal                                                                             |
++---------+----------+-------------------------------------------------------------------------------------------------+
+| 2       | 3V3      | 3.3V Output. Typically used to provide 3.3V to peripherals connected to the expansion headers.  |
++---------+----------+-------------------------------------------------------------------------------------------------+
+| 3       | 1V8      | 1.8V Output. Typically used to provide 1.8V to peripherals connected to the expansion headers.  |
++---------+----------+-------------------------------------------------------------------------------------------------+
+| 4       | GND      | Ground                                                                                          |
++---------+----------+-------------------------------------------------------------------------------------------------+
+| 5       | P2_3     | GPIO or Analog Input (AIN3 channel).                                                            |
++---------+----------+-------------------------------------------------------------------------------------------------+
+| 6       | P2_4     | GPIO or Analog Input (AIN4 channel).                                                            |
++---------+----------+-------------------------------------------------------------------------------------------------+
+| 7       | P1_1     | GPIO or UART2 Tx signal                                                                         |
++---------+----------+-------------------------------------------------------------------------------------------------+
+| 8       | P1_0     | GPIO or UART2 Rx signal                                                                         |
++---------+----------+-------------------------------------------------------------------------------------------------+
+| 9       | MPC1     | GPIO controlled by PMIC through I2C interface. Open drain or push-pull programmable             |
++---------+----------+-------------------------------------------------------------------------------------------------+
+| 10      | MPC2     | GPIO controlled by PMIC through I2C interface. Open drain or push-pull programmable             |
++---------+----------+-------------------------------------------------------------------------------------------------+
+| 11      | P0_7     | GPIO or QSPI0 clock signal. Shared with SD card and on-board QSPI SRAM                          |
++---------+----------+-------------------------------------------------------------------------------------------------+
+| 12      | P0_5     | GPIO or QSPI0 MOSI signal. Shared with SD card and on-board QSPI SRAM                           |
++---------+----------+-------------------------------------------------------------------------------------------------+
+| 13      | P0_6     | GPIO or QSPI0 MISO signal. Shared with SD card and on-board QSPI SRAM                           |
++---------+----------+-------------------------------------------------------------------------------------------------+
+| 14      | P2_6     | GPIO or LPUART Rx signal                                                                        |
++---------+----------+-------------------------------------------------------------------------------------------------+
+| 15      | P2_7     | GPIO or LPUART Tx signal                                                                        |
++---------+----------+-------------------------------------------------------------------------------------------------+
+| 16      | GND      | Ground                                                                                          |
++---------+----------+-------------------------------------------------------------------------------------------------+
+
+J4 Pinout
+**********
+
++---------+----------+-----------------------------------------------------------------------------------------------------------+
+| Pin     | Name     | Description                                                                                               |
++=========+==========+===========================================================================================================+
+| 1       | SYS      | SYS Switched Connection to the Battery. This is the primary system power supply and automatically         |
+|         |          | switches between the battery voltage and the USB supply when available.                                   |
++---------+----------+-----------------------------------------------------------------------------------------------------------+
+| 2       | PWR      | Turns off the PMIC if shorted to Ground for 13 seconds. Hard power-down button.                           |
++---------+----------+-----------------------------------------------------------------------------------------------------------+
+| 3       | VBUS     | USB VBUS Signal. This can be used as a 5V supply when connected to USB. This pin can also be              |
+|         |          | used as an input to power the board.                                                                      |
++---------+----------+-----------------------------------------------------------------------------------------------------------+
+| 4       | P1_6     | GPIO                                                                                                      |
++---------+----------+-----------------------------------------------------------------------------------------------------------+
+| 5       | MPC3     | GPIO controlled by PMIC through the I2C interface. Open drain or push-pull programmable.                  |
++---------+----------+-----------------------------------------------------------------------------------------------------------+
+| 6       | P0_9     | GPIO or QSPI0 SDIO3 signal. Shared with SD card and on-board QSPI SRAM.                                   |
++---------+----------+-----------------------------------------------------------------------------------------------------------+
+| 7       | P0_8     | GPIO or QSPI0 SDIO2 signal. Shared with SD Card and on-board QSPI SRAM.                                   |
++---------+----------+-----------------------------------------------------------------------------------------------------------+
+| 8       | P0_11    | GPIO or QSPI0 slave select signal                                                                         |
++---------+----------+-----------------------------------------------------------------------------------------------------------+
+| 9       | P0_19    | GPIO                                                                                                      |
++---------+----------+-----------------------------------------------------------------------------------------------------------+
+| 10      | P3_1     | GPIO or Wake-up signal. This pin is 3.3V only.                                                            |
++---------+----------+-----------------------------------------------------------------------------------------------------------+
+| 11      | P0_16    | GPIO or I2C1 SCL signal. An on-board level shifter allows selecting 1.8V or 3.3V operation through        |
+|         |          | R15 or R20 resistors. Do not populate both.                                                               |
++---------+----------+-----------------------------------------------------------------------------------------------------------+
+| 12      | P0_17    | GPIO or I2C1 SDA signal. An on-board level shifter allows selecting 1.8V or 3.3V operation through        |
+|         |          | R15 or R20 resistors. Do not populate both.                                                               |
++---------+----------+-----------------------------------------------------------------------------------------------------------+
+
+Programming and Debugging
+*************************
+
+Flashing
+========
+
+The MAX32625 microcontroller on the board is preprogrammed with DAPLink firmware.
+It allows debugging and programming of the MAX78000 Arm core over USB.
+
+Once the debug probe is connected to your host computer, then you can simply run the
+``west flash`` command to write a firmware image into flash.
+
+.. note::
+
+   This board uses OpenOCD as the default debug interface. You can also use
+   a Segger J-Link with Segger's native tooling by overriding the runner,
+   appending ``--runner jlink`` to your ``west`` command(s). The J-Link should
+   be connected to the standard 2*5 pin debug connector (JH5) using an
+   appropriate adapter board and cable.
+
+Debugging
+=========
+
+Please refer to the `Flashing`_ section and run the ``west debug`` command
+instead of ``west flash``.
+
+References
+**********
+
+- `MAX78000FTHR web page`_
+
+.. _MAX78000FTHR web page:
+   https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max78000fthr.html

boards/adi/max78000fthr/max78000fthr_max78000_m4.dts

@@ -0,0 +1,130 @@
+/*
+ * Copyright (c) 2025 Analog Devices, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <adi/max32/max78000.dtsi>
+#include <adi/max32/max78000-pinctrl.dtsi>
+#include <zephyr/dt-bindings/gpio/adi-max32-gpio.h>
+#include <zephyr/dt-bindings/input/input-event-codes.h>
+
+/ {
+	model = "Analog Devices MAX78000FTHR";
+	compatible = "adi,max78000fthr";
+
+	chosen {
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,sram = &sram2;
+		zephyr,flash = &flash0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led1: led_1 {
+			gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
+			label = "Red LED";
+		};
+
+		led2: led_2 {
+			gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
+			label = "Green LED";
+		};
+
+		led3: led_3 {
+			gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
+			label = "Blue LED";
+		};
+	};
+
+	buttons {
+		compatible = "gpio-keys";
+
+		pb1: pb1 {
+			gpios = <&gpio0 2 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+			label = "SW1";
+			zephyr,code = <INPUT_KEY_0>;
+		};
+
+		pb2: pb2 {
+			gpios = <&gpio1 7 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+			label = "SW2";
+			zephyr,code = <INPUT_KEY_1>;
+		};
+	};
+
+	/* These aliases are provided for compatibility with samples */
+	aliases {
+		led0 = &led1;
+		led1 = &led2;
+		sw0 = &pb1;
+		sw1 = &pb2;
+		watchdog0 = &wdt0;
+	};
+};
+
+&uart0 {
+	pinctrl-0 = <&uart0a_tx_p0_1 &uart0a_rx_p0_0>;
+	pinctrl-names = "default";
+	current-speed = <115200>;
+	data-bits = <8>;
+	parity = "none";
+	status = "okay";
+};
+
+&clk_ipo {
+	status = "okay";
+};
+
+&clk_ibro {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&gpio2 {
+	status = "okay";
+};
+
+&gpio3 {
+	status = "okay";
+};
+
+&trng {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+	pinctrl-0 = <&i2c0_scl_p0_10 &i2c0_sda_p0_11>;
+	pinctrl-names = "default";
+};
+
+&spi0 {
+	status = "okay";
+	pinctrl-0 = <&spi0_mosi_p0_5 &spi0_miso_p0_6 &spi0_sck_p0_7 &spi0_ss0_p0_4>;
+	pinctrl-names = "default";
+};
+
+&dma0 {
+	status = "okay";
+};
+
+&wdt0 {
+	status = "okay";
+};
+
+&w1 {
+	pinctrl-0 = <&owm_io_p0_6 &owm_pe_p0_7>;
+	pinctrl-names = "default";
+};

boards/adi/max78000fthr/max78000fthr_max78000_m4.yaml

@@ -0,0 +1,24 @@
+identifier: max78000fthr/max78000/m4
+name: max78000fthr m4
+vendor: adi
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools
+supported:
+  - adc
+  - counter
+  - dma
+  - flash
+  - gpio
+  - i2c
+  - pwm
+  - serial
+  - spi
+  - trng
+  - w1
+  - watchdog
+ram: 128
+flash: 512

boards/adi/max78000fthr/max78000fthr_max78000_m4_defconfig

@@ -0,0 +1,16 @@
+# Copyright (c) 2025 Analog Devices, Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+# Console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Enable UART
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y

boards/ambiq/apollo3_evb/apollo3_evb.dts

@@ -140,7 +140,6 @@
 };
 
 &spi0 {
-	compatible = "ambiq,spi";
 	pinctrl-0 = <&spi0_default>;
 	pinctrl-names = "default";
 	cs-gpios = <&gpio0_31 11 GPIO_ACTIVE_LOW>;
@@ -149,7 +148,6 @@
 };
 
 &i2c3 {
-	compatible = "ambiq,i2c";
 	pinctrl-0 = <&i2c3_default>;
 	pinctrl-names = "default";
 	clock-frequency = <I2C_BITRATE_STANDARD>;
@@ -196,7 +194,6 @@
 };
 
 &adc0 {
-	compatible = "ambiq,adc";
 	pinctrl-0 = <&adc0_default>;
 	pinctrl-names = "default";
 	status = "disabled";

boards/ambiq/apollo3p_evb/apollo3p_evb.dts

@@ -118,7 +118,6 @@
 };
 
 &spi0 {
-	compatible = "ambiq,spi";
 	pinctrl-0 = <&spi0_default>;
 	pinctrl-names = "default";
 	cs-gpios = <&gpio0_31 11 GPIO_ACTIVE_LOW>;
@@ -127,7 +126,6 @@
 };
 
 &i2c3 {
-	compatible = "ambiq,i2c";
 	pinctrl-0 = <&i2c3_default>;
 	pinctrl-names = "default";
 	clock-frequency = <I2C_BITRATE_STANDARD>;
@@ -174,7 +172,6 @@
 };
 
 &adc0 {
-	compatible = "ambiq,adc";
 	pinctrl-0 = <&adc0_default>;
 	pinctrl-names = "default";
 	status = "disabled";

boards/ambiq/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb.dts

@@ -90,7 +90,6 @@
 };
 
 &i2c0 {
-	compatible = "ambiq,i2c";
 	pinctrl-0 = <&i2c0_default>;
 	pinctrl-names = "default";
 	clock-frequency = <I2C_BITRATE_STANDARD>;
@@ -100,7 +99,6 @@
 };
 
 &spi1 {
-	compatible = "ambiq,spi";
 	pinctrl-0 = <&spi1_default>;
 	pinctrl-names = "default";
 	cs-gpios = <&gpio0_31 11 GPIO_ACTIVE_LOW>;

boards/ambiq/apollo4p_evb/apollo4p_evb.dts

@@ -76,7 +76,6 @@
 };
 
 &adc0 {
-	compatible = "ambiq,adc";
 	pinctrl-0 = <&adc0_default>;
 	pinctrl-names = "default";
 	status = "okay";
@@ -96,7 +95,6 @@
 };
 
 &iom0_i2c {
-	compatible = "ambiq,i2c";
 	pinctrl-0 = <&i2c0_default>;
 	pinctrl-names = "default";
 	clock-frequency = <I2C_BITRATE_STANDARD>;
@@ -106,7 +104,6 @@
 };
 
 &iom1_spi {
-	compatible = "ambiq,spi";
 	pinctrl-0 = <&spi1_default>;
 	pinctrl-names = "default";
 	cs-gpios = <&gpio0_31 11 GPIO_ACTIVE_LOW>;

boards/common/openocd-stm32.board.cmake

@@ -0,0 +1,20 @@
+# SPDX-License-Identifier: Apache-2.0
+
+if(CONFIG_SOC_SERIES_STM32L0X OR CONFIG_SOC_SERIES_STM32L1X)
+  board_runner_args(openocd "--cmd-erase=stm32l1x mass_erase 0")
+elseif(CONFIG_SOC_SERIES_STM32L4X OR
+       CONFIG_SOC_SERIES_STM32L5X OR
+       CONFIG_SOC_SERIES_STM32U5X OR
+       CONFIG_SOC_SERIES_STM32WBX OR
+       CONFIG_SOC_SERIES_STM32G0X OR
+       CONFIG_SOC_SERIES_STM32G4X)
+  board_runner_args(openocd "--cmd-erase=stm32l4x mass_erase 0")
+elseif(CONFIG_SOC_SERIES_STM32F0X OR
+       CONFIG_SOC_SERIES_STM32F1X OR
+       CONFIG_SOC_SERIES_STM32F3X)
+  board_runner_args(openocd "--cmd-erase=stm32f1x mass_erase 0")
+elseif(CONFIG_SOC_SERIES_STM32F2X OR
+       CONFIG_SOC_SERIES_STM32F4X OR
+       CONFIG_SOC_SERIES_STM32F7X)
+  board_runner_args(openocd "--cmd-erase=stm32f2x mass_erase 0")
+endif()

boards/common/openocd.board.cmake

@@ -20,3 +20,6 @@ board_finalize_runner_args(openocd
   --cmd-load "${OPENOCD_CMD_LOAD_DEFAULT}"
   --cmd-verify "${OPENOCD_CMD_VERIFY_DEFAULT}"
   )
+
+# Manufacturer common options
+include(${CMAKE_CURRENT_LIST_DIR}/openocd-stm32.board.cmake)

boards/espressif/esp32s2_devkitc/esp32s2_devkitc.dts

@@ -23,7 +23,7 @@
 	};
 
 	chosen {
-		zephyr,sram = &sram0;
+		zephyr,sram = &sram1;
 		zephyr,console = &uart0;
 		zephyr,shell-uart = &uart0;
 		zephyr,flash = &flash0;

boards/espressif/esp32s2_saola/esp32s2_saola.dts

@@ -23,7 +23,7 @@
 	};
 
 	chosen {
-		zephyr,sram = &sram0;
+		zephyr,sram = &sram1;
 		zephyr,console = &uart0;
 		zephyr,shell-uart = &uart0;
 		zephyr,flash = &flash0;

boards/franzininho/esp32s2_franzininho/esp32s2_franzininho.dts

@@ -22,7 +22,7 @@
 	};
 
 	chosen {
-		zephyr,sram = &sram0;
+		zephyr,sram = &sram1;
 		zephyr,console = &uart0;
 		zephyr,shell-uart = &uart0;
 		zephyr,flash = &flash0;

boards/intel/niosv_g/niosv_g.dts

@@ -27,7 +27,7 @@
 };
 
 &mtimer {
-	reg = <0x90000 0x10>;
+	reg = <0x90000 0x8 0x90008 0x8>;
 };
 
 &uart0 {

boards/intel/niosv_m/niosv_m.dts

@@ -27,7 +27,7 @@
 };
 
 &mtimer {
-	reg = <0x90000 0x10>;
+	reg = <0x90000 0x8 0x90008 0x8>;
 };
 
 &uart0 {

boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_appcpu.dts

@@ -13,7 +13,7 @@
 	compatible = "espressif,esp32";
 
 	chosen {
-		zephyr,sram = &sram0;
+		zephyr,sram = &sram1;
 		zephyr,ipc_shm = &shm0;
 		zephyr,ipc = &ipm0;
 		zephyr,flash = &flash0;

boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_procpu.dts

@@ -22,7 +22,7 @@
 	};
 
 	chosen {
-		zephyr,sram = &sram0;
+		zephyr,sram = &sram1;
 		zephyr,console = &uart0;
 		zephyr,shell-uart = &uart0;
 		zephyr,flash = &flash0;

boards/native/nrf_bsim/doc/nrf54l15bsim.rst

@@ -40,6 +40,7 @@ This boards include models of some of the nRF54L15 SOC peripherals:
 * AAR (Accelerated Address Resolver)
 * CCM (AES CCM mode encryption)
 * CLOCK (Clock control)
+* CRACEN (Crypto Accelerator Engine)
 * DPPI (Distributed Programmable Peripheral Interconnect)
 * ECB (AES electronic codebook mode encryption)
 * EGU (Event Generator Unit)
@@ -49,7 +50,6 @@ This boards include models of some of the nRF54L15 SOC peripherals:
 * PPIB (PPI Bridge)
 * RADIO
 * RRAMC (Resistive RAM Controller)
-* RTC (Real Time Counter)
 * TEMP (Temperature sensor)
 * TIMER
 * UARTE (UART with Easy DMA)

boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.dts

@@ -55,7 +55,7 @@
 
 	rng: rng {
 		status = "okay";
-		compatible = "zephyr,native-posix-rng";
+		compatible = "nordic,nrf-cracen-ctrdrbg";
 	};
 
 	psa_rng: psa-rng {

boards/nxp/frdm_mcxn947/doc/index.rst

@@ -108,13 +108,13 @@ The FRDM-MCXN947 board configuration supports the following hardware features:
 Dual Core samples
 *****************
 
-+-----------+------------------+----------------------+
++-----------+-------------------+----------------------+
-| Core      | Boot Address     | Comment              |
+| Core      | Boot Address      | Comment              |
-+===========+==================+======================+
++===========+===================+======================+
-| CPU0      | 0x10000000[992K] | primary core flash   |
+| CPU0      | 0x10000000[1856K] | primary core flash   |
-+-----------+------------------+----------------------+
++-----------+-------------------+----------------------+
-| CPU1      | 0x101ce000[200K] | secondary core flash |
+| CPU1      | 0x101d0000[192K]  | secondary core flash |
-+-----------+------------------+----------------------+
++-----------+-------------------+----------------------+
 
 +----------+------------------+-----------------------+
 | Memory   | Address[Size]    | Comment               |

boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi

@@ -149,6 +149,10 @@ nxp_8080_touch_panel_i2c: &flexcomm2_lpi2c2 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 
+		/*
+		 * Partition sizes must be aligned
+		 * to the flash memory sector size of 8KB.
+		 */
 		boot_partition: partition@0 {
 			label = "mcuboot";
 			reg = <0x00000000 DT_SIZE_K(80)>;
@@ -158,15 +162,15 @@ nxp_8080_touch_panel_i2c: &flexcomm2_lpi2c2 {
 		 */
 		slot0_partition: partition@14000 {
 			label = "image-0";
-			reg = <0x00014000 DT_SIZE_K(884)>;
+			reg = <0x00014000 DT_SIZE_K(888)>;
 		};
-		slot1_partition: partition@F1000 {
+		slot1_partition: partition@F2000 {
 			label = "image-1";
-			reg = <0x000F1000 DT_SIZE_K(884)>;
+			reg = <0x000F2000 DT_SIZE_K(888)>;
 		};
-		cpu1_partition: partition@1CE000 {
+		cpu1_partition: partition@1D0000 {
 			label = "cpu1-image";
-			reg = <0x001CE000 DT_SIZE_K(200)>;
+			reg = <0x001D0000 DT_SIZE_K(192)>;
 		};
 		/* storage_partition is placed in WINBOND flash memory*/
 	};

boards/nxp/frdm_mcxw71/frdm_mcxw71-pinctrl.dtsi

@@ -32,6 +32,16 @@
 		};
 	};
 
+	pinmux_lpi2c0: pinmux_lpi2c0 {
+		group0 {
+			pinmux = <LPI2C0_SCL_PTA19>,
+				<LPI2C0_SDA_PTA18>;
+			drive-strength = "low";
+			slew-rate = "fast";
+			drive-open-drain;
+		};
+	};
+
 	pinmux_lpi2c1: pinmux_lpi2c1 {
 		group0 {
 			pinmux = <LPI2C1_SCL_PTB5>,

boards/nxp/frdm_rw612/frdm_rw612_common.dtsi

@@ -1,5 +1,5 @@
 /*
- * Copyright 2024 NXP
+ * Copyright 2024-2025 NXP
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -22,6 +22,8 @@
 		zephyr,flash = &w25q512jvfiq;
 		zephyr,console = &flexcomm3;
 		zephyr,shell-uart = &flexcomm3;
+		zephyr,flash-controller = &w25q512jvfiq;
+		zephyr,code-partition = &slot0_partition;
 	};
 
 	leds {

boards/nxp/mimxrt1040_evk/doc/index.rst

@@ -89,36 +89,37 @@ NXP prioritizes enabling the superset board with NXP's Full Platform Support for
 Zephyr.  Therefore, the mimxrt1064_evk board may have additional features
 already supported, which can also be re-used on this mimxrt1040_evk board:
 
-+-----------+------------+-------------------------------------+
++-----------+------------+-------------------------------------------------+
-| Interface | Controller | Driver/Component                    |
+| Interface | Controller | Driver/Component                                |
-+===========+============+=====================================+
++===========+============+=================================================+
-| NVIC      | on-chip    | nested vector interrupt controller  |
+| NVIC      | on-chip    | nested vector interrupt controller              |
-+-----------+------------+-------------------------------------+
++-----------+------------+-------------------------------------------------+
-| SYSTICK   | on-chip    | systick                             |
+| SYSTICK   | on-chip    | systick                                         |
-+-----------+------------+-------------------------------------+
++-----------+------------+-------------------------------------------------+
-| GPIO      | on-chip    | gpio                                |
+| GPIO      | on-chip    | gpio                                            |
-+-----------+------------+-------------------------------------+
++-----------+------------+-------------------------------------------------+
-| UART      | on-chip    | serial port-polling;                |
+| UART      | on-chip    | serial port-polling;                            |
-|           |            | serial port-interrupt               |
+|           |            | serial port-interrupt                           |
-+-----------+------------+-------------------------------------+
++-----------+------------+-------------------------------------------------+
-| PWM       | on-chip    | pwm                                 |
+| PWM       | on-chip    | pwm                                             |
-+-----------+------------+-------------------------------------+
++-----------+------------+-------------------------------------------------+
-| ADC       | on-chip    | adc                                 |
+| ADC       | on-chip    | adc                                             |
-+-----------+------------+-------------------------------------+
++-----------+------------+-------------------------------------------------+
-| SPI       | on-chip    | spi                                 |
+| SPI       | on-chip    | spi                                             |
-+-----------+------------+-------------------------------------+
++-----------+------------+-------------------------------------------------+
-| DMA       | on-chip    | dma                                 |
+| DMA       | on-chip    | dma                                             |
-+-----------+------------+-------------------------------------+
++-----------+------------+-------------------------------------------------+
-| I2C       | on-chip    | i2c                                 |
+| I2C       | on-chip    | i2c                                             |
-+-----------+------------+-------------------------------------+
++-----------+------------+-------------------------------------------------+
-| GPT       | on-chip    | gpt                                 |
+| GPT       | on-chip    | gpt                                             |
-+-----------+------------+-------------------------------------+
++-----------+------------+-------------------------------------------------+
-| DISPLAY   | on-chip    | eLCDIF. Tested with                 |
+| DISPLAY   | on-chip    | eLCDIF. Tested with                             |
-|           |            | :ref:`rk043fn02h_ct`, and           |
+|           |            | :ref:`rk043fn02h_ct`, and                       |
-|           |            | :ref:`rk043fn66hs_ctg` shields      |
+|           |            | :ref:`rk043fn66hs_ctg` shields                  |
-+-----------+------------+-------------------------------------+
++-----------+------------+-------------------------------------------------+
-| UART      | NXP NW61x  | M.2 WIFI/BT module                  |
+| UART      | NXP IW61x  | M.2 WIFI/BT module                              |
-+-----------+------------+-------------------------------------+
+|           |            | (select :kconfig:option:`CONFIG_BT_NXP_NW612`)  |
++-----------+------------+-------------------------------------------------+
 
 The default configuration can be found in
 :zephyr_file:`boards/nxp/mimxrt1040_evk/mimxrt1040_evk_defconfig`

boards/nxp/mimxrt1060_evk/CMakeLists.txt

@@ -1,5 +1,5 @@
 #
-# Copyright 2018-2022 NXP
+# Copyright 2018-2022, 2025 NXP
 #
 # SPDX-License-Identifier: Apache-2.0
 #
@@ -12,7 +12,7 @@ endif()
 
 if(CONFIG_NXP_IMXRT_BOOT_HEADER)
   zephyr_library()
-  if(${BOARD_REVISION} STREQUAL "B")
+  if((${BOARD_REVISION} STREQUAL "B") OR (${BOARD_REVISION} STREQUAL "C"))
     set(FLASH_CONF evkbmimxrt1060_flexspi_nor_config.c)
     set(BOARD_NAME evkbmimxrt1060)
   elseif(CONFIG_DT_HAS_NXP_IMX_FLEXSPI_NOR_ENABLED)

boards/nxp/mimxrt1060_evk/board.cmake

@@ -14,7 +14,7 @@ board_runner_args(pyocd "--target=mimxrt1060")
 board_runner_args(jlink "--device=MIMXRT1062xxx6A")
 board_runner_args(linkserver  "--device=MIMXRT1062xxxxA:EVK-MIMXRT1060")
 
-if(("${BOARD_QUALIFIERS}" MATCHES "qspi") OR ("${BOARD_REVISION}" STREQUAL "B"))
+if(("${BOARD_QUALIFIERS}" MATCHES "qspi") OR ("${BOARD_REVISION}" STREQUAL "B") OR ("${BOARD_REVISION}" STREQUAL "C"))
   board_runner_args(jlink "--loader=BankAddr=0x60000000&Loader=QSPI")
 elseif ("${BOARD_QUALIFIERS}" MATCHES "hyperflash")
   board_runner_args(jlink "--loader=BankAddr=0x60000000&Loader=HyperFlash")

boards/nxp/mimxrt1060_evk/board.yml

@@ -9,7 +9,8 @@ boards:
           - name: "hyperflash"
     revision:
       format: "letter"
-      default: "A"
+      default: "C"
       revisions:
         - name: "A"
         - name: "B"
+        - name: "C"

boards/nxp/mimxrt1060_evk/doc/index.rst

@@ -316,8 +316,28 @@ The MIMXRT1060 SoC has eight UARTs. ``LPUART1`` is configured for the console,
 ``LPUART3`` for the Bluetooth Host Controller Interface (BT HCI), and the
 remaining are not used.
 
-Board Targets
+Board Revisions and Targets
-*************
+***************************
+
+There are three revisions of this board.
+
+Rev A:
+
+* Initial version
+
+Rev B:
+
+* adds the M.2 connector for Wi-Fi/BLE
+* adds audio expansion connector J23
+* USER LED1 changed to GPIO1 pin 8
+
+Rev C:
+
+* Replaces audio codec WM8960(EOL) to WM8962
+* Replaces 32.768 KHz oscillator from ASH7K-32.768KHz-T(EOL)to ASH7KW-32.768KHZ-L-T
+* Replaces motion sensor from FXOS8700CQ(EOL) to FXLS8974CFR3
+* Re-assigns Bluetooth Audio PCM with dedicated I2S2
+* Re-assigns Bluetooth interface UART_CTS, UART_RTS to hardware PIN
 
 This board has two variants that can be targeted,
 depending on which flash to set as ``zephyr,flash``:
@@ -387,10 +407,28 @@ Flashing
 
 Here is an example for the :zephyr:code-sample:`hello_world` application.
 
-.. zephyr-app-commands::
+.. tabs::
-   :zephyr-app: samples/hello_world
+
-   :board: mimxrt1060_evk//qspi
+   .. group-tab:: i.MX RT1060 Rev A
-   :goals: flash
+
+      .. zephyr-app-commands::
+         :zephyr-app: samples/hello_world
+         :board: mimxrt1060_evk@A//qspi
+         :goals: flash
+
+   .. group-tab:: i.MX RT1060 Rev B
+
+      .. zephyr-app-commands::
+         :zephyr-app: samples/hello_world
+         :board: mimxrt1060_evk@B//qspi
+         :goals: flash
+
+   .. group-tab:: i.MX RT1060 Rev C (default)
+
+      .. zephyr-app-commands::
+         :zephyr-app: samples/hello_world
+         :board: mimxrt1060_evk@C//qspi
+         :goals: flash
 
 Open a serial terminal, reset the board (press the SW9 button), and you should
 see the following message in the terminal:
@@ -405,10 +443,29 @@ Debugging
 
 Here is an example for the :zephyr:code-sample:`hello_world` application.
 
-.. zephyr-app-commands::
+.. tabs::
-   :zephyr-app: samples/hello_world
+
-   :board: mimxrt1060_evk//qspi
+   .. group-tab:: i.MX RT1060 Rev A
-   :goals: debug
+
+      .. zephyr-app-commands::
+         :zephyr-app: samples/hello_world
+         :board: mimxrt1060_evk@A//qspi
+         :goals: debug
+
+   .. group-tab:: i.MX RT1060 Rev B
+
+      .. zephyr-app-commands::
+         :zephyr-app: samples/hello_world
+         :board: mimxrt1060_evk@B//qspi
+         :goals: debug
+
+   .. group-tab:: i.MX RT1060 Rev C (default)
+
+      .. zephyr-app-commands::
+         :zephyr-app: samples/hello_world
+         :board: mimxrt1060_evk@C//qspi
+         :goals: debug
+
 
 Open a serial terminal, step through the application in your debugger, and you
 should see the following message in the terminal:

boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi.yaml

@@ -4,7 +4,7 @@
 # SPDX-License-Identifier: Apache-2.0
 #
 
-identifier: mimxrt1060_evk/mimxrt1062/qspi
+identifier: mimxrt1060_evk@A/mimxrt1062/qspi
 name: NXP MIMXRT1060-EVK
 type: mcu
 arch: arm

boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi_B.yaml

@@ -14,20 +14,20 @@ toolchain:
 ram: 32768
 flash: 8192
 supported:
+  - adc
   - arduino_gpio
   - arduino_i2c
   - arduino_serial
   - arduino_spi
+  - can
   - counter
   - display
+  - dma
   - gpio
   - i2c
   - netif:eth
   - sdhc
   - spi
-  - usb_device
+  - usbd
-  - dma
-  - can
   - watchdog
-  - adc
 vendor: nxp

boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi_C.overlay

@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2022, Whisper.ai
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* FLEXPWM not routed to LED on this EVK */
+&flexpwm2_pwm3 {
+	status = "disabled";
+};
+
+&green_led {
+	gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
+	label = "User LED1";
+};

boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi_C.yaml

@@ -0,0 +1,34 @@
+#
+# Copyright (c) 2022, Whisper.ai
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+identifier: mimxrt1060_evk@C/mimxrt1062/qspi
+name: NXP MIMXRT1060-EVKC
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools
+ram: 32768
+flash: 8192
+supported:
+  - adc
+  - arduino_gpio
+  - arduino_i2c
+  - arduino_serial
+  - arduino_spi
+  - can
+  - counter
+  - display
+  - dma
+  - gpio
+  - i2c
+  - netif:eth
+  - sdhc
+  - spi
+  - usbd
+  - watchdog
+vendor: nxp

boards/nxp/mimxrt1170_evk/doc/index.rst

@@ -107,67 +107,68 @@ this board with new support for Zephyr features. Note that this table
 covers two boards: the RT1170 EVK (``mimxrt1170_evk//cm7/cm4``), and
 RT1170 EVKB (``mimxrt1170_evk@B//cm7/cm4``)
 
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| Interface | Controller | Driver/Component                    | RT1170 EVK      | RT1170 EVKB     |
+| Interface | Controller | Driver/Component                               | RT1170 EVK      | RT1170 EVKB     |
-+===========+============+=====================================+=================+=================+
++===========+============+================================================+=================+=================+
-| NVIC      | on-chip    | nested vector interrupt controller  | Supported       | Supported       |
+| NVIC      | on-chip    | nested vector interrupt controller             | Supported       | Supported       |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| SYSTICK   | on-chip    | systick                             | Supported       | Supported       |
+| SYSTICK   | on-chip    | systick                                        | Supported       | Supported       |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| GPIO      | on-chip    | gpio                                | Supported       | Supported       |
+| GPIO      | on-chip    | gpio                                           | Supported       | Supported       |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| COUNTER   | on-chip    | gpt                                 | Supported       | Supported       |
+| COUNTER   | on-chip    | gpt                                            | Supported       | Supported       |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| TIMER     | on-chip    | gpt                                 | Supported       | Supported       |
+| TIMER     | on-chip    | gpt                                            | Supported       | Supported       |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| CAN       | on-chip    | flexcan                             | Supported (M7)  | Supported (M7)  |
+| CAN       | on-chip    | flexcan                                        | Supported (M7)  | Supported (M7)  |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| SPI       | on-chip    | spi                                 | Supported (M7)  | Supported       |
+| SPI       | on-chip    | spi                                            | Supported (M7)  | Supported       |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| I2C       | on-chip    | i2c                                 | Supported       | Supported       |
+| I2C       | on-chip    | i2c                                            | Supported       | Supported       |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| PWM       | on-chip    | pwm                                 | Supported       | Supported       |
+| PWM       | on-chip    | pwm                                            | Supported       | Supported       |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| ADC       | on-chip    | adc                                 | Supported (M7)  | Supported (M7)  |
+| ADC       | on-chip    | adc                                            | Supported (M7)  | Supported (M7)  |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| UART      | on-chip    | serial port-polling;                | Supported       | Supported       |
+| UART      | on-chip    | serial port-polling;                           | Supported       | Supported       |
-|           |            | serial port-interrupt;              |                 |                 |
+|           |            | serial port-interrupt;                         |                 |                 |
-|           |            | serial port-async                   |                 |                 |
+|           |            | serial port-async                              |                 |                 |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| DMA       | on-chip    | dma                                 | Supported       | Supported       |
+| DMA       | on-chip    | dma                                            | Supported       | Supported       |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| WATCHDOG  | on-chip    | watchdog                            | Supported (M7)  | Supported (M7)  |
+| WATCHDOG  | on-chip    | watchdog                                       | Supported (M7)  | Supported (M7)  |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| ENET      | on-chip    | ethernet - 10/100M                  | Supported (M7)  | Supported (M7)  |
+| ENET      | on-chip    | ethernet - 10/100M                             | Supported (M7)  | Supported (M7)  |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| ENET1G    | on-chip    | ethernet - 10/100/1000M             | Supported (M7)  | Supported (M7)  |
+| ENET1G    | on-chip    | ethernet - 10/100/1000M                        | Supported (M7)  | Supported (M7)  |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| SAI       | on-chip    | i2s                                 | Supported       | No support      |
+| SAI       | on-chip    | i2s                                            | Supported       | No support      |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| USB       | on-chip    | USB Device                          | Supported (M7)  | Supported (M7)  |
+| USB       | on-chip    | USB Device                                     | Supported (M7)  | Supported (M7)  |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| HWINFO    | on-chip    | Unique device serial number         | Supported (M7)  | Supported (M7)  |
+| HWINFO    | on-chip    | Unique device serial number                    | Supported (M7)  | Supported (M7)  |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| DISPLAY   | on-chip    | eLCDIF; MIPI-DSI. Tested with       | Supported (M7)  | Supported (M7)  |
+| DISPLAY   | on-chip    | eLCDIF; MIPI-DSI. Tested with                  | Supported (M7)  | Supported (M7)  |
-|           |            | :ref:`rk055hdmipi4m`,               |                 |                 |
+|           |            | :ref:`rk055hdmipi4m`,                          |                 |                 |
-|           |            | :ref:`rk055hdmipi4ma0`,             |                 |                 |
+|           |            | :ref:`rk055hdmipi4ma0`,                        |                 |                 |
-|           |            | and :ref:`g1120b0mipi` shields      |                 |                 |
+|           |            | and :ref:`g1120b0mipi` shields                 |                 |                 |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| ACMP      | on-chip    | sensor                              | Supported       | No support      |
+| ACMP      | on-chip    | sensor                                         | Supported       | No support      |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| CAAM RNG  | on-chip    | entropy                             | Supported (M7)  | No support      |
+| CAAM RNG  | on-chip    | entropy                                        | Supported (M7)  | No support      |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| FLEXSPI   | on-chip    | flash programming                   | Supported (M7)  | Supported (M7)  |
+| FLEXSPI   | on-chip    | flash programming                              | Supported (M7)  | Supported (M7)  |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| SDHC      | on-chip    | SD host controller                  | Supported (M7)  | Supported (M7)  |
+| SDHC      | on-chip    | SD host controller                             | Supported (M7)  | Supported (M7)  |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| PIT       | on-chip    | pit                                 | Supported (M7)  | Supported (M7)  |
+| PIT       | on-chip    | pit                                            | Supported (M7)  | Supported (M7)  |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| VIDEO     | on-chip    | CSI; MIPI CSI-2 Rx. Tested with     | Supported (M7)  | Supported (M7)  |
+| VIDEO     | on-chip    | CSI; MIPI CSI-2 Rx. Tested with                | Supported (M7)  | Supported (M7)  |
-|           |            | :ref:`nxp_btb44_ov5640` shield      |                 |                 |
+|           |            | :ref:`nxp_btb44_ov5640` shield                 |                 |                 |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
++-----------+------------+------------------------------------------------+-----------------+-----------------+
-| UART      | NXP NW61x  | M.2 WIFI/BT module                  | Unsupported     | Supported (M7)  |
+| UART      | NXP IW61x  | M.2 WIFI/BT module                             | Unsupported     | Supported (M7)  |
-+-----------+------------+-------------------------------------+-----------------+-----------------+
+|           |            | (select :kconfig:option:`CONFIG_BT_NXP_NW612`) |                 |                 |
++-----------+------------+------------------------------------------------+-----------------+-----------------+
 
 The default configuration can be found in the defconfig files:
 :zephyr_file:`boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7_defconfig`

boards/nxp/mimxrt1180_evk/board.cmake

@@ -19,5 +19,5 @@ board_runner_args(linkserver "--core=cm7")
 board_runner_args(jlink "--device=MIMXRT1189xxx8_M7" "--speed=4000" "--no-reset" "--tool-opt=-jlinkscriptfile ${RT1180_BOARD_DIR}/jlinkscript/evkmimxrt1180_cm7.jlinkscript" "--tool-opt=-ir")
 endif()
 
-include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
 include(${ZEPHYR_BASE}/boards/common/linkserver.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/nxp/mimxrt1180_evk/doc/index.rst

@@ -183,18 +183,19 @@ Build and flash applications as usual (see :ref:`build_an_application` and
 Configuring a Debug Probe
 =========================
 
+LinkServer is the default runner for this board.
 A debug probe is used for both flashing and debugging the board. This board is
-configured by default to use the :ref:`mcu-link-cmsis-onboard-debug-probe`,
+configured by default to use the :ref:`mcu-link-cmsis-onboard-debug-probe`.
-however the :ref:`pyocd-debug-host-tools` do not yet support programming the
+The :ref:`pyocd-debug-host-tools` do not yet support programming the
-external flashes on this board so you must reconfigure the board for one of the
+external flashes on this board. Use one of the other supported debug probes
-following debug probes instead.
+below.
 
 .. _Using J-Link RT1180:
 
 Using J-Link
 ------------
 
-Please ensure used JLINK above V7.94g and jumper JP5 installed if using
+Please ensure to use a version of JLINK above V7.94g and jumper JP5 is installed if using
 external jlink plus on J37 as debugger.
 
 When debugging cm33 core, need to ensure the SW5 on "0100" mode.
@@ -212,7 +213,7 @@ EVK.
 Using Linkserver
 ----------------
 
-Please ensure used linkserver above V1.5.30 and jumper JP5 uninstalled.
+Please ensure to use a version of Linkserver above V1.5.30 and jumper JP5 is uninstalled (default setting).
 
 When debugging cm33 core, need to ensure the SW5 on "0100" mode.
 When debugging cm7 core, need to ensure the SW5 on "0001" mode.

boards/nxp/mr_canhubk3/mr_canhubk3.dts

@@ -1,5 +1,5 @@
 /*
- * Copyright 2023 NXP
+ * Copyright 2023-2024 NXP
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -344,6 +344,8 @@
 		readoc = "1-4-4";
 		writeoc = "1-4-4";
 		has-32k-erase;
+		max-program-buffer-size = <256>;
+		write-block-size = <1>;
 		status = "okay";
 
 		partitions {

boards/nxp/s32z2xxdc2/doc/index.rst

@@ -62,6 +62,8 @@ The boards support the following hardware features:
 +-----------+------------+-------------------------------------+
 | eMIOS     | on-chip    | pwm                                 |
 +-----------+------------+-------------------------------------+
+| QSPI      | on-chip    | flash                               |
++-----------+------------+-------------------------------------+
 
 Other hardware features are not currently supported by the port.
 
@@ -172,6 +174,12 @@ EDMA
 The EDMA modules feature four EDMA3 instances: Instance 0 with 32 channels,
 and instances 1, 4, and 5, each with 16 channels.
 
+External Flash
+==============
+
+The on-board S26HS512T 512M-bit HyperFlash memory is connected to the QSPI controller
+port A1. This board configuration selects it as the default flash controller.
+
 Programming and Debugging
 *************************
 

boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270.dtsi

@@ -5,6 +5,7 @@
  */
 
 #include "s32z2xxdc2_s32z270_pinctrl.dtsi"
+#include <zephyr/dt-bindings/qspi/nxp-s32-qspi.h>
 
 &swt0 {
 	status = "okay";
@@ -58,3 +59,69 @@
 &sar_adc1 {
 	vref-mv = <1800>;
 };
+
+&qspi0 {
+	pinctrl-0 = <&qspi0_default>;
+	pinctrl-names = "default";
+	data-rate = "DDR";
+	column-space = <3>;
+	word-addressable;
+	hold-time-2x;
+	a-dll-freq-enable;
+	a-dll-ref-counter = <2>;
+	a-dll-resolution = <2>;
+	a-dll-coarse-delay = <2>;
+	a-dll-fine-delay = <2>;
+	a-dll-mode = "AUTO UPDATE";
+	a-rx-clock-source = "EXTERNAL DQS";
+	ahb-buffers-masters = <0 1 2 3>;
+	ahb-buffers-sizes = <256 256 256 256>;
+	ahb-buffers-all-masters;
+	status = "okay";
+
+	sfp_mdad {
+		compatible = "nxp,s32-qspi-sfp-mdad";
+
+		mdad_0: mdad_0 {
+			domain-id = <0>;
+			secure-attribute = <NXP_S32_QSPI_SECURE>;
+		};
+	};
+
+	sfp_frad {
+		compatible = "nxp,s32-qspi-sfp-frad";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		frad_0: frad@0 {
+			reg = <0x0 DT_SIZE_M(512)>;
+			master-domain-acp-policy = <NXP_S32_QSPI_SECURE>;
+		};
+	};
+
+	s26hs512t: s26hs512t@0 {
+		compatible = "nxp,s32-qspi-hyperflash";
+		reg = <0>;
+		jedec-id = [00 34 00 7b 00 1a 00 0f 00 90];
+		device-id-word-addr = <0x800>;
+		size = <DT_SIZE_M(512)>;
+		write-block-size = <2>;
+		read-latency-cycles = <16>;
+		max-program-buffer-size = <256>;
+		vcc-mv = <1800>;
+		drive-strength-ohm = <27>;
+		ppw-sectors-addr-mapping = "LOW";
+		status = "okay";
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			storage_partition: partition@0 {
+				label = "storage";
+				reg = <0x0 0x10000>;
+			};
+		};
+	};
+};

boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_pinctrl.dtsi

@@ -127,4 +127,25 @@
 			drive-open-drain;
 		};
 	};
+
+	qspi0_default: qspi0_default {
+		group1 {
+			pinmux = <PI4_QSPI_0_DATA_A_O0>, <PH14_QSPI_0_DATA_A_O1>,
+				 <PI8_QSPI_0_DATA_A_O2>, <PI1_QSPI_0_DATA_A_O3>,
+				 <PI5_QSPI_0_DATA_A_O4>, <PH15_QSPI_0_DATA_A_O5>,
+				 <PI7_QSPI_0_DATA_A_O6>, <PI0_QSPI_0_DATA_A_O7>,
+				 <PI6_QSPI_0_DQS_A_O>;
+			output-enable;
+			input-enable;
+		};
+		group2 {
+			pinmux = <PH13_QSPI_0_CS_A0>, <PI9_QSPI_0_CS_A1>,
+				 <PI2_QSPI_0_CK_A_B>, <PI3_QSPI_0_CK_A>;
+			output-enable;
+		};
+		group3 {
+			pinmux = <PH12_QSPI_0_INTA_B>;
+			input-enable;
+		};
+	};
 };

boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0.dts

@@ -16,6 +16,7 @@
 		zephyr,sram = &dram0;
 		zephyr,flash = &cram0;
 		zephyr,canbus = &canxl0;
+		zephyr,flash-controller = &s26hs512t;
 	};
 
 	aliases {

boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1.dts

@@ -16,6 +16,7 @@
 		zephyr,sram = &dram1;
 		zephyr,flash = &cram1;
 		zephyr,canbus = &flexcan0;
+		zephyr,flash-controller = &s26hs512t;
 	};
 
 	aliases {

boards/phytec/phyboard_lyra/doc/phyboard_lyra_am62xx_a53.rst

@@ -45,6 +45,8 @@ features:
 +-----------+------------+-------------------------------------+
 | UART      | on-chip    | serial port                         |
 +-----------+------------+-------------------------------------+
+| Mailbox   | on-chip    | IPC Mailbox                         |
++-----------+------------+-------------------------------------+
 
 Devices
 ========

boards/phytec/phyboard_lyra/doc/phyboard_lyra_am62xx_m4.rst

@@ -56,6 +56,8 @@ The phyboard_lyra/am6234/m4 configuration supports the following hardware featur
 +-----------+------------+-------------------------------------+
 | UART      | on-chip    | serial                              |
 +-----------+------------+-------------------------------------+
+| Mailbox   | on-chip    | IPC Mailbox                         |
++-----------+------------+-------------------------------------+
 
 Other hardware features are not currently supported by the port.
 

boards/pjrc/teensy4/doc/index.rst

@@ -5,72 +5,100 @@ PJRC TEENSY 4
 
 Overview
 ********
+
 The Teensy is a complete USB-based microcontroller development system, in a
 very small footprint, capable of implementing many types of projects. All
 programming is done via the USB port.
 
+.. tabs::
 
-.. figure:: teensy40.jpg
+   .. group-tab:: Teensy 4.0
-   :align: center
-   :alt: TEENSY40
 
-   TEENSY40 (Credit: https://www.pjrc.com)
+      .. figure:: img/teensy40.jpg
+           :align: center
+           :alt: TEENSY40
 
-.. figure:: teensy41.jpg
+           (Credit: https://www.pjrc.com)
-   :align: center
-   :alt: TEENSY41
 
-   TEENSY41 (Credit: https://www.pjrc.com)
+   .. group-tab:: Teensy 4.1
+
+      .. figure:: img/teensy41.jpg
+           :align: center
+           :alt: TEENSY41
+
+           (Credit: https://www.pjrc.com)
 
 Hardware
 ********
 
-Teensy 4.0:
+.. tabs::
 
-- MIMXRT1062DVL6A MCU (600 MHz, 1024 KB on-chip memory)
+   .. group-tab:: Teensy 4.0
-- 16 Mbit QSPI Flash
-- LED
-- USB 2.0 host connector
 
-Teensy 4.1:
+      - MIMXRT1062DVL6A MCU (600 MHz, 1024 KB on-chip memory)
+      - 16 Mbit QSPI Flash
+      - User LED
+      - USB 2.0 host connector
 
-- MIMXRT1062DVJ6A MCU (600 MHz, 1024 KB on-chip memory)
+      See the `Teensy 4.0 Website`_ for a complete hardware description.
-- 64 Mbit QSPI Flash
-- LED
-- USB 2.0 host connector
-- USB 2.0 OTG connector
-- 10/100 Mbit/s Ethernet PHY
-- TF socket for SD card
 
-See the `Teensy 4.0 Website`_ for a complete hardware description.
+   .. group-tab:: Teensy 4.1
+
+      - MIMXRT1062DVJ6A MCU (600 MHz, 1024 KB on-chip memory)
+      - 64 Mbit QSPI Flash
+      - User LED
+      - USB 2.0 host connector
+      - USB 2.0 OTG connector
+      - 10/100 Mbit/s Ethernet transceiver
+      - TF socket for SD card
+
+      To connect an Ethernet cable, additional `Teensy 4.1 Ethernet Kit`_ is required.
+
+      See the `Teensy 4.1 Website`_ for a complete hardware description.
+
+For more information, check the `i.MX RT1060 Datasheet`_.
 
 Supported Features
 ==================
 
-The teensy40 board configuration supports the following hardware
+The Teensy 4.0 board configuration supports the following hardware
 features:
 
-+-----------+------------+-------------------------------------+
++-----------+------------+----------------------+
-| Interface | Controller | Driver/Component                    |
+| Interface | Controller | Driver/Component     |
-+===========+============+=====================================+
++===========+============+======================+
-| NVIC      | on-chip    | nested vector interrupt controller  |
+| ADC       | on-chip    | adc                  |
-+-----------+------------+-------------------------------------+
++-----------+------------+----------------------+
-| SYSTICK   | on-chip    | systick                             |
+| CLOCK     | on-chip    | clock_control        |
-+-----------+------------+-------------------------------------+
++-----------+------------+----------------------+
-| GPIO      | on-chip    | gpio                                |
+| FLASH     | on-chip    | flash                |
-+-----------+------------+-------------------------------------+
++-----------+------------+----------------------+
-| I2C       | on-chip    | i2c                                 |
+| GPIO      | on-chip    | gpio                 |
-+-----------+------------+-------------------------------------+
++-----------+------------+----------------------+
-| UART      | on-chip    | serial port-polling;                |
+| I2C       | on-chip    | i2c                  |
-|           |            | serial port-interrupt               |
++-----------+------------+----------------------+
-+-----------+------------+-------------------------------------+
+| I2S       | on-chip    | i2s                  |
-| USB       | on-chip    | USB device                          |
++-----------+------------+----------------------+
-+-----------+------------+-------------------------------------+
+| NVIC      | on-chip    | arch/arm             |
++-----------+------------+----------------------+
+| PWM       | on-chip    | pwm                  |
++-----------+------------+----------------------+
+| RTC       | on-chip    | system clock         |
++-----------+------------+----------------------+
+| SPI       | on-chip    | spi                  |
++-----------+------------+----------------------+
+| CAN       | on-chip    | can                  |
++-----------+------------+----------------------+
+| UART      | on-chip    | serial               |
++-----------+------------+----------------------+
+| USB       | on-chip    | usb                  |
++-----------+------------+----------------------+
+| TRNG      | on-chip    | entropy              |
++-----------+------------+----------------------+
+| WDT       | on-chip    | watchdog             |
++-----------+------------+----------------------+
 
-The default configuration can be found in
+The Teensy 4.1 board configuration supports additional hardware
-:zephyr_file:`boards/pjrc/teensy4/teensy40_defconfig`
-
-The teensy41 board configuration supports additional hardware
 features:
 
 +-----------+------------+-------------------------------------+
@@ -81,10 +109,7 @@ features:
 | ENET      | on-chip    | ethernet                            |
 +-----------+------------+-------------------------------------+
 
-The default configuration can be found in
+Other hardware features have not been enabled yet for this board.
-:zephyr_file:`boards/pjrc/teensy4/teensy41_defconfig`
-
-Other hardware features are not currently supported by the port.
 
 Connections and IOs
 ===================
@@ -204,23 +229,97 @@ Programming and Debugging
 
 Flashing
 ========
-Build applications as usual (see :ref:`build_an_application` for more details).
 
-Flash hex-file with the documented tools:
+Both the Teensy 4.0 and Teensy 4.1 ship with a dedicated bootloader chip,
+which supports flashing using USB. This allows easy flashing of new images,
+but does not support debugging the device.
 
-.. _Teensy flash tools:
+#. Build the Zephyr kernel and the :zephyr:code-sample:`blinky` sample application.
-   https://www.pjrc.com/teensy/loader.html
 
-Debugging
+.. tabs::
-=========
-Console output is mapped to teensy pins 0 (RX1) and 1 (TX1). Connect a usb-to-serial adapter
-to use this serial console. Use the following settings with your serial terminal of choice (minicom, putty,
-etc.):
 
-- Speed: 115200
+   .. group-tab:: Teensy 4.0
-- Data: 8 bits
+
-- Parity: None
+      .. zephyr-app-commands::
-- Stop bits: 1
+         :zephyr-app: samples/basic/blinky
+         :board: teensy40
+         :goals: build
+         :compact:
+
+   .. group-tab:: Teensy 4.1
+
+      .. zephyr-app-commands::
+         :zephyr-app: samples/basic/blinky
+         :board: teensy41
+         :goals: build
+         :compact:
+
+#. Connect the board to your host computer using USB.
+
+#. Tap the reset button to enter bootloader mode.
+   Red LED blinks.
+
+#. Flash the image.
+
+.. tabs::
+
+   .. group-tab:: Teensy 4.0
+
+      .. zephyr-app-commands::
+         :zephyr-app: samples/basic/blinky
+         :board: teensy40
+         :goals: flash
+         :compact:
+
+   .. group-tab:: Teensy 4.1
+
+      .. zephyr-app-commands::
+         :zephyr-app: samples/basic/blinky
+         :board: teensy41
+         :goals: flash
+         :compact:
+
+#. You should see the orange LED blink.
+
+Configuring a Console
+=====================
+
+.. tabs::
+
+   .. group-tab:: UART-Console
+
+      By default console output is mapped to teensy pins 0 (RX1) and 1 (TX1). Connect a usb-to-serial adapter
+      to use this serial console. Use the following settings with your serial terminal of choice (minicom, putty,
+      etc.):
+
+      - Speed: 115200
+      - Data: 8 bits
+      - Parity: None
+      - Stop bits: 1
+
+   .. group-tab:: USB-Console
+
+      By mapping the console output to USB, a usb-to-serial adapter is no longer required.
+      Utilizing the :ref:`snippet-cdc-acm-console` and a config option will enable this feature.
+
+      #. If application code doesn´t enable USB device support, this must be done via Kconfig option.
+
+         .. code-block:: kconfig
+
+            CONFIG_USB_DEVICE_INITIALIZE_AT_BOOT=y
+
+      #. Build application including the snippet.
+
+         .. zephyr-app-commands::
+            :zephyr-app: samples/basic/blinky
+            :snippets: cdc-acm-console
+            :board: teensy41
+            :goals: flash
+            :compact:
+
+      #. After application startup a serial device named like
+         ``tty.usbmodem14203`` should appear on your host computer.
+         You can use e.g. ``Serial Monitor`` plugin for VScode to monitor.
 
 References
 **********
@@ -230,14 +329,11 @@ References
 .. _Teensy 4.0 Website:
    https://www.pjrc.com/store/teensy40.html
 
-.. _Teensy Schematics:
+.. _Teensy 4.1 Website:
-   https://www.pjrc.com/teensy/schematic.html
+   https://www.pjrc.com/store/teensy41.html
 
-.. _i.MX RT1060 Website:
+.. _Teensy 4.1 Ethernet Kit:
-   https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-applications-processors/i.mx-rt-series/i.mx-rt1060-crossover-processor-with-arm-cortex-m7-core:i.MX-RT1060
+   https://www.pjrc.com/store/ethernet_kit.html
 
 .. _i.MX RT1060 Datasheet:
    https://www.nxp.com/docs/en/nxp/data-sheets/IMXRT1060CEC.pdf
-
-.. _i.MX RT1060 Reference Manual:
-   https://www.nxp.com/webapp/Download?colCode=IMXRT1060RM

boards/sensry/ganymed_bob/ganymed_bob_sy120-pinctrl.dtsi

@@ -0,0 +1,74 @@
+/* Copyright (c) 2024 sensry.io */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+#include <zephyr/dt-bindings/pinctrl/sy1xx-pinctrl.h>
+
+&pinctrl {
+
+	/* UART0 */
+	/omit-if-no-ref/ uart0_tx: uart0_tx {
+		pinmux = <SY1XX_UART0_PAD_CFG0 SY1XX_PAD(0)>;
+	};
+
+	/omit-if-no-ref/ uart0_rx: uart0_rx {
+		pinmux = <SY1XX_UART0_PAD_CFG0 SY1XX_PAD(1)>;
+		input-enable;
+	};
+
+	/* UART1 */
+	/omit-if-no-ref/ uart1_tx: uart1_tx {
+		pinmux = <SY1XX_UART1_PAD_CFG0 SY1XX_PAD(0)>;
+	};
+
+	/omit-if-no-ref/ uart1_rx: uart1_rx {
+		pinmux = <SY1XX_UART1_PAD_CFG0 SY1XX_PAD(1)>;
+		input-enable;
+	};
+
+	/omit-if-no-ref/ uart1_cts: uart1_cts {
+		pinmux = <SY1XX_UART1_PAD_CFG0 SY1XX_PAD(2)>;
+	};
+
+	/omit-if-no-ref/ uart1_rts: uart1_rts {
+		pinmux = <SY1XX_UART1_PAD_CFG0 SY1XX_PAD(3)>;
+		input-enable;
+		bias-pull-up;
+	};
+
+	/* UART2 */
+	/omit-if-no-ref/ uart2_tx: uart2_tx {
+		pinmux = <SY1XX_UART2_PAD_CFG0 SY1XX_PAD(0)>;
+	};
+
+	/omit-if-no-ref/ uart2_rx: uart2_rx {
+		pinmux = <SY1XX_UART2_PAD_CFG0 SY1XX_PAD(1)>;
+		input-enable;
+	};
+
+	/omit-if-no-ref/ uart2_cts: uart2_cts {
+		pinmux = <SY1XX_UART2_PAD_CFG0 SY1XX_PAD(2)>;
+	};
+
+	/omit-if-no-ref/ uart2_rts: uart2_rts {
+		pinmux = <SY1XX_UART2_PAD_CFG0 SY1XX_PAD(3)>;
+		input-enable;
+		bias-pull-up;
+	};
+
+};
+
+
+&uart0 {
+	pinctrl-0 = <&uart0_tx &uart0_rx>;
+	pinctrl-names = "default";
+};
+
+&uart1 {
+	pinctrl-0 = <&uart1_tx &uart1_rx &uart1_cts &uart1_rts>;
+	pinctrl-names = "default";
+};
+
+&uart2 {
+	pinctrl-0 = <&uart2_tx &uart2_rx &uart2_cts &uart2_rts>;
+	pinctrl-names = "default";
+};

boards/sensry/ganymed_bob/ganymed_bob_sy120_gbm.dts

@@ -4,6 +4,7 @@
 /dts-v1/;
 
 #include <sensry/ganymed-sy1xx.dtsi>
+#include "ganymed_bob_sy120-pinctrl.dtsi"
 
 / {
 

boards/sensry/ganymed_bob/ganymed_bob_sy120_gen1.dts

@@ -4,6 +4,7 @@
 /dts-v1/;
 
 #include <sensry/ganymed-sy1xx.dtsi>
+#include "ganymed_bob_sy120-pinctrl.dtsi"
 
 / {
 

boards/silabs/dev_kits/xg24_dk2601b/doc/index.rst

@@ -17,7 +17,7 @@ Hardware
 - Transmit power: up to +20 dBm
 - Operation frequency: 2.4 GHz
 - Crystals for LFXO (32.768 kHz) and HFXO (38.4 MHz).
-- On board sensors:
+- On board devices:
 
   - Silicon Labs Si7021 relative humidity & temperature sensor
   - Silicon Labs Si7210 hall effect sensor
@@ -25,6 +25,7 @@ Hardware
   - TDK InvenSense ICM-20689 6-axis inertial measurement sensor
   - Vishay VEML6035 ambient light sensor
   - Bosch BMP384 pressure sensor with internal temperature sensor
+  - MX25R3235F 32 Mbit SPI data flash
 
 For more information about the EFR32MG24 SoC and BRD2601B board, refer to these
 documents:
@@ -39,33 +40,35 @@ Supported Features
 
 The board configuration supports the following hardware features:
 
-+-----------+------------+-------------------------------------+
++-----------+------------+------------------------------------+
-| Interface | Controller | Driver/Component                    |
+| Interface | Controller | Driver/Component                   |
-+===========+============+=====================================+
++===========+============+====================================+
-| MPU       | on-chip    | memory protection unit              |
+| MPU       | on-chip    | memory protection unit             |
-+-----------+------------+-------------------------------------+
++-----------+------------+------------------------------------+
-| NVIC      | on-chip    | nested vector interrupt controller  |
+| NVIC      | on-chip    | nested vector interrupt controller |
-+-----------+------------+-------------------------------------+
++-----------+------------+------------------------------------+
-| SYSTICK   | on-chip    | systick                             |
+| SYSTICK   | on-chip    | systick                            |
-+-----------+------------+-------------------------------------+
++-----------+------------+------------------------------------+
-| COUNTER   | on-chip    | stimer                              |
+| SYSRTC    | on-chip    | counter, timer                     |
-+-----------+------------+-------------------------------------+
++-----------+------------+------------------------------------+
-| FLASH     | on-chip    | flash memory                        |
+| MSC       | on-chip    | flash memory                       |
-+-----------+------------+-------------------------------------+
++-----------+------------+------------------------------------+
-| GPIO      | on-chip    | gpio                                |
+| GPIO      | on-chip    | gpio                               |
-+-----------+------------+-------------------------------------+
++-----------+------------+------------------------------------+
-| UART      | on-chip    | serial                              |
+| EUSART    | on-chip    | serial, spi                        |
-+-----------+------------+-------------------------------------+
++-----------+------------+------------------------------------+
-| DMA       | on-chip    | ldma                                |
+| USART     | on-chip    | serial, spi                        |
-+-----------+------------+-------------------------------------+
++-----------+------------+------------------------------------+
-| TRNG      | on-chip    | semailbox                           |
+| LDMA      | on-chip    | dma                                |
-+-----------+------------+-------------------------------------+
++-----------+------------+------------------------------------+
-| WATCHDOG  | on-chip    | watchdog                            |
+| SE        | on-chip    | entropy                            |
-+-----------+------------+-------------------------------------+
++-----------+------------+------------------------------------+
-| I2C(M/S)  | on-chip    | i2c                                 |
+| WDOG      | on-chip    | watchdog                           |
-+-----------+------------+-------------------------------------+
++-----------+------------+------------------------------------+
-| RADIO     | on-chip    | bluetooth                           |
+| I2C       | on-chip    | i2c                                |
-+-----------+------------+-------------------------------------+
++-----------+------------+------------------------------------+
+| RADIO     | on-chip    | bluetooth                          |
++-----------+------------+------------------------------------+
 
 Other hardware features are currently not supported by the port.
 
@@ -73,23 +76,37 @@ Connections and IOs
 ===================
 
 In the following table, the column **Name** contains Pin names. For example, PA2
-means Pin number 2 on PORTA, as used in the board's datasheets and manuals.
+means Pin number 2 on Port A, as used in the board's datasheets and manuals.
 
-+-------+-------------+-------------------------------------+
++------+--------------+---------------------+
-| Name  | Function    | Usage                               |
+| Name | Function     | Usage               |
-+=======+=============+=====================================+
++======+==============+=====================+
-| PA4   | GPIO        | LED0                                |
+| PA4  | GPIO         | LED0                |
-+-------+-------------+-------------------------------------+
++------+--------------+---------------------+
-| PB0   | GPIO        | LED1                                |
+| PB0  | GPIO         | LED1                |
-+-------+-------------+-------------------------------------+
++------+--------------+---------------------+
-| PB2   | GPIO        | Push Button 0                       |
+| PD2  | GPIO         | LED2                |
-+-------+-------------+-------------------------------------+
++------+--------------+---------------------+
-| PB3   | GPIO        | Push Button 1                       |
+| PB2  | GPIO         | Push Button 0       |
-+-------+-------------+-------------------------------------+
++------+--------------+---------------------+
-| PA5   | USART0_TX   | UART Console VCOM_TX US0_TX         |
+| PB3  | GPIO         | Push Button 1       |
-+-------+-------------+-------------------------------------+
++------+--------------+---------------------+
-| PA6   | USART0_RX   | UART Console VCOM_RX US0_RX         |
+| PA5  | USART0_TX    | UART Console        |
-+-------+-------------+-------------------------------------+
++------+--------------+---------------------+
+| PA6  | USART0_RX    | UART Console        |
++------+--------------+---------------------+
+| PC3  | EUSART1_TX   | SPI bus: flash, IMU |
++------+--------------+---------------------+
+| PC2  | EUSART1_RX   | SPI bus: flash, IMU |
++------+--------------+---------------------+
+| PC1  | EUSART1_SCLK | SPI bus: flash, IMU |
++------+--------------+---------------------+
+| PC0  | EUSART1_CS   | SPI bus: flash      |
++------+--------------+---------------------+
+| PC4  | I2C0_SCL     | I2C bus             |
++------+--------------+---------------------+
+| PC5  | I2C0_SDA     | I2C bus             |
++------+--------------+---------------------+
 
 The default configuration can be found in
 :zephyr_file:`boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b_defconfig`

boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b-pinctrl.dtsi

@@ -20,6 +20,19 @@
 		};
 	};
 
+	eusart1_default: eusart1_default {
+		group0 {
+			pins = <EUSART1_TX_PC3>, <EUSART1_SCLK_PC1>;
+			drive-push-pull;
+			output-high;
+		};
+		group1 {
+			pins = <EUSART1_RX_PC2>;
+			input-enable;
+			silabs,input-filter;
+		};
+	};
+
 	i2c0_default: i2c0_default {
 		group0 {
 			pins = <I2C0_SCL_PC4>, <I2C0_SDA_PC5>;

boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b.dts

@@ -124,6 +124,29 @@
 	status = "okay";
 };
 
+&eusart1 {
+	compatible = "silabs,eusart-spi";
+	pinctrl-0 = <&eusart1_default>;
+	pinctrl-names = "default";
+	cs-gpios = <&gpioc 0 GPIO_ACTIVE_LOW>;
+	clock-frequency = <4000000>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	mx25r32: mx25r3235f@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <80000000>;
+		size = <0x2000000>;
+		jedec-id = [c2 28 16];
+		has-dpd;
+		dpd-wakeup-sequence = <30000 20 35000>;
+		mxicy,mx25r-power-mode = "low-power";
+		zephyr,pm-device-runtime-auto;
+	};
+};
+
 &i2c0 {
 	pinctrl-0 = <&i2c0_default>;
 	pinctrl-names = "default";

boards/snps/nsim/arc_v/rmx1xx.dtsi

@@ -37,6 +37,13 @@
 				interrupt-names = "soft0", "timer0";
 			};
 
+			mtimer: timer@200bff8 {
+				compatible = "riscv,machine-timer";
+				interrupts-extended = <&cpu0_intc 7>;
+				reg = <0x200bff8 0x8 0x2004000 0x8>;
+				reg-names = "mtime", "mtimecmp";
+			};
+
 			uart0: serial@10000000{
 				compatible = "ns16550", "snps,dw-apb-uart";
 				reg = <0x10000000 0x400>;

boards/st/nucleo_f030r8/doc/index.rst

@@ -29,7 +29,6 @@ Nucleo F030R8 provides the following hardware components:
   - Arduino* Uno V3 connectivity
   - ST morpho extension pin headers for full access to all STM32 I/Os
 
-- ARM* mbed*
 - On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
 
   - Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@@ -50,11 +49,6 @@ Nucleo F030R8 provides the following hardware components:
   - Mass storage
   - Debug port
 
-- Support of wide choice of Integrated Development Environments (IDEs) including:
-
-  - IAR
-  - ARM Keil
-  - GCC-based IDEs
 
 More information about STM32F030R8 can be found here:
 

boards/st/nucleo_f070rb/doc/index.rst

@@ -29,7 +29,6 @@ Nucleo F070RB provides the following hardware components:
   - Arduino* Uno V3 connectivity
   - ST morpho extension pin headers for full access to all STM32 I/Os
 
-- ARM* mbed*
 - On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
 
   - Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@@ -50,11 +49,6 @@ Nucleo F070RB provides the following hardware components:
   - Mass storage
   - Debug port
 
-- Support of wide choice of Integrated Development Environments (IDEs) including:
-
-  - IAR
-  - ARM Keil
-  - GCC-based IDEs
 
 More information about STM32F070RB can be found in
 the `STM32F070 reference manual`_ .

boards/st/nucleo_f091rc/doc/index.rst

@@ -29,7 +29,6 @@ Nucleo F091RC provides the following hardware components:
   - Arduino* Uno V3 connectivity
   - ST morpho extension pin headers for full access to all STM32 I/Os
 
-- ARM* mbed*
 - On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
 
   - Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@@ -50,11 +49,6 @@ Nucleo F091RC provides the following hardware components:
   - Mass storage
   - Debug port
 
-- Support of wide choice of Integrated Development Environments (IDEs) including:
-
-  - IAR
-  - ARM Keil
-  - GCC-based IDEs
 
 More information about STM32F091RC can be found in the
 `STM32F091 reference manual`_

boards/st/nucleo_f103rb/doc/index.rst

@@ -29,7 +29,6 @@ Nucleo F103RB provides the following hardware components:
   - Arduino* Uno V3 connectivity
   - ST morpho extension pin headers for full access to all STM32 I/Os
 
-- ARM* mbed*
 - On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
 
   - Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@@ -50,11 +49,6 @@ Nucleo F103RB provides the following hardware components:
   - Mass storage
   - Debug port
 
-- Support of wide choice of Integrated Development Environments (IDEs) including:
-
-  - IAR
-  - ARM Keil
-  - GCC-based IDEs
 
 More information about STM32F103RB can be found here:
 

boards/st/nucleo_f334r8/doc/index.rst

@@ -30,7 +30,6 @@ Nucleo F334R8 provides the following hardware components:
   - Arduino* Uno V3 connectivity
   - ST morpho extension pin headers for full access to all STM32 I/Os
 
-- ARM* mbed*
 - On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
 
   - Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@@ -51,11 +50,6 @@ Nucleo F334R8 provides the following hardware components:
   - Mass storage
   - Debug port
 
-- Support of wide choice of Integrated Development Environments (IDEs) including:
-
-  - IAR
-  - ARM Keil
-  - GCC-based IDEs
 
 More information about STM32F334R8 can be found in the
 `STM32F334 reference manual`_

boards/st/nucleo_g070rb/doc/index.rst

@@ -33,7 +33,6 @@ Nucleo G070RB provides the following hardware components:
   - Arduino* Uno V3 connectivity
   - ST morpho extension pin headers for full access to all STM32 I/Os
 
-- ARM* mbed*
 - On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
 
   - Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@@ -54,11 +53,6 @@ Nucleo G070RB provides the following hardware components:
   - Mass storage
   - Debug port
 
-- Support of wide choice of Integrated Development Environments (IDEs) including:
-
-  - IAR
-  - ARM Keil
-  - GCC-based IDEs
 
 More information about STM32G070RB can be found here:
 

boards/st/nucleo_g071rb/doc/index.rst

@@ -33,7 +33,6 @@ Nucleo G071RB provides the following hardware components:
   - Arduino* Uno V3 connectivity
   - ST morpho extension pin headers for full access to all STM32 I/Os
 
-- ARM* mbed*
 - On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
 
   - Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@@ -54,11 +53,6 @@ Nucleo G071RB provides the following hardware components:
   - Mass storage
   - Debug port
 
-- Support of wide choice of Integrated Development Environments (IDEs) including:
-
-  - IAR
-  - ARM Keil
-  - GCC-based IDEs
 
 More information about STM32G071RB can be found here:
 

boards/st/nucleo_l011k4/doc/index.rst

@@ -28,7 +28,6 @@ Nucleo L011K4 provides the following hardware components:
 
   - Arduino* Nano V3 connectivity
 
-- ARM* mbed*
 - On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
 
   - Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@@ -49,11 +48,6 @@ Nucleo L011K4 provides the following hardware components:
   - Mass storage
   - Debug port
 
-- Support of wide choice of Integrated Development Environments (IDEs) including:
-
-  - IAR
-  - ARM Keil
-  - GCC-based IDEs
 
 More information about STM32L011K4 can be found in the
 `STM32L0x1 reference manual`_

boards/st/nucleo_l053r8/doc/index.rst

@@ -29,7 +29,6 @@ Nucleo L053R8 provides the following hardware components:
   - Arduino* Uno V3 connectivity
   - ST morpho extension pin headers for full access to all STM32 I/Os
 
-- ARM* mbed*
 - On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
 
   - Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@@ -50,11 +49,6 @@ Nucleo L053R8 provides the following hardware components:
   - Mass storage
   - Debug port
 
-- Support of wide choice of Integrated Development Environments (IDEs) including:
-
-  - IAR
-  - ARM Keil
-  - GCC-based IDEs
 
 More information about STM32L053R8 can be found in the
 `STM32L0x3 reference manual`_

boards/st/nucleo_l073rz/doc/index.rst

@@ -29,7 +29,6 @@ Nucleo L073RZ provides the following hardware components:
   - Arduino* Uno V3 connectivity
   - ST morpho extension pin headers for full access to all STM32 I/Os
 
-- ARM* mbed*
 - On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
 
   - Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@@ -50,11 +49,6 @@ Nucleo L073RZ provides the following hardware components:
   - Mass storage
   - Debug port
 
-- Support of wide choice of Integrated Development Environments (IDEs) including:
-
-  - IAR
-  - ARM Keil
-  - GCC-based IDEs
 
 More information about STM32L073RZ can be found in the
 `STM32L0x3 reference manual`_

boards/st/nucleo_wl55jc/doc/nucleo_wl55jc.rst

@@ -33,8 +33,6 @@ power consumption, and features.
   mass storage, Virtual COM port, and debug port
 - Comprehensive free software libraries and examples available with the
   STM32CubeWL MCU Package
-- Support of a wide choice of Integrated Development Environments (IDEs)
-  including IAR Embedded Workbench®, MDK-ARM, and STM32CubeIDE
 - Suitable for rapid prototyping of end nodes based on LoRaWAN, Sigfox, wM-Bus,
   and many other proprietary protocols
 - Fully open hardware platform

boards/ti/cc1352p7_launchpad/cc1352p7_lp.yaml

@@ -13,4 +13,5 @@ supported:
   - spi
   - watchdog
   - hwinfo
+  - netif:openthread
 vendor: ti

boards/ti/sk_am62/doc/index.rst

@@ -46,6 +46,8 @@ The sk_am62 configuration supports the following hardware features:
 +-----------+------------+-------------------------------------+
 | UART      | on-chip    | serial                              |
 +-----------+------------+-------------------------------------+
+| Mailbox   | on-chip    | IPC Mailbox                         |
++-----------+------------+-------------------------------------+
 
 Other hardware features are not currently supported by the port.
 

boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_appcpu.dts

@@ -5,7 +5,7 @@
 
 /dts-v1/;
 #include <espressif/esp32s3/esp32s3_r2.dtsi>
-#include <espressif/partitions_0x0_amp.dtsi>
+#include <espressif/partitions_0x0_amp_16M.dtsi>
 
 / {
 	model = "ESP32-S3-Touch-LCD-1.28 APPCPU";

boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_procpu.dts

@@ -9,7 +9,7 @@
 #include <zephyr/dt-bindings/display/panel.h>
 #include <zephyr/dt-bindings/input/input-event-codes.h>
 #include <zephyr/dt-bindings/pwm/pwm.h>
-#include <espressif/partitions_0x0_amp.dtsi>
+#include <espressif/partitions_0x0_amp_16M.dtsi>
 
 / {
 	model = "ESP32-S3-Touch-LCD-1.28 PROCPU";

boards/wemos/esp32s2_lolin_mini/esp32s2_lolin_mini.dts

@@ -22,7 +22,7 @@
 	};
 
 	chosen {
-		zephyr,sram = &sram0;
+		zephyr,sram = &sram1;
 		zephyr,console = &uart0;
 		zephyr,shell-uart = &uart0;
 		zephyr,flash = &flash0;

cmake/mcuboot.cmake

@@ -1,4 +1,4 @@
-# Copyright (c) 2020-2023 Nordic Semiconductor ASA
+# Copyright (c) 2020-2025 Nordic Semiconductor ASA
 # SPDX-License-Identifier: Apache-2.0
 
 # This file includes extra build system logic that is enabled when
@@ -52,23 +52,8 @@ function(zephyr_mcuboot_tasks)
     endif()
   endforeach()
 
-  # Find imgtool. Even though west is installed, imgtool might not be.
-  # The user may also have a custom manifest which doesn't include
-  # MCUboot.
-  #
-  # Therefore, go with an explicitly installed imgtool first, falling
-  # back on mcuboot/scripts/imgtool.py.
-  if(IMGTOOL)
-    set(imgtool_path "${IMGTOOL}")
-  elseif(DEFINED ZEPHYR_MCUBOOT_MODULE_DIR)
-    set(IMGTOOL_PY "${ZEPHYR_MCUBOOT_MODULE_DIR}/scripts/imgtool.py")
-    if(EXISTS "${IMGTOOL_PY}")
-      set(imgtool_path "${IMGTOOL_PY}")
-    endif()
-  endif()
-
   # No imgtool, no signed binaries.
-  if(NOT DEFINED imgtool_path)
+  if(NOT DEFINED IMGTOOL)
     message(FATAL_ERROR "Can't sign images for MCUboot: can't find imgtool. To fix, install imgtool with pip3, or add the mcuboot repository to the west manifest and ensure it has a scripts/imgtool.py file.")
     return()
   endif()
@@ -94,7 +79,7 @@ function(zephyr_mcuboot_tasks)
   endif()
 
   # Basic 'imgtool sign' command with known image information.
-  set(imgtool_sign ${PYTHON_EXECUTABLE} ${imgtool_path} sign
+  set(imgtool_sign ${PYTHON_EXECUTABLE} ${IMGTOOL} sign
       --version ${CONFIG_MCUBOOT_IMGTOOL_SIGN_VERSION} --header-size ${CONFIG_ROM_START_OFFSET}
       --slot-size ${slot_size})
 

cmake/modules/FindHostTools.cmake

@@ -61,9 +61,10 @@ find_program(OPENOCD openocd)
 # bossac is an optional dependency
 find_program(BOSSAC bossac)
 
-# imgtool is an optional dependency (the build may also fall back to scripts/imgtool.py
+# imgtool is an optional dependency (prefer the version that is in the mcuboot repository, if
-# in the mcuboot repository if that's present in some cases)
+# present and a user has not specified a different version)
-find_program(IMGTOOL imgtool)
+zephyr_get(IMGTOOL SYSBUILD LOCAL)
+find_program(IMGTOOL imgtool.py HINTS ${ZEPHYR_MCUBOOT_MODULE_DIR}/scripts/ NAMES imgtool NAMES_PER_DIR)
 
 # winpty is an optional dependency
 find_program(PTY_INTERFACE winpty)

cmake/modules/extensions.cmake

@@ -5202,7 +5202,11 @@ function(zephyr_iterable_section)
   endif()
 
   if(SECTION_NUMERIC)
-    set(INPUT "._${SECTION_NAME}.static.*_?_*;._${SECTION_NAME}.static.*_??_*")
+    set(INPUT "._${SECTION_NAME}.static.*_?_*;"
+              "._${SECTION_NAME}.static.*_??_*;"
+              "._${SECTION_NAME}.static.*_???_*;"
+              "._${SECTION_NAME}.static.*_????_*;"
+              "._${SECTION_NAME}.static.*_?????_*")
   else()
     set(INPUT "._${SECTION_NAME}.static.*")
   endif()

cmake/modules/version.cmake

@@ -63,7 +63,7 @@ foreach(type file IN ZIP_LISTS VERSION_TYPE VERSION_FILE)
   string(REGEX MATCH "VERSION_TWEAK = ([0-9]*)" _ ${ver})
   set(${type}_VERSION_TWEAK ${CMAKE_MATCH_1})
 
-  string(REGEX MATCH "EXTRAVERSION = ([a-z0-9]*)" _ ${ver})
+  string(REGEX MATCH "EXTRAVERSION = ([a-z0-9\.\-]*)" _ ${ver})
   set(${type}_VERSION_EXTRA ${CMAKE_MATCH_1})
 
   # Validate all version fields fit in a single byte

doc/build/version/index.rst

@@ -39,19 +39,19 @@ field to a single byte (note that there may be further restrictions depending up
 is used for, e.g. bootloaders might only support some of these fields or might place limits on the
 maximum values of fields):
 
-+---------------+----------------------------------------+
++---------------+-------------------------------------------------------+
-| Field         | Data type                              |
+| Field         | Data type                                             |
-+---------------+----------------------------------------+
++---------------+-------------------------------------------------------+
-| VERSION_MAJOR | Numerical (0-255)                      |
+| VERSION_MAJOR | Numerical (0-255)                                     |
-+---------------+----------------------------------------+
++---------------+-------------------------------------------------------+
-| VERSION_MINOR | Numerical (0-255)                      |
+| VERSION_MINOR | Numerical (0-255)                                     |
-+---------------+----------------------------------------+
++---------------+-------------------------------------------------------+
-| PATCHLEVEL    | Numerical (0-255)                      |
+| PATCHLEVEL    | Numerical (0-255)                                     |
-+---------------+----------------------------------------+
++---------------+-------------------------------------------------------+
-| VERSION_TWEAK | Numerical (0-255)                      |
+| VERSION_TWEAK | Numerical (0-255)                                     |
-+---------------+----------------------------------------+
++---------------+-------------------------------------------------------+
-| EXTRAVERSION  | Alphanumerical (Lowercase a-z and 0-9) |
+| EXTRAVERSION  | Alphanumerical (Lowercase a-z and 0-9) and "." or "-" |
-+---------------+----------------------------------------+
++---------------+-------------------------------------------------------+
 
 When an application is configured using CMake, the version file will be automatically processed,
 and will be checked automatically each time the version is changed, so CMake does not need to be
@@ -65,7 +65,7 @@ For the sections below, examples are provided for the following :file:`VERSION`
    VERSION_MINOR = 2
    PATCHLEVEL = 3
    VERSION_TWEAK = 4
-   EXTRAVERSION = unstable
+   EXTRAVERSION = unstable.5
 
 Use in code
 ===========
@@ -74,120 +74,120 @@ To use the version information in application code, the version file must be inc
 fields can be freely used. The include file name is :file:`app_version.h` (no path is needed), the
 following defines are available:
 
-+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
++-----------------------------+-------------------+------------------------------------------------------+---------------------------+
-| Define                      | Type              | Field(s)                                             | Example                 |
+| Define                      | Type              | Field(s)                                             | Example                   |
-+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
++-----------------------------+-------------------+------------------------------------------------------+---------------------------+
-| APPVERSION                  | Numerical         | ``VERSION_MAJOR`` (left shifted by 24 bits), |br|    | 0x1020304               |
+| APPVERSION                  | Numerical         | ``VERSION_MAJOR`` (left shifted by 24 bits), |br|    | 0x1020304                 |
-|                             |                   | ``VERSION_MINOR`` (left shifted by 16 bits), |br|    |                         |
+|                             |                   | ``VERSION_MINOR`` (left shifted by 16 bits), |br|    |                           |
-|                             |                   | ``PATCHLEVEL`` (left shifted by 8 bits), |br|        |                         |
+|                             |                   | ``PATCHLEVEL`` (left shifted by 8 bits), |br|        |                           |
-|                             |                   | ``VERSION_TWEAK``                                    |                         |
+|                             |                   | ``VERSION_TWEAK``                                    |                           |
-+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
++-----------------------------+-------------------+------------------------------------------------------+---------------------------+
-| APP_VERSION_NUMBER          | Numerical         | ``VERSION_MAJOR`` (left shifted by 16 bits), |br|    | 0x10203                 |
+| APP_VERSION_NUMBER          | Numerical         | ``VERSION_MAJOR`` (left shifted by 16 bits), |br|    | 0x10203                   |
-|                             |                   | ``VERSION_MINOR`` (left shifted by 8 bits), |br|     |                         |
+|                             |                   | ``VERSION_MINOR`` (left shifted by 8 bits), |br|     |                           |
-|                             |                   | ``PATCHLEVEL``                                       |                         |
+|                             |                   | ``PATCHLEVEL``                                       |                           |
-+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
++-----------------------------+-------------------+------------------------------------------------------+---------------------------+
-| APP_VERSION_MAJOR           | Numerical         | ``VERSION_MAJOR``                                    | 1                       |
+| APP_VERSION_MAJOR           | Numerical         | ``VERSION_MAJOR``                                    | 1                         |
-+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
++-----------------------------+-------------------+------------------------------------------------------+---------------------------+
-| APP_VERSION_MINOR           | Numerical         | ``VERSION_MINOR``                                    | 2                       |
+| APP_VERSION_MINOR           | Numerical         | ``VERSION_MINOR``                                    | 2                         |
-+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
++-----------------------------+-------------------+------------------------------------------------------+---------------------------+
-| APP_PATCHLEVEL              | Numerical         | ``PATCHLEVEL``                                       | 3                       |
+| APP_PATCHLEVEL              | Numerical         | ``PATCHLEVEL``                                       | 3                         |
-+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
++-----------------------------+-------------------+------------------------------------------------------+---------------------------+
-| APP_TWEAK                   | Numerical         | ``VERSION_TWEAK``                                    | 4                       |
+| APP_TWEAK                   | Numerical         | ``VERSION_TWEAK``                                    | 4                         |
-+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
++-----------------------------+-------------------+------------------------------------------------------+---------------------------+
-| APP_VERSION_STRING          | String (quoted)   | ``VERSION_MAJOR``, |br|                              | "1.2.3-unstable"        |
+| APP_VERSION_STRING          | String (quoted)   | ``VERSION_MAJOR``, |br|                              | "1.2.3-unstable.5"        |
-|                             |                   | ``VERSION_MINOR``, |br|                              |                         |
+|                             |                   | ``VERSION_MINOR``, |br|                              |                           |
-|                             |                   | ``PATCHLEVEL``, |br|                                 |                         |
+|                             |                   | ``PATCHLEVEL``, |br|                                 |                           |
-|                             |                   | ``EXTRAVERSION`` |br|                                |                         |
+|                             |                   | ``EXTRAVERSION`` |br|                                |                           |
-+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
++-----------------------------+-------------------+------------------------------------------------------+---------------------------+
-| APP_VERSION_EXTENDED_STRING | String (quoted)   | ``VERSION_MAJOR``, |br|                              | "1.2.3-unstable+4"      |
+| APP_VERSION_EXTENDED_STRING | String (quoted)   | ``VERSION_MAJOR``, |br|                              | "1.2.3-unstable.5+4"      |
-|                             |                   | ``VERSION_MINOR``, |br|                              |                         |
+|                             |                   | ``VERSION_MINOR``, |br|                              |                           |
-|                             |                   | ``PATCHLEVEL``, |br|                                 |                         |
+|                             |                   | ``PATCHLEVEL``, |br|                                 |                           |
-|                             |                   | ``EXTRAVERSION`` |br|                                |                         |
+|                             |                   | ``EXTRAVERSION`` |br|                                |                           |
-|                             |                   | ``VERSION_TWEAK`` |br|                               |                         |
+|                             |                   | ``VERSION_TWEAK`` |br|                               |                           |
-+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
++-----------------------------+-------------------+------------------------------------------------------+---------------------------+
-| APP_VERSION_TWEAK_STRING    | String (quoted)   | ``VERSION_MAJOR``, |br|                              | "1.2.3+4"               |
+| APP_VERSION_TWEAK_STRING    | String (quoted)   | ``VERSION_MAJOR``, |br|                              | "1.2.3+4"                 |
-|                             |                   | ``VERSION_MINOR``, |br|                              |                         |
+|                             |                   | ``VERSION_MINOR``, |br|                              |                           |
-|                             |                   | ``PATCHLEVEL``, |br|                                 |                         |
+|                             |                   | ``PATCHLEVEL``, |br|                                 |                           |
-|                             |                   | ``VERSION_TWEAK`` |br|                               |                         |
+|                             |                   | ``VERSION_TWEAK`` |br|                               |                           |
-+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
++-----------------------------+-------------------+------------------------------------------------------+---------------------------+
-| APP_BUILD_VERSION           | String (unquoted) | None (value of ``git describe --abbrev=12 --always`` | v3.3.0-18-g2c85d9224fca |
+| APP_BUILD_VERSION           | String (unquoted) | None (value of ``git describe --abbrev=12 --always`` | v3.3.0-18-g2c85d9224fca   |
-|                             |                   | from application repository)                         |                         |
+|                             |                   | from application repository)                         |                           |
-+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
++-----------------------------+-------------------+------------------------------------------------------+---------------------------+
 
 Use in Kconfig
 ==============
 
 The following variables are available for usage in Kconfig files:
 
-+--------------------------------+-----------+--------------------------+------------------+
++--------------------------------+-----------+--------------------------+--------------------+
-| Variable                       | Type      | Field(s)                 | Example          |
+| Variable                       | Type      | Field(s)                 | Example            |
-+--------------------------------+-----------+--------------------------+------------------+
++--------------------------------+-----------+--------------------------+--------------------+
-| $(VERSION_MAJOR)               | Numerical | ``VERSION_MAJOR``        | 1                |
+| $(VERSION_MAJOR)               | Numerical | ``VERSION_MAJOR``        | 1                  |
-+--------------------------------+-----------+--------------------------+------------------+
++--------------------------------+-----------+--------------------------+--------------------+
-| $(VERSION_MINOR)               | Numerical | ``VERSION_MINOR``        | 2                |
+| $(VERSION_MINOR)               | Numerical | ``VERSION_MINOR``        | 2                  |
-+--------------------------------+-----------+--------------------------+------------------+
++--------------------------------+-----------+--------------------------+--------------------+
-| $(PATCHLEVEL)                  | Numerical | ``PATCHLEVEL``           | 3                |
+| $(PATCHLEVEL)                  | Numerical | ``PATCHLEVEL``           | 3                  |
-+--------------------------------+-----------+--------------------------+------------------+
++--------------------------------+-----------+--------------------------+--------------------+
-| $(VERSION_TWEAK)               | Numerical | ``VERSION_TWEAK``        | 4                |
+| $(VERSION_TWEAK)               | Numerical | ``VERSION_TWEAK``        | 4                  |
-+--------------------------------+-----------+--------------------------+------------------+
++--------------------------------+-----------+--------------------------+--------------------+
-| $(APPVERSION)                  | String    | ``VERSION_MAJOR``, |br|  | 1.2.3-unstable   |
+| $(APPVERSION)                  | String    | ``VERSION_MAJOR``, |br|  | 1.2.3-unstable.5   |
-|                                |           | ``VERSION_MINOR``, |br|  |                  |
+|                                |           | ``VERSION_MINOR``, |br|  |                    |
-|                                |           | ``PATCHLEVEL``, |br|     |                  |
+|                                |           | ``PATCHLEVEL``, |br|     |                    |
-|                                |           | ``EXTRAVERSION``         |                  |
+|                                |           | ``EXTRAVERSION``         |                    |
-+--------------------------------+-----------+--------------------------+------------------+
++--------------------------------+-----------+--------------------------+--------------------+
-| $(APP_VERSION_EXTENDED_STRING) | String    | ``VERSION_MAJOR``, |br|  | 1.2.3-unstable+4 |
+| $(APP_VERSION_EXTENDED_STRING) | String    | ``VERSION_MAJOR``, |br|  | 1.2.3-unstable.5+4 |
-|                                |           | ``VERSION_MINOR``, |br|  |                  |
+|                                |           | ``VERSION_MINOR``, |br|  |                    |
-|                                |           | ``PATCHLEVEL``, |br|     |                  |
+|                                |           | ``PATCHLEVEL``, |br|     |                    |
-|                                |           | ``EXTRAVERSION``, |br|   |                  |
+|                                |           | ``EXTRAVERSION``, |br|   |                    |
-|                                |           | ``VERSION_TWEAK``        |                  |
+|                                |           | ``VERSION_TWEAK``        |                    |
-+--------------------------------+-----------+--------------------------+------------------+
++--------------------------------+-----------+--------------------------+--------------------+
-| $(APP_VERSION_TWEAK_STRING)    | String    | ``VERSION_MAJOR``, |br|  | 1.2.3+4          |
+| $(APP_VERSION_TWEAK_STRING)    | String    | ``VERSION_MAJOR``, |br|  | 1.2.3+4            |
-|                                |           | ``VERSION_MINOR``, |br|  |                  |
+|                                |           | ``VERSION_MINOR``, |br|  |                    |
-|                                |           | ``PATCHLEVEL``, |br|     |                  |
+|                                |           | ``PATCHLEVEL``, |br|     |                    |
-|                                |           | ``VERSION_TWEAK``        |                  |
+|                                |           | ``VERSION_TWEAK``        |                    |
-+--------------------------------+-----------+--------------------------+------------------+
++--------------------------------+-----------+--------------------------+--------------------+
 
 Use in CMake
 ============
 
 The following variable are available for usage in CMake files:
 
-+-----------------------------+-----------------+---------------------------------------------------+------------------+
++-----------------------------+-----------------+---------------------------------------------------+--------------------+
-| Variable                    | Type            | Field(s)                                          | Example          |
+| Variable                    | Type            | Field(s)                                          | Example            |
-+-----------------------------+-----------------+---------------------------------------------------+------------------+
++-----------------------------+-----------------+---------------------------------------------------+--------------------+
-| APPVERSION                  | Numerical (hex) | ``VERSION_MAJOR`` (left shifted by 24 bits), |br| | 0x1020304        |
+| APPVERSION                  | Numerical (hex) | ``VERSION_MAJOR`` (left shifted by 24 bits), |br| | 0x1020304          |
-|                             |                 | ``VERSION_MINOR`` (left shifted by 16 bits), |br| |                  |
+|                             |                 | ``VERSION_MINOR`` (left shifted by 16 bits), |br| |                    |
-|                             |                 | ``PATCHLEVEL`` (left shifted by 8 bits), |br|     |                  |
+|                             |                 | ``PATCHLEVEL`` (left shifted by 8 bits), |br|     |                    |
-|                             |                 | ``VERSION_TWEAK``                                 |                  |
+|                             |                 | ``VERSION_TWEAK``                                 |                    |
-+-----------------------------+-----------------+---------------------------------------------------+------------------+
++-----------------------------+-----------------+---------------------------------------------------+--------------------+
-| APP_VERSION_NUMBER          | Numerical (hex) | ``VERSION_MAJOR`` (left shifted by 16 bits), |br| | 0x10203          |
+| APP_VERSION_NUMBER          | Numerical (hex) | ``VERSION_MAJOR`` (left shifted by 16 bits), |br| | 0x10203            |
-|                             |                 | ``VERSION_MINOR`` (left shifted by 8 bits), |br|  |                  |
+|                             |                 | ``VERSION_MINOR`` (left shifted by 8 bits), |br|  |                    |
-|                             |                 | ``PATCHLEVEL``                                    |                  |
+|                             |                 | ``PATCHLEVEL``                                    |                    |
-+-----------------------------+-----------------+---------------------------------------------------+------------------+
++-----------------------------+-----------------+---------------------------------------------------+--------------------+
-| APP_VERSION_MAJOR           | Numerical       | ``VERSION_MAJOR``                                 | 1                |
+| APP_VERSION_MAJOR           | Numerical       | ``VERSION_MAJOR``                                 | 1                  |
-+-----------------------------+-----------------+---------------------------------------------------+------------------+
++-----------------------------+-----------------+---------------------------------------------------+--------------------+
-| APP_VERSION_MINOR           | Numerical       | ``VERSION_MINOR``                                 | 2                |
+| APP_VERSION_MINOR           | Numerical       | ``VERSION_MINOR``                                 | 2                  |
-+-----------------------------+-----------------+---------------------------------------------------+------------------+
++-----------------------------+-----------------+---------------------------------------------------+--------------------+
-| APP_PATCHLEVEL              | Numerical       | ``PATCHLEVEL``                                    | 3                |
+| APP_PATCHLEVEL              | Numerical       | ``PATCHLEVEL``                                    | 3                  |
-+-----------------------------+-----------------+---------------------------------------------------+------------------+
++-----------------------------+-----------------+---------------------------------------------------+--------------------+
-| APP_VERSION_TWEAK           | Numerical       | ``VERSION_TWEAK``                                 | 4                |
+| APP_VERSION_TWEAK           | Numerical       | ``VERSION_TWEAK``                                 | 4                  |
-+-----------------------------+-----------------+---------------------------------------------------+------------------+
++-----------------------------+-----------------+---------------------------------------------------+--------------------+
-| APP_VERSION_STRING          | String          | ``VERSION_MAJOR``, |br|                           | 1.2.3-unstable   |
+| APP_VERSION_STRING          | String          | ``VERSION_MAJOR``, |br|                           | 1.2.3-unstable.5   |
-|                             |                 | ``VERSION_MINOR``, |br|                           |                  |
+|                             |                 | ``VERSION_MINOR``, |br|                           |                    |
-|                             |                 | ``PATCHLEVEL``, |br|                              |                  |
+|                             |                 | ``PATCHLEVEL``, |br|                              |                    |
-|                             |                 | ``EXTRAVERSION``                                  |                  |
+|                             |                 | ``EXTRAVERSION``                                  |                    |
-+-----------------------------+-----------------+---------------------------------------------------+------------------+
++-----------------------------+-----------------+---------------------------------------------------+--------------------+
-| APP_VERSION_EXTENDED_STRING | String          | ``VERSION_MAJOR``, |br|                           | 1.2.3-unstable+4 |
+| APP_VERSION_EXTENDED_STRING | String          | ``VERSION_MAJOR``, |br|                           | 1.2.3-unstable.5+4 |
-|                             |                 | ``VERSION_MINOR``, |br|                           |                  |
+|                             |                 | ``VERSION_MINOR``, |br|                           |                    |
-|                             |                 | ``PATCHLEVEL``, |br|                              |                  |
+|                             |                 | ``PATCHLEVEL``, |br|                              |                    |
-|                             |                 | ``EXTRAVERSION``, |br|                            |                  |
+|                             |                 | ``EXTRAVERSION``, |br|                            |                    |
-|                             |                 | ``VERSION_TWEAK``                                 |                  |
+|                             |                 | ``VERSION_TWEAK``                                 |                    |
-+-----------------------------+-----------------+---------------------------------------------------+------------------+
++-----------------------------+-----------------+---------------------------------------------------+--------------------+
-| APP_VERSION_TWEAK_STRING    | String          | ``VERSION_MAJOR``, |br|                           | 1.2.3+4          |
+| APP_VERSION_TWEAK_STRING    | String          | ``VERSION_MAJOR``, |br|                           | 1.2.3+4            |
-|                             |                 | ``VERSION_MINOR``, |br|                           |                  |
+|                             |                 | ``VERSION_MINOR``, |br|                           |                    |
-|                             |                 | ``PATCHLEVEL``, |br|                              |                  |
+|                             |                 | ``PATCHLEVEL``, |br|                              |                    |
-|                             |                 | ``VERSION_TWEAK``                                 |                  |
+|                             |                 | ``VERSION_TWEAK``                                 |                    |
-+-----------------------------+-----------------+---------------------------------------------------+------------------+
++-----------------------------+-----------------+---------------------------------------------------+--------------------+
 
 Use in MCUboot-supported applications
 =====================================

doc/contribute/contributor_expectations.rst

@@ -322,79 +322,3 @@ the steps below:
 .. _Architecture Project: https://github.com/zephyrproject-rtos/zephyr/projects/18
 
 .. _Architecture Working Group: https://github.com/zephyrproject-rtos/zephyr/wiki/Architecture-Working-Group
-
-
-.. _reviewer-expectations:
-
-Reviewer Expectations
-*********************
-
-- Be respectful when commenting on PRs. Refer to the Zephyr `Code of Conduct`_
-  for more details.
-
-- The Zephyr Project recognizes that reviewers and maintainers have limited
-  bandwidth. As a reviewer, prioritize review requests in the following order:
-
-    #. PRs related to items in the `Zephyr Release Plan`_ or those targeting
-       the next release during the stabilization period (after RC1).
-    #. PRs where the reviewer has requested blocking changes.
-    #. PRs assigned to the reviewer as the area maintainer.
-    #. All other PRs.
-
-- Reviewers shall strive to advance the PR to a mergeable state with their
-  feedback and engagement with the PR author.
-
-- Try to provide feedback on the entire PR in one shot. This provides the
-  contributor an opportunity to address all comments in the next PR update.
-
-- Partial reviews are permitted, but the reviewer must add a comment indicating
-  what portion of the PR they reviewed. Examples of useful partial reviews
-  include:
-
-  - Domain specific reviews (e.g. Devicetree).
-  - Code style changes that impact the readability of the PR.
-  - Reviewing commits separately when the requested changes cascade into the
-    later commits.
-
-- Avoid increasing scope of the PR by requesting new features, especially when
-  there is a corresponding :ref:`RFC <rfcs>` associated with the PR. Instead,
-  reviewers should add suggestions as a comment to the :ref:`RFC <rfcs>`. This
-  also encourages more collaboration as it is easier for multiple contributors
-  to work on a feature once the minimum implementation has merged.
-
-- When using the "Request Changes" option, mark trivial, non-functional,
-  requests as "Non-blocking" in the comment. Reviewers should approve PRs once
-  only non-blocking changes remain. The PR author has discretion as to whether
-  they address all non-blocking comments. PR authors should acknowledge every
-  review comment in some way, even if it's just with an emoticon.
-
-- Style changes that the reviewer disagrees with but that are not documented as
-  part of the project can be pointed out as non-blocking, but cannot constitute
-  a reason for a request for changes. The reviewer can optionally correct any
-  potential inconsistencies in the tree, document the new guidelines or rules,
-  and then enforce them as part of the review.
-
-- Whenever requesting style related changes, reviewers should be able to point
-  out the corresponding guideline, rule or rationale in the project's
-  documentation.  This does not apply to certain types of requests for changes,
-  notably those specific to the changes being submitted (e.g. the use of a
-  particular data structure or the choice of locking primitives).
-
-- Reviewers shall be *clear* about what changes they are requesting when the
-  "Request Changes" option is used. Requested changes shall be in the scope of
-  the PR in question and following the contribution and style guidelines of the
-  project. Furthermore, reviewers must be able to point back to the exact issues
-  in the PR that triggered a request for changes.
-
-- Reviewers should not request changes for issues which are automatically
-  caught by CI, as this causes the pull request to remain blocked even after CI
-  failures have been addressed and may unnecessarily delay it from being merged.
-
-- Reviewers shall not close a PR due to technical or structural disagreement.
-  If requested changes cannot be resolved within the review process, the
-  :ref:`pr_technical_escalation` path shall be used for any potential resolution
-  path, which may include closing the PR.
-
-.. _Code of Conduct: https://github.com/zephyrproject-rtos/zephyr/blob/main/CODE_OF_CONDUCT.md
-
-.. _Zephyr Release Plan: https://github.com/orgs/zephyrproject-rtos/projects/13

doc/contribute/guidelines.rst

@@ -12,6 +12,34 @@ This document explains how to participate in project conversations, log bugs
 and enhancement requests, and submit patches to the project so your patch will
 be accepted quickly in the codebase.
 
+
+Prerequisites
+*************
+
+.. _Zephyr Project website: https://zephyrproject.org
+
+As a contributor, you'll want to be familiar with the Zephyr project, how to
+configure, install, and use it as explained in the `Zephyr Project website`_
+and how to set up your development environment as introduced in the Zephyr
+:ref:`getting_started`.
+
+You should be familiar with common developer tools such as Git and CMake, and
+platforms such as GitHub.
+
+If you haven't already done so, you'll need to create a (free) GitHub account
+on https://github.com and have Git tools available on your development system.
+
+.. note::
+   The Zephyr development workflow supports all 3 major operating systems
+   (Linux, macOS, and Windows) but some of the tools used in the sections below
+   are only available on Linux and macOS. On Windows, instead of running these
+   tools yourself, you will need to rely on the Continuous Integration (CI)
+   service using Github Actions, which runs automatically on GitHub when you submit
+   your Pull Request (PR).  You can see any failure results in the workflow
+   details link near the end of the PR conversation list. See
+   `Continuous Integration`_ for more information
+
+
 .. _licensing_requirements:
 
 Licensing
@@ -156,54 +184,6 @@ Additional requirements:
 - If you are altering an existing commit created by someone else, you must add
   your Signed-off-by: line without removing the existing one.
 
-- If you forget to add the Signed-off-by: line, you can add it to your previous
-  commit by running ``git commit --amend -s``.
-
-- If you've pushed your changes to GitHub already you'll need to force push
-  your branch after this with ``git push -f``.
-
-Notes
-=====
-
-Any contributions made as part of submitted pull requests are considered free
-for the Project to use. Developers are permitted to cherry-pick patches that
-are included in pull requests submitted by other contributors. It is expected
-that
-
-* the content of the patches will not be substantially modified,
-* the cherry-picked commits or portions of a commit shall preserve the original
-  sign-off messages and the author identity.
-
-:ref:`modifying_contributions` describes additional recommended policies
-around working with contributions submitted by other developers.
-
-
-Prerequisites
-*************
-
-.. _Zephyr Project website: https://zephyrproject.org
-
-As a contributor, you'll want to be familiar with the Zephyr project, how to
-configure, install, and use it as explained in the `Zephyr Project website`_
-and how to set up your development environment as introduced in the Zephyr
-:ref:`getting_started`.
-
-You should be familiar with common developer tools such as Git and CMake, and
-platforms such as GitHub.
-
-If you haven't already done so, you'll need to create a (free) GitHub account
-on https://github.com and have Git tools available on your development system.
-
-.. note::
-   The Zephyr development workflow supports all 3 major operating systems
-   (Linux, macOS, and Windows) but some of the tools used in the sections below
-   are only available on Linux and macOS. On Windows, instead of running these
-   tools yourself, you will need to rely on the Continuous Integration (CI)
-   service using Github Actions, which runs automatically on GitHub when you submit
-   your Pull Request (PR).  You can see any failure results in the workflow
-   details link near the end of the PR conversation list. See
-   `Continuous Integration`_ for more information
-
 .. _source_tree_v2:
 
 Source Tree Structure
@@ -390,11 +370,6 @@ this:
 You need to change text in square brackets (``[like this]``) above to
 fit your commit.
 
-Examples and more details follow.
-
-Example
--------
-
 Here is an example of a good commit message.
 
 .. code-block:: none
@@ -531,146 +506,6 @@ reference manuals, etc.
 
    Link: https://github.com/zephyrproject-rtos/zephyr/issues/<issue number>
 
-.. _coding_style:
-
-Coding Style
-============
-
-.. note::
-   Coding style is enforced on any new or modified code, but contributors are
-   not expected to correct the style on existing code that they are not
-   modifying.
-
-.. note::
-   For style aspects where the guidelines don't offer explicit guidance or
-   permit multiple valid ways to express something, contributors should follow
-   the style of existing code in the tree, with higher importance given to
-   "nearby" code (first look at the function, then the same file, then
-   subsystem, etc).
-
-.. _Linux kernel coding style:
-   https://kernel.org/doc/html/latest/process/coding-style.html
-
-.. _snake case:
-   https://en.wikipedia.org/wiki/Snake_case
-
-In general, follow the `Linux kernel coding style`_, with the following
-exceptions and clarifications:
-
-* Use `snake case`_ for code and variables.
-* The line length is 100 columns or fewer. In the documentation, longer lines
-  for URL references are an allowed exception.
-* Add braces to every ``if``, ``else``, ``do``, ``while``, ``for`` and
-  ``switch`` body, even for single-line code blocks.
-* Use spaces instead of tabs to align comments after declarations, as needed.
-* Use C89-style single line comments, ``/*  */``. The C99-style single line
-  comment, ``//``, is not allowed.
-* Use ``/**  */`` for doxygen comments that need to appear in the documentation.
-* Avoid using binary literals (constants starting with ``0b``).
-* Avoid using non-ASCII symbols in code, unless it significantly improves
-  clarity, avoid emojis in any case.
-* Use proper capitalization of nouns in code comments (e.g. ``UART`` and not
-  ``uart``, ``CMake`` and not ``cmake``).
-
-Beyond C code, the following coding style rules apply to other types of files:
-
-* CMake
-
-  * Indent with spaces, indentation is two spaces.
-  * Don't use space between commands (e.g. ``if``) and the corresponding opening
-    bracket (e.g. ``(``).
-
-* Devicetree
-
-  * Indent with tabs.
-  * Follow the Devicetree specification conventions and rules.
-  * Use dashes (``-``) as word separators for node and property names.
-  * Use underscores (``_``) as word separators in node labels.
-  * Leave a single space on each side of the equal sign (``=``) in property
-    definitions.
-  * Don't insert empty lines before a dedenting ``};``.
-  * Insert a single empty line to separate nodes at the same hierarchy level.
-
-* Kconfig
-
-  * Line length of 100 columns or fewer.
-  * Indent with tabs, except for ``help`` entry text which should be placed at
-    one tab plus two extra spaces.
-  * Leave a single empty line between option declarations.
-  * Use Statements like ``select`` carefully, see
-    :ref:`kconfig_tips_and_tricks` for more information.
-  * Format comments as ``# Comment`` rather than ``#Comment``
-  * Insert an empty line before/after each top-level ``if`` and ``endif``
-
-Use these coding guidelines to ensure that your development complies with the
-project's style and naming conventions.
-
-The Linux kernel GPL-licensed tool ``checkpatch`` is used to check
-coding style conformity.
-
-.. note::
-   checkpatch does not currently run on Windows.
-
-Checkpatch is available in the scripts directory. To invoke it when committing
-code, make the file *$ZEPHYR_BASE/.git/hooks/pre-commit* executable and edit
-it to contain:
-
-.. code-block:: bash
-
-    #!/bin/sh
-    set -e exec
-    exec git diff --cached | ${ZEPHYR_BASE}/scripts/checkpatch.pl -
-
-Instead of running checkpatch at each commit, you may prefer to run it only
-before pushing on zephyr repo. To do this, make the file
-*$ZEPHYR_BASE/.git/hooks/pre-push* executable and edit it to contain:
-
-.. code-block:: bash
-
-    #!/bin/sh
-    remote="$1"
-    url="$2"
-
-    z40=0000000000000000000000000000000000000000
-
-    echo "Run push hook"
-
-    while read local_ref local_sha remote_ref remote_sha
-    do
-        args="$remote $url $local_ref $local_sha $remote_ref $remote_sha"
-        exec ${ZEPHYR_BASE}/scripts/series-push-hook.sh $args
-    done
-
-    exit 0
-
-If you want to override checkpatch verdict and push you branch despite reported
-issues, you can add option --no-verify to the git push command.
-
-A more complete alternative to this is using :ref:`check_compliance_py` script.
-
-clang-format
-------------
-
-The `clang-format tool <https://clang.llvm.org/docs/ClangFormat.html>`_ can
-be helpful to quickly reformat large amounts of new source code to our
-`Coding Style`_ standards together with the ``.clang-format`` configuration file
-provided in the repository. ``clang-format`` is well integrated into most
-editors, but you can also run it manually like this:
-
-.. code-block:: bash
-
-   clang-format -i my_source_file.c
-
-``clang-format`` is part of LLVM, which can be downloaded from the project
-`releases page <https://github.com/llvm/llvm-project/releases>`_. Note that if
-you are a Linux user, ``clang-format`` will likely be available as a package in
-your distribution repositories.
-
-When there are differences between the `Coding Style`_ guidelines and the
-formatting generated by code formatting tools, the `Coding Style`_ guidelines
-take precedence. If there is ambiguity between formatting tools and the
-guidelines, maintainers may decide which style should be adopted.
-
 .. _Continuous Integration:
 
 Continuous Integration (CI)

doc/contribute/index.rst

@@ -15,9 +15,13 @@ General Guidelines
    :hidden:
 
    guidelines.rst
-   coding_guidelines/index.rst
-   proposals_and_rfcs.rst
    contributor_expectations.rst
+   reviewer_expectations.rst
+   coding_guidelines/index.rst
+   style_guidelines.rst
+   proposals_and_rfcs.rst
+   modifying_contributions.rst
+
 
 :ref:`contribute_guidelines`
    Learn about the overall process and guidelines for contributing to the Zephyr project.
@@ -30,17 +34,26 @@ General Guidelines
    This document is another mandatory read that describes the expected behavior of *all*
    contributors to the project.
 
+:ref:`reviewer-expectations`
+   This document is another mandatory read that describes the expected behavior when revieweing
+   contributions to the project.
+
 :ref:`coding_guidelines`
    Code contributions are expected to follow a set of coding guidelines to ensure consistency and
    readability across the code base.
 
-   This page describes these guidelines and introduces important considerations regarding the use of
+:ref:`coding_style`
-   :ref:`inclusive language <coding_guideline_inclusive_language>`.
+   Code contributions are expected to follow a set of style guidelines to ensure consistency and
+   readability across the code base.
 
 :ref:`rfcs`
    Learn when and how to submit RFCs (Request for Comments) for new features and changes to the
    project.
 
+:ref:`modifying_contributions`
+   Guidelines for modifying contributions made by other developers and how to deal with stale pull
+   requests.
+
 Documentation
 =============
 
@@ -88,16 +101,6 @@ Dealing with external components
    in binary form, this page describes the process and guidelines for :ref:`contributing binary
    blobs <blobs-process>` to the project.
 
-Zephyr Contributor Badge
-========================
-
-When your first contribution to the Zephyr project gets merged, you'll become eligible to claim your
-Zephyr Contributor Badge. This digital badge can be displayed on your website, blog, social media
-profile, etc. It will allow you to showcase your involvement in the Zephyr project and help raise
-its awareness.
-
-You may apply for your Contributor Badge by filling out the `Zephyr Contributor Badge form`_.
-
 Need help along the way?
 ========================
 
@@ -107,4 +110,3 @@ You may join our Discord_ channel or use the `Developer Mailing List`_.
 
 .. _Discord: https://chat.zephyrproject.org
 .. _Developer Mailing List: https://lists.zephyrproject.org/g/devel
-.. _Zephyr Contributor Badge form: https://forms.gle/oCw9iAPLhUsHTapc8

doc/contribute/reviewer_expectations.rst

@@ -0,0 +1,74 @@
+.. _reviewer-expectations:
+
+Reviewer Expectations
+#####################
+
+- Be respectful when commenting on PRs. Refer to the Zephyr `Code of Conduct`_
+  for more details.
+
+- The Zephyr Project recognizes that reviewers and maintainers have limited
+  bandwidth. As a reviewer, prioritize review requests in the following order:
+
+    #. PRs related to items in the `Zephyr Release Plan`_ or those targeting
+       the next release during the stabilization period (after RC1).
+    #. PRs where the reviewer has requested blocking changes.
+    #. PRs assigned to the reviewer as the area maintainer.
+    #. All other PRs.
+
+- Reviewers shall strive to advance the PR to a mergeable state with their
+  feedback and engagement with the PR author.
+
+- Try to provide feedback on the entire PR in one shot. This provides the
+  contributor an opportunity to address all comments in the next PR update.
+
+- Partial reviews are permitted, but the reviewer must add a comment indicating
+  what portion of the PR they reviewed. Examples of useful partial reviews
+  include:
+
+  - Domain specific reviews (e.g. Devicetree).
+  - Code style changes that impact the readability of the PR.
+  - Reviewing commits separately when the requested changes cascade into the
+    later commits.
+
+- Avoid increasing scope of the PR by requesting new features, especially when
+  there is a corresponding :ref:`RFC <rfcs>` associated with the PR. Instead,
+  reviewers should add suggestions as a comment to the :ref:`RFC <rfcs>`. This
+  also encourages more collaboration as it is easier for multiple contributors
+  to work on a feature once the minimum implementation has merged.
+
+- When using the "Request Changes" option, mark trivial, non-functional,
+  requests as "Non-blocking" in the comment. Reviewers should approve PRs once
+  only non-blocking changes remain. The PR author has discretion as to whether
+  they address all non-blocking comments. PR authors should acknowledge every
+  review comment in some way, even if it's just with an emoticon.
+
+- Style changes that the reviewer disagrees with but that are not documented as
+  part of the project can be pointed out as non-blocking, but cannot constitute
+  a reason for a request for changes. The reviewer can optionally correct any
+  potential inconsistencies in the tree, document the new guidelines or rules,
+  and then enforce them as part of the review.
+
+- Whenever requesting style related changes, reviewers should be able to point
+  out the corresponding guideline, rule or rationale in the project's
+  documentation.  This does not apply to certain types of requests for changes,
+  notably those specific to the changes being submitted (e.g. the use of a
+  particular data structure or the choice of locking primitives).
+
+- Reviewers shall be *clear* about what changes they are requesting when the
+  "Request Changes" option is used. Requested changes shall be in the scope of
+  the PR in question and following the contribution and style guidelines of the
+  project. Furthermore, reviewers must be able to point back to the exact issues
+  in the PR that triggered a request for changes.
+
+- Reviewers should not request changes for issues which are automatically
+  caught by CI, as this causes the pull request to remain blocked even after CI
+  failures have been addressed and may unnecessarily delay it from being merged.
+
+- Reviewers shall not close a PR due to technical or structural disagreement.
+  If requested changes cannot be resolved within the review process, the
+  :ref:`pr_technical_escalation` path shall be used for any potential resolution
+  path, which may include closing the PR.
+
+.. _Code of Conduct: https://github.com/zephyrproject-rtos/zephyr/blob/main/CODE_OF_CONDUCT.md
+
+.. _Zephyr Release Plan: https://github.com/orgs/zephyrproject-rtos/projects/13

doc/contribute/style_guidelines.rst

@@ -0,0 +1,150 @@
+.. _coding_style:
+
+
+Coding Style Guidelines
+#######################
+
+C Code and General Style
+************************
+
+Coding style is enforced on any new or modified code, but contributors are
+not expected to correct the style on existing code that they are not
+modifying.
+
+For style aspects where the guidelines don't offer explicit guidance or
+permit multiple valid ways to express something, contributors should follow
+the style of existing code in the tree, with higher importance given to
+"nearby" code (first look at the function, then the same file, then
+subsystem, etc).
+
+In general, follow the `Linux kernel coding style`_, with the following
+exceptions and clarifications:
+
+* Use `snake case`_ for code and variables.
+* The line length is 100 columns or fewer. In the documentation, longer lines
+  for URL references are an allowed exception.
+* Add braces to every ``if``, ``else``, ``do``, ``while``, ``for`` and
+  ``switch`` body, even for single-line code blocks.
+* Use spaces instead of tabs to align comments after declarations, as needed.
+* Use C89-style single line comments, ``/*  */``. The C99-style single line
+  comment, ``//``, is not allowed.
+* Use ``/**  */`` for doxygen comments that need to appear in the documentation.
+* Avoid using binary literals (constants starting with ``0b``).
+* Avoid using non-ASCII symbols in code, unless it significantly improves
+  clarity, avoid emojis in any case.
+* Use proper capitalization of nouns in code comments (e.g. ``UART`` and not
+  ``uart``, ``CMake`` and not ``cmake``).
+
+Beyond C code, the following coding style rules apply to other types of files:
+
+CMake
+*****
+
+  * Indent with spaces, indentation is two spaces.
+  * Don't use space between commands (e.g. ``if``) and the corresponding opening
+    bracket (e.g. ``(``).
+
+Devicetree
+**********
+
+  * Indent with tabs.
+  * Follow the Devicetree specification conventions and rules.
+  * Use dashes (``-``) as word separators for node and property names.
+  * Use underscores (``_``) as word separators in node labels.
+  * Leave a single space on each side of the equal sign (``=``) in property
+    definitions.
+  * Don't insert empty lines before a dedenting ``};``.
+  * Insert a single empty line to separate nodes at the same hierarchy level.
+
+Kconfig
+*******
+
+  * Line length of 100 columns or fewer.
+  * Indent with tabs, except for ``help`` entry text which should be placed at
+    one tab plus two extra spaces.
+  * Leave a single empty line between option declarations.
+  * Use Statements like ``select`` carefully, see
+    :ref:`kconfig_tips_and_tricks` for more information.
+  * Format comments as ``# Comment`` rather than ``#Comment``
+  * Insert an empty line before/after each top-level ``if`` and ``endif``
+    statement.
+
+Style Tools
+***********
+
+Checkpatch
+==========
+
+The Linux kernel GPL-licensed tool ``checkpatch`` is used to check
+coding style conformity.
+
+.. note::
+   checkpatch does not currently run on Windows.
+
+Checkpatch is available in the scripts directory. To invoke it when committing
+code, make the file *$ZEPHYR_BASE/.git/hooks/pre-commit* executable and edit
+it to contain:
+
+.. code-block:: bash
+
+    #!/bin/sh
+    set -e exec
+    exec git diff --cached | ${ZEPHYR_BASE}/scripts/checkpatch.pl -
+
+Instead of running checkpatch at each commit, you may prefer to run it only
+before pushing on zephyr repo. To do this, make the file
+*$ZEPHYR_BASE/.git/hooks/pre-push* executable and edit it to contain:
+
+.. code-block:: bash
+
+    #!/bin/sh
+    remote="$1"
+    url="$2"
+
+    z40=0000000000000000000000000000000000000000
+
+    echo "Run push hook"
+
+    while read local_ref local_sha remote_ref remote_sha
+    do
+        args="$remote $url $local_ref $local_sha $remote_ref $remote_sha"
+        exec ${ZEPHYR_BASE}/scripts/series-push-hook.sh $args
+    done
+
+    exit 0
+
+If you want to override checkpatch verdict and push you branch despite reported
+issues, you can add option --no-verify to the git push command.
+
+A different way for running ``checkpatch`` is by using :ref:`check_compliance_py`
+script, which does additional style and compliance related checks.
+
+clang-format
+============
+
+The `clang-format tool <https://clang.llvm.org/docs/ClangFormat.html>`_ can
+be helpful to quickly reformat large amounts of new source code to our
+`Coding Style Guidelines`_ standards together with the ``.clang-format`` configuration file
+provided in the repository. ``clang-format`` is well integrated into most
+editors, but you can also run it manually like this:
+
+.. code-block:: bash
+
+   clang-format -i my_source_file.c
+
+``clang-format`` is part of LLVM, which can be downloaded from the project
+`releases page <https://github.com/llvm/llvm-project/releases>`_. Note that if
+you are a Linux user, ``clang-format`` will likely be available as a package in
+your distribution repositories.
+
+When there are differences between the `Coding Style Guidelines`_ guidelines and the
+formatting generated by code formatting tools, the `Coding Style Guidelines`_ guidelines
+take precedence. If there is ambiguity between formatting tools and the
+guidelines, maintainers may decide which style should be adopted.
+
+
+.. _Linux kernel coding style:
+   https://kernel.org/doc/html/latest/process/coding-style.html
+
+.. _snake case:
+   https://en.wikipedia.org/wiki/Snake_case

doc/develop/west/workspaces.rst

@@ -321,3 +321,25 @@ v2.5.0 and its modules, then add the ``app1`` and ``app2`` projects:
 
 You can also do this "by hand" by copy/pasting :file:`zephyr/west.yml`
 as shown :ref:`above <west-t2>` for the T2 topology, with the same caveats.
+
+.. _workspace-as-git-repo:
+
+Not supported: workspace topdir as .git repository
+**************************************************
+
+Some users have asked for support making the workspace :ref:`topdir
+<west-workspace>` a git repository, like this example:
+
+.. code-block:: none
+
+   my-workspace/                  # workspace topdir
+   ├── .git/                      # puts the entire workspace in a git repository
+   ├── .west/                     # marks the location of the topdir
+   └── [ ... other projects ...]
+
+This is **not** an officially supported topology. As a design decision, west
+assumes that the workspace topdir itself is not a git repository.
+
+You may be able to make something like this "work" for yourself and your own
+goals. However, future versions of west might contain changes which can "break"
+your setup.