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Author SHA1 Message Date
Adrian Bieri
03fa6a0c33 mcux: drivers: xbara: drop HAS_MCUX_XBARA config
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The HAS_MCUX_XBARA is replaced by the DT_HAS_NXP_MCUX_XBAR_ENABLED

Signed-off-by: Adrian Bieri <adrian.bieri@loepfe.com>
 2025-01-23 19:25:54 +01:00
Mathias Landolt
96146d5740 mcux: drivers: xbarb: add XBARB config option 
Add the possibility to activate the XBARB driver
Update NXP HAL revision to include support for xbarb

Signed-off-by: Mathias Landolt <mathias.landolt@loepfe.com>
Signed-off-by: Adrian Bieri <adrian.bieri@loepfe.com>
 2025-01-23 19:25:54 +01:00
Dominik Ermel
49f5598835 Bluetooth: Mesh: Improve logic for serving devices erase capabilities 
The commit fixes issue where flash_area_flatten has been used where
code was only supposed to erase devices by hardware requirement prior
to write, by replacing the call with flash_area_erase and supporting
logic to select proper path.
There have been following Kconfig options added:
 - CONFIG_BT_MESH_BLOB_IO_FLASH_WITHOUT_ERASE
 - CONFIG_BT_MESH_BLOB_IO_FLASH_WITH_ERASE
that are available for user depending on devices in the system and allow
to turn off paths that are not used by BLOB IO; for example if user
never writes to device with erase CONFIG_BT_MESH_BLOB_IO_FLASH_WITH_ERASE
will disable the path.
Both Kconfig options are y by default and enable all paths.

Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
 2025-01-23 19:25:27 +01:00
Geoffrey Hunter
fa795f4912 lib: smf: Fix handled bug causing events to not propagate. 
When using the SMF for a project discovered that events would sometimes
 not propagate to parent states correctly. Could not create a minimum
reproducable test case for this, but it was found that these changes fixed
the bug. This commit creates a new function to reset internal state,
which is called on entry to smf_set_initial() and smf_set_state().

Closes #81300.

Signed-off-by: Geoffrey Hunter <gbmhunter@gmail.com>
 2025-01-23 19:24:08 +01:00
Bastien Beauchamp
1e75491cdb dts: arm: silabs: Remove exit latency and min residency on Silabs S2 SoCs 
The exit latency and min residency is handled by sl_power_manager.
This improve power consumption by letting the device sleep longer.

Signed-off-by: Bastien Beauchamp <bastien.beauchamp@silabs.com>
 2025-01-23 19:23:27 +01:00
Bastien Beauchamp
ec1a2c6f47 soc: silabs: Fix the PRIMASK for Silabs S2 SoCs 
sl_power_manager_sleep() doesn't expect the PRIMASK to be set when called.
Setting BASEPRI to 0 was moved to sl_power_manager_is_ok_to_sleep(),
this function is called after sl_power_manager_sleep() has set the PRIMASK.
Added sli_power_manager_on_wakeup() to force a clock restore before the
interrupt are handled. Added a call to retrieve the startup measurements,
reducing the early wakeup time.

Signed-off-by: Bastien Beauchamp <bastien.beauchamp@silabs.com>
 2025-01-23 19:23:27 +01:00
Bastien Beauchamp
19756be822 soc: silabs: Fix double WFI for Silabs S2 SoCs 
k_cpu_idle() and sl_power_manager_sleep() call WFI.
Remove the call to k_cpu_idle() and add back its tracing and
hook functions.

Signed-off-by: Bastien Beauchamp <bastien.beauchamp@silabs.com>
 2025-01-23 19:23:27 +01:00
Bastien Beauchamp
d163d4268e soc: silabs: Fix EM4 enter for Silabs S2 SoCs 
Fix PM_STATE_SOFT_OFF to properly enter EM4.

Signed-off-by: Bastien Beauchamp <bastien.beauchamp@silabs.com>
 2025-01-23 19:23:27 +01:00
Khaoula Bidani
6fd8a453d9 boards: st: doc: clean up mbed and IDEs mentions 
Clean up mbed and IDEs mentions of the st boards.

Signed-off-by: Khaoula Bidani <khaoula.bidani-ext@st.com>
 2025-01-23 19:23:09 +01:00
Dmitrii Golovanov
aa705089d3 twister: reporting: Add custom JSON encoder 
Refactor Reporting to use custom ReportingJSONEncoder and encode
all pathlib.Path derived instances there which are possible
e.g. in 'environment.options' received from command line.

Fixes: #83823

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
 2025-01-23 19:22:40 +01:00
Daniel Leung
abb83b97e7 linker: fix lnkr_pinned_rodata_* mismatched types 
In linker-defs.h, lnkr_pinned_rodata_[start/end] are declared as
extern char. However, in linker/utils.h:linker_is_in_rodata(),
they are declared as extern const char. So remove the const in
linker_is_in_rodata() to align both declarations.

Fixes #83461

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
 2025-01-23 19:22:26 +01:00
Martí Bolívar
7d40091fbf doc: the west workspace topdir is not a git repository 
It's a design decision that the west workspace "topdir"
(that is, the top level directory containing the .west directory), is
not itself a git repository. This exists to give us some breathing
room to make changes to the workspace which would otherwise
potentially cause breakage if the entire workspace is in .git.

While this has always been the case, I'm documenting this now because
I reviewed a PR today that flipped my bit from "this is a question to
answer on a case by case basis" to "this is a frequently enough asked
question that I want to be able to link people to the answer":

https://github.com/zephyrproject-rtos/zephyr/pull/84305

We can debate the wisdom of this design decision (and, informally,
I've always tried to avoid breaking these setups), but IMO it's too
late to try to change this in west. Make it explicit in the docs that
you're on your own if you try this.

Signed-off-by: Martí Bolívar <marti.bolivar@oss.qualcomm.com>
 2025-01-23 19:22:13 +01:00
Abderrahmane JARMOUNI
e07896fc9d soc: amd: acp_6_0: Kconfig: fix SOC_TOOLCHAIN_NAME 
Add guard for SOC_TOOLCHAIN_NAME symbol default value

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
 2025-01-23 19:22:00 +01:00
Ivan Pankratov
257d9d45ba kernel: sys_heap: stats: save heap pointers to an array during init 
To request heap statistics, a pointer to a heap structure is required.
This is straightforward for a user-defined heap. However, such a pointer
is not known for heaps created by other components or libraries, like
libc. Therefore, it is not possible to calculate the total heap memory.

The proposed solution is to use an array of pointers, which is filled in
on every sys_heap_init() call. One can then iterate through it to sum up
the total memory allocated for all heaps.

The array size is configurable. The default array size is zero,
which means the feature is disabled. Any other integer greater then zero
defines the array size and enables the feature.

A list of pointers instead of an array could be another approach,
but it requeres a heap, which is not always available.

Signed-off-by: Ivan Pankratov <ivan.pankratov@silabs.com>
 2025-01-23 16:37:33 +01:00
Vaishnav Achath
b8200f29ed MAINTAINERS: Add OMAP and DAVINCI drivers under TI 
TI Platform drivers are named according to coresponding
names in Linux kernel, thus add the legacy drivers (DaVinci,
OMAP) also under TI K3 platforms.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
 2025-01-23 16:34:39 +01:00
Vaishnav Achath
eac0a99e1f dts: arm64: ti: am62x_a53: Add mailbox nodes 
Add TI OMAP interprocessor mailbox nodes for AM62X A53,
the user ID assignment is as per thec corresponding mailbox
interrupt assignment for the core. Also while at it update the
supported feature list in corresponding boards.

More details can be found in the device TRM Mailbox section:
https://www.ti.com/lit/ug/spruiv7a/spruiv7a.pdf

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
 2025-01-23 16:34:39 +01:00
Vaishnav Achath
2480197b66 dts: arm: ti: am62x_m4: Add mailbox nodes 
Add TI OMAP interprocessor mailbox nodes for AM62X M4,
the user ID assignment is as per thec corresponding mailbox
interrupt assignment for the core.

More details can be found in the device TRM Mailbox section:
https://www.ti.com/lit/ug/spruiv7a/spruiv7a.pdf

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
 2025-01-23 16:34:39 +01:00
Vaishnav Achath
fca38adb7f drivers: mbox: Add support for TI OMAP mailbox 
TI OMAP mailbox is the inter-processor mailbox IP found in TI
K3 devices (AM62X, AM64X, J721E .etc). The mailbox hardware uses
a queued mailbox interrupt mechanism that provides a communication
channel between processors through a set of registers and their
associated interrupt signals by sending and receiving messages.
The interrupt/bank associated with each processor entity is found
through the  usr_id property from device tree.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
 2025-01-23 16:34:39 +01:00
Alberto Escolar Piedras
a211999141 doc boards nrfbsim: Update list of supported HW 
The models include enough of the CRACEN to run the same
nrfx drivers as in Zephyr. So let's add it to the list.

Also let's remove the RTC from the list as the hal does not
expose it anymore for this platform as the GRTC is to be used
instead.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
 2025-01-23 16:33:12 +01:00
Robert Lubos
225b587a90 net: pkt: Add API documentation for net_pkt_get_len 
net_pkt_get_len() was commonly used yet not documented, move the
function out of the doxygen-ignored section of the header and add
a doxygen API description for the function so that it's rendered in
the documentation properly.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
 2025-01-23 16:32:49 +01:00
Yong Cong Sin
085df8bd1e arch: remove z_arch_esf_t 
The exception stack frame type `z_arch_esf_t` had been deprecated
since #73593 for 2 releases, it is not used in the kernel since, and
applications/drivers should have been updated to use the
`struct arch_esf` now, remove it.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
 2025-01-23 16:32:36 +01:00
Yong Cong Sin
588ccd9698 arch: remove CONFIG_LEGACY_MULTI_LEVEL_TABLE_GENERATION 
`CONFIG_LEGACY_MULTI_LEVEL_TABLE_GENERATION` had been deprecated since
#66877 for 2 releases, interrupt controller drivers should have been
updated to use the new `IRQ_PARENT_ENTRY_DEFINE()` macro. Remove it.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
 2025-01-23 16:32:36 +01:00
Yong Cong Sin
ecc2b0fb33 arch: arm64: remove CONFIG_ARM64_ENABLE_FRAME_POINTER 
`CONFIG_ARM64_ENABLE_FRAME_POINTER` had been deprecated since #72646
for 2 releases and served not functional effect, it's now time to
say goodbye.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
 2025-01-23 16:32:36 +01:00
Andrzej Głąbek
f930739acf modules: openthread: ble: Update after BT_LE_ADV_CONN got deprecated 
This is a follow-up to commit 8cfad44852.

Replace the deprecated BT_LE_ADV_CONN macro with BT_LE_ADV_CONN_FAST_2.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
 2025-01-23 16:32:10 +01:00
Kalle Kietäväinen
fa9126f5e8 drivers: bluetooth: hci: Increase default RX stack size 
The `BT_DRV_RX_STACK_SIZE` config is used by HCI drivers to determine a
suitable stack size for their RX thread. These threads handle the HCI
transport and pass HCI messages to the Bluetooth host via `bt_hci_recv()`.
Previously, the default stack size was 256 bytes, but it seems to be too
small currently.

Measuring the peak stack usage of `bt_hci_recv()` in different scenarios
indicates that the function needs over 300 bytes of stack. Thus, an RX
thread stack size of 512 should cover that and leave some margin.

Signed-off-by: Kalle Kietäväinen <kalle.kietavainen@silabs.com>
 2025-01-23 16:31:54 +01:00
Robert Lubos
21b71224ac net: ethernet: Remove L2 header stripping after TX 
It seems that this change was solely added to address issues with old
TCP stack, which blindly queued packets intended for TX for potential
further retransmission, expecting that the packet would remain intact
during transmission.

I think this assumption was wrong, as it's natural that lower layers
append respective headers to the packet, and this "header stripping"
behavior was specific for Ethernet L2 only. If an upper layer expects
that the packet would need to be retransmitted at some point, it should
clone it instead.

Therefore, remove the L2 header stripping from the Ethernet L2 to avoid
any potential issues in zero-copy case.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
 2025-01-23 16:31:41 +01:00
Robert Lubos
78c3996b59 net: ethernet: Allow drivers to reserve net_pkt headroom 
Add new Ethernet driver config option,
ETHERNET_CONFIG_TYPE_EXTRA_TX_PKT_HEADROOM, which allows Ethernet
drivers to inform L2 about the extra net_pkt headroom they need to be
allocated.
This is only supported when CONFIG_NET_L2_ETHERNET_RESERVE_HEADER is
enabled, so that it's possible to fit entire packet into a single
net_buf, which is needed for zero-copy transmission.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
 2025-01-23 16:31:41 +01:00
Aksel Skauge Mellbye
e35cb93afa boards: silabs: xg24_dk2601b: Add SPI NOR flash 
Add definition of MX25R SPI flash to device tree.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
 2025-01-23 16:31:28 +01:00
Robert Lubos
ea191bddaf net: pkt: Fix fixed buffer allocation with headroom bug 
The size calculation for the first buffer, in case extra headroom is
requested, had a bug which could result in a size variable underflow
followed by net_buf exhaustion.

In case the net_buf size was larger than requested size, but smaller
than requested size + headroom, the whole buffer size was subtracted
from the requested size. This however did not take the extra headroom
into account and in effect could result in underflow.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
 2025-01-23 16:31:03 +01:00
Aksel Skauge Mellbye
14a00f259f drivers: spi: silabs: eusart: Always enable peripheral 
The EUSART peripheral must always be enabled in configure(), as
its enable state gets cleared when the state machine is unretained
in deep sleep. The rest of the config registers are retained,
so they can continue to not be repainted on every configure() if
the context is the same as last time.

Remove unnecessary duplicated enable at the end of configure(),
the SPIInit HAL function already performs enable.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
 2025-01-23 16:30:47 +01:00
Yishai Jaffe
12240a9058 shell: uart: add write command 
Added a command to write to a uart device.

Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
 2025-01-23 16:30:39 +01:00
Yishai Jaffe
1709731c5c shell: uart: fixed indentation 
Fixed indentation to match line above.

Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
 2025-01-23 16:30:39 +01:00
Marcio Ribeiro
beae6e96f1 boards: esp32xx: fix zephyr,sram 
Fixes the the node value of zephyr,sram for the following boards:
- esp32s2_devkitcc
- esp32s2_saola
- esp32s2_franzininho
- esp32s2_lolin_mini
- ttgo_t7v1_5_esp32

Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
 2025-01-23 16:29:59 +01:00
Sylvio Alves
4456ecc0a3 soc: esp32xx: remove unused kconfig entry 
ESP_HEAP_SEARCH_ALL_REGIONS kconfig entry is not
used and can be totally removed.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
 2025-01-23 13:45:31 +01:00
Jakub Rzeszutko
b0a0febe58 shell: fix unsafe API calls and add configurable autoflush behavior 
Fixes an issue where the shell API could block indefinitely when called
from threads other than the shell's processing thread, especially when
the transport (e.g. USB CDC ACM) was unavailable or inactive.

Replaced `k_mutex_lock` calls with an indefinite timeout (`K_FOREVER`)
by using a fixed timeout (`K_MSEC(SHELL_TX_MTX_TIMEOUT_MS)`) in shell
API functions to prevent indefinite blocking.

Link: https://github.com/zephyrproject-rtos/zephyr/issues/84274

Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@verkada.com>
 2025-01-23 13:45:20 +01:00
Jakub Rzeszutko
8991b954bc shell: add Kconfig option for configurable autoflush behavior 
Introduced a new Kconfig option `SHELL_PRINTF_AUTOFLUSH` to allow
configuring the autoflush behavior of shell printing functions.

Updated `Z_SHELL_FPRINTF_DEFINE` to use the
`CONFIG_SHELL_PRINTF_AUTOFLUSH` setting instead of hardcoding
the autoflush behavior to `true`.

Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@verkada.com>
 2025-01-23 13:45:20 +01:00
Alberto Escolar Piedras
492ad96ee5 manifest: Update nRF hw models to latest enabling cracen HAL 
Update the HW models to the provisional branch zephyr_2025_01_22
which enables the use the not yet released CRACEN RNG & CM HAL
while enabling the latest nrf HAL 3.10

Including the following:
4aac556 Support latest nrf HAL 3.10 / MDK 8.69.1 for 54L15 builds
2e75940 UART: Correct UART names printed out to the users

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
 2025-01-23 10:15:11 +01:00
Håvard Reierstad
e13e893dfc net: buf: revert disallowing blocking in syswq 
Reverts the change made in d4d53010f00cadbb4f89c6d41391937646fc1740
(The changes was moved to another file in a restructuring)

The commit incorrectly assumed that no blocking would be allowed in
the syswq. This has caused issues observed among others
in #77241 and #80167

Signed-off-by: Håvard Reierstad <haavard.reierstad@nordicsemi.no>
 2025-01-23 10:14:59 +01:00
Johan Hedberg
b3c6151679 doc: release: Add notes for Bluetooth ECDH changes 
Mention the removed prompt for BT_ECC in the migration guide, and also add
a note about the removed HCI emulation layer to the release notes.

Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
 2025-01-23 10:14:46 +01:00
Johan Hedberg
d3c8cb4b79 Bluetooth: Host: Remove prompt from BT_ECC 
This option only exposes internal APIs, so there should be no need to allow
applications to set an explicit value. Instead, users of the API should
select it through Kconfig.

Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
 2025-01-23 10:14:46 +01:00
Johan Hedberg
09e86f3b69 Bluetooth: Host: Remove HCI ECC emulation 
Remove the HCI command & event emulation layer for ECDH commands and
events. This means that we always do the necessary operations in the host.
The existing BT_ECC Kconfig option stays, but now gets automatically
enabled when necessary (e.g. based on the BT_SMP option), which is why this
commit removes so many explicit assignments in prj.conf files.

Signed-off-by: Johan Hedberg <johan.hedberg@silabs.com>
 2025-01-23 10:14:46 +01:00
Xudong Zheng
020cb79d27 drivers: serial: nrfx_uarte: move DEPRECATED_UART_NRFX_UARTE_LEGACY_SHIM 
The Kconfig option should be defined alongside
UART_NRFX_UARTE_LEGACY_SHIM for clarity.

Signed-off-by: Xudong Zheng <7pkvm5aw@slicealias.com>
 2025-01-23 08:26:33 +01:00
Xudong Zheng
fac7c86568 drivers: serial: nrfx_uarte: fix deprecation warning when UART is unused 
This hides the deprecation warning when UART_NRFX_UARTE_LEGACY_SHIM is
false because UART is not used.

Signed-off-by: Xudong Zheng <7pkvm5aw@slicealias.com>
 2025-01-23 08:26:33 +01:00
Fabio Baltieri
9d34d5c104 i2c_shell: only include i3c if I3C=y 
Only lookup for i3c devices if I3C=y, fixes a build error:

zephyr/drivers/i2c/i2c_shell.c:
In function 'device_is_i2c':
zephyr/drivers/i2c/i2c_shell.c:341:43:
error: array type has incomplete element type 'struct i3c_driver_api'
341 |         return DEVICE_API_IS(i2c, dev) || DEVICE_API_IS(i3c, dev);

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
 2025-01-23 08:26:21 +01:00
Hao Luo
6694c53fad dts: ambiq: move compatible fields from board dts to dtsi 
compatible fields should be defined in dtsi instead of overlays

Signed-off-by: Hao Luo <hluo@ambiq.com>
 2025-01-23 05:23:54 +01:00
Vinayak Kariappa Chettimada
7573ac521d Bluetooth: Controller: Fix regression in Code PHY S2 Rx to any PHY Tx 
Fix regression in Coded PHY S2 reception to any other PHY Tx
in the s/w switch implementation.

Regression in commit 55b7dba8ec ("Bluetooth: Controller:
Refactor sw_switch hal interface use").

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
 2025-01-23 05:23:39 +01:00
Yassine El Aissaoui
cd361c35be dts: mcxw71: Move smu2 region inside fast peripheral 
SMU2 was using NS address in dts.
Update to use S address.

Signed-off-by: Yassine El Aissaoui <yassine.elaissaoui@nxp.com>
 2025-01-23 05:23:19 +01:00
Alvis Sun
2d465707c9 dts: arm: npcx: add I2C port helper macro 
As title.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
 2025-01-23 05:22:57 +01:00
Yassine El Aissaoui
3bccb227ae boards: nxp: frdm_rw612: Add missing chosen to dtsi 
Add zephyr,flash-controller and zephyr,code-partition
chosen info.

Signed-off-by: Yassine El Aissaoui <yassine.elaissaoui@nxp.com>
 2025-01-23 00:14:23 +01:00
Ederson de Souza
3bbe42f789 tests/subsys/tracing: Async tracing API test fix 
Test `tracing.transport.uart.async.test` was working only due sheer
serendipity: one of the tracing strings checked,
sys_trace_k_mutex_lock_exit, was never being registered on the tracing
buffer. However, the check never got to check this string, so the test
was passing.

Why wasn't it being registered? Tracing buffer size was a bit small for the
flurry of messages - increasing it solves the problem, and is what this
patch does.

Why did the check never got to the missing string? Tracing thread has a
lower priority, so when the k_sleep of test thread expired, it was
preempted. Indeed, if the sleep was changed by any number of ticks, the
test would fail. Even changing order - and thus number - of instructions
executed could make this test fail.

While at it, fixed some typos and an imprecise commentary on code.

Fixes: #84169

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
 2025-01-23 00:13:46 +01:00
Sylvio Alves
3d3217ea6a hci: esp32: remove deprecated symbol 
Make sure HAS_BT_CTLR is used instead
of deprecated BT_CTLR symbol.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
 2025-01-23 00:13:17 +01:00
Chris Friedt
dba7598517 posix: options: shm: use truncation flag that has been added 
Originally, when the POSIX_SHARED_MEMORY_OBJECTS option was
added, the O_TRUNC flag was not consistently available.

Now that it is consistently available, ensure it is used
within the shm_open() function.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
 2025-01-23 00:12:58 +01:00
Chew Zeh Yang
d770a4c584 usbd: device_next: cdc: add option to enable short packet terminate 
For usbser.sys driver, which is the default USB host driver for CDC
devices in windows, it is expected that USB device always indicate
completion of transmission by short packet. In case where the last
packet length is multiple of max packet size of the BULK IN endpoint,
the USB device shall indicate completion of transmission by sending a
zero length packet. This commit adds the sending of the short packet
termination mentioned above, ensuring condition of short packet
terminate is fulfilled.

Signed-off-by: Chew Zeh Yang <zeon.chew@ambiq.com>
 2025-01-23 00:12:24 +01:00
Guennadi Liakhovetski
76e1e1b804 llext: fix Z_GENERIC_SECTION() usage 
Z_GENERIC_SECTION() uses STRINGIFY() to convert its argument to a
string, therefore the argument shouldn't contain additional quotes.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
 2025-01-22 20:50:00 +01:00
Yasin Ustuner
0689d6d7e7 samples: Add MAX78000FTHR sample overlay files 
Enable following sample for MAX78000FTHR:
 - samples/drivers/counter/alarm

Signed-off-by: Yasin Ustuner <Yasin.Ustuner@analog.com>
 2025-01-22 20:47:21 +01:00
Yasin Ustuner
3e218c69a4 tests: Add MAX78000FTHR test overlay files 
Enable the following tests for MAX78000FTHR:

 - tests/drivers/adc/adc_api
 - tests/drivers/counter/counter_basic_api
 - tests/drivers/dma/chan_blen_transfer
 - tests/drivers/dma/loop_transfer
 - tests/drivers/gpio/gpio_basic_api
 - tests/drivers/pwm/pwm_api
 - tests/drivers/spi/spi_loopback
 - tests/drivers/w1/w1_api

Signed-off-by: Yasin Ustuner <Yasin.Ustuner@analog.com>
 2025-01-22 20:47:21 +01:00
Yasin Ustuner
426c586868 boards: adi: Add MAX78000FTHR board 
This commit adds MAX78000FTHR board.

Signed-off-by: Yasin Ustuner <Yasin.Ustuner@analog.com>
 2025-01-22 20:47:21 +01:00
Yasin Ustuner
11e913b65a samples: Add MAX78000EVKIT sample overlay files 
Enable following sample for MAX78000EVKIT:
 - samples/drivers/counter/alarm

Signed-off-by: Yasin Ustuner <Yasin.Ustuner@analog.com>
 2025-01-22 20:47:21 +01:00
Yasin Ustuner
b547986e82 tests: Add MAX78000EVKIT test overlay files 
Enable following tests for MAX78000EVKIT:
 - tests/drivers/adc/adc_api
 - tests/drivers/counter/counter_basic_api
 - tests/drivers/dma/chan_blen_transfer
 - tests/drivers/dma/loop_transfer
 - tests/drivers/gpio/gpio_basic_api
 - tests/drivers/pwm/pwm_api
 - tests/drivers/w1/w1_api

Signed-off-by: Yasin Ustuner <Yasin.Ustuner@analog.com>
 2025-01-22 20:47:21 +01:00
Yasin Ustuner
153fc5ab54 boards: adi: Add MAX78000EVKIT board 
This commit adds MAX78000EVKIT board.

Signed-off-by: Yasin Ustuner <Yasin.Ustuner@analog.com>
 2025-01-22 20:47:21 +01:00
Yasin Ustuner
2c3ae462a2 include: zephyr: dt-bindings: Add MAX78000 DMA binding 
This commit adds binding file for DMA slots.

Signed-off-by: Yasin Ustuner <Yasin.Ustuner@analog.com>
 2025-01-22 20:47:21 +01:00
Yasin Ustuner
d0a95b4083 soc: adi: max32: Add. shared section for MAX7800X SoC 
The SystemCoreClock variable must be placed in the '.shared' section for
the MAX78000 and MAX78002 because the ARM core is responsible for changing
the System Clock and updating the SystemCoreClock variable, and the
RISC-V core knows what the System Clock frequency is through the
shared variable.

Signed-off-by: Yasin Ustuner <Yasin.Ustuner@analog.com>
 2025-01-22 20:47:21 +01:00
Yasin Ustuner
ab278c2419 soc: adi: Add the MAX78000 SoC 
This commit adds MAX78000 SoC
and dts files.

Signed-off-by: Yasin Ustuner <Yasin.Ustuner@analog.com>
 2025-01-22 20:47:21 +01:00
Yasin Ustuner
9030472e4e manifest: Update hal_adi to add MAX78000 SoC 
Add MAX78000 SoC files to the hal_adi repository.

Signed-off-by: Yasin Ustuner <Yasin.Ustuner@analog.com>
 2025-01-22 20:47:21 +01:00
Daniel Leung
32f5ef5892 tests: kernel/msgq_api: join threads after each test 
On SMP systems, threads going through k_thread_abort() may still
be running while the test moves on to the next one. This creates
some interferences and may result in the next test failing. So
after each test, we need to do k_thread_join() on those threads
to make sure they are no longer active.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
 2025-01-22 20:47:05 +01:00
Anas Nashif
7ae2b5033e doc: review: switch labels to a definition list 
Move labels docs from headers to a definition list.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2025-01-22 18:33:06 +01:00
Anas Nashif
22b1e70b08 doc: contribute: split style guidelines into own document 
Move style guidelines into own section and put it along side other
guidelines.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2025-01-22 18:33:06 +01:00
Anas Nashif
09a0bebdd1 doc: contribute: up reviewer expectation one level 
Reviewer expectation was burried under contributor section, it deserves
to be on the same level and highlighted.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2025-01-22 18:33:06 +01:00
Anas Nashif
7676e3602e doc: contribute: remove example sub-header 
Remove one level listing one single example.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2025-01-22 18:33:06 +01:00
Anas Nashif
4c3bd250b2 doc: contribute: move prerequisites section up 
Move prerequisites section to the top of the page.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2025-01-22 18:33:06 +01:00
Anas Nashif
831a0184d6 doc: contrib: move section about modifying patches 
Move section about modifying changes to the contribution section where
it belongs.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2025-01-22 18:33:06 +01:00
Anas Nashif
cc21c72392 doc: contrib: dco: remove git tip listed as requirements 
Some of the git tips in this sections do not count as 'requirements'.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2025-01-22 18:33:06 +01:00
Anas Nashif
fdcfc262d3 doc: remove note about cherry-picking commits from PRs 
The text in this note is not accurate and should already be covered by
the license agreement, no need to say what the license already covers in
non-legal terms.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2025-01-22 18:33:06 +01:00
Anas Nashif
8c20225c80 doc: contrib: move contrib badge info to roles page 
Move this to the project role page where the contributor role is listed
and described.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2025-01-22 18:33:06 +01:00
Anas Nashif
4cecaf094f doc: contribute: match order of toc 
Just match the same order the sections appear in.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2025-01-22 18:33:06 +01:00
Aleksandr Khromykh
f9830452e5 doc: update migration guide with mesh dependency 
Commit adds description of the mesh dependency on
the secure storage subsytem.

Signed-off-by: Aleksandr Khromykh <aleksandr.khromykh@nordicsemi.no>
 2025-01-22 18:32:51 +01:00
Aleksandr Khromykh
a8e540c371 Bluetooth: Mesh: remove experimental flag from mbedtls support 
Commit removes experimental flag from mbedtls psa
crypto library support.

Signed-off-by: Aleksandr Khromykh <aleksandr.khromykh@nordicsemi.no>
 2025-01-22 18:32:51 +01:00
Alberto Escolar Piedras
d961258788 tests: bsim: cap_broadcast_reception: Workaround time dependent issue 
This test is overly sensitive to the relative timing of the devices
and/or their random number generation.
Due to this the test failed with its current setup when chanding the
random generation for the nrf54.
Let's work around it by offsetting a bit one of the devices.
This is a provisional workaround until the underlying issue is
addressed.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
 2025-01-22 18:32:35 +01:00
Alberto Escolar Piedras
196062580f Bluetooth: Controller: Use cracen entropy driver for 54L devices 
Use the new entropy driver for 54L devices and therefore
claim BT_CTLR_ENTROPY_SUPPORT is always supported
(note 54H remains unsuported)

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
 2025-01-22 18:32:35 +01:00
Alberto Escolar Piedras
2f33aae8cd soc: nordic: nrf54L: Switch default entropy driver to new CRACEN one 
Switch the default entropy driver for 54L05/10/15 devices to the new
CRACEN based one.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
 2025-01-22 18:32:35 +01:00
Alberto Escolar Piedras
f4cdb0f07e boards nrf54l15bsim: Default to new cracen rng driver 
Let's default to this new driver.
And therefore change the conditions in the BT controller kconfig
which were selecting the native_posix fake entropy driver

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
 2025-01-22 18:32:35 +01:00
Alberto Escolar Piedras
b151cd6bc7 drivers: entropy: Add new driver based on nrf54l cracen driver 
Add a new entropy driver based on the nrf HAL CRACEN CTR DRBG driver

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
 2025-01-22 18:32:35 +01:00
Alberto Escolar Piedras
4b56c74e1c modules: hal_nordic: Support new CRACEN CTR DRBG driver 
Add support for the new nrf hal CRACEN CTR DRBG driver including a new
kconfig option to enable it.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
 2025-01-22 18:32:35 +01:00
Alberto Escolar Piedras
ec17cc0fa6 manifest: Update nRF hw models to enable cracen HAL 
Update the HW models to the provisional branch zephyr_2025_01_14
which enables the use the not yet released CRACEN RNG & CM HAL

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
 2025-01-22 18:32:35 +01:00
Alberto Escolar Piedras
a2d202f440 manifest: Update nRF hw models to latest 
Update the HW models module to:
1069743a7fc06362e8f8d7f57225b8c7940da9f0

Including the following:
1069743 Fix in cracen hal conditional compile condition
3bbd3bd Enable build of hal/nrf_cracen_*.c
506da1f hal cracen_cm: Add const to prototype
b02d927 BLECrypt_if: For new aes_ecb scramble data if no libCrypto
e41f101 RRAMC nrf hal: Add replacements for new incoming RRAM APIs
4e933cf UART: Do not warn on invalid/unconfigured framesize
716b20c hal cracen_cm: Add replacements for new cracen_cm hal
fc597a4 CRACEN: Add CryptoMaster & CM AES (ECB only)
129f16c CRACEN RNG HAL: Remove senseless static inline

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
 2025-01-22 18:32:35 +01:00
Alberto Escolar Piedras
2a95e2291f manifest: Update hal_nordic with new cracen hal and rng driver 
Update with the latest nordic hal

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
 2025-01-22 18:32:35 +01:00
Ali Hozhabri
e4389a2921 soc: st: stm32wb0x: Increase main stack size for BLE applications 
Increase the size of the main stack for BLE applications to avoid
stack overflow on STM32WB0x series. Beacon sample was considered as
a reference for the size increase.

Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
 2025-01-22 15:50:41 +01:00
Martin Hoff
576e475558 driver: serial: silabs: Change PM Device definition order 
Change the definition order of the PM Device to fix the build error.

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
 2025-01-22 15:50:14 +01:00
Eve Redero
f683b188b3 drivers: display: ssd1306: add power pin support 
Add a power pin toggling feature in ssd1306 driver

Signed-off-by: Eve Redero <eve.redero@gmail.com>
 2025-01-22 15:50:02 +01:00
Fredrik Danebjer
21b5f0c4fe Bluetooth: pacs: Add dynamic PACS registration 
Added option to set the PACS Characteristics through the bap API,
making PACS configuration runtime available. Source and Sink PAC, as
well as Source/Sink PAC Location is can be set through a register
function in the PACS api.

Signed-off-by: Fredrik Danebjer <frdn@demant.com>
 2025-01-22 15:49:50 +01:00
Wenbin Zhang
7d4e31a1f0 devicetree: Fix Device tree tests cannot be built with coverage enabled 
DT_SPEC related macro tests (ADC_DT_SPEC_GET_BY_NAME, MBOX_DT_SPEC_GET)
should not appear in this test because the configuration does not turn
on any devices

Move DP_SPEC-related tests to api_ext and enable the related device in the
configuration

fix #77205

Signed-off-by: Wenbin Zhang <freey7955@gmail.com>
 2025-01-22 15:49:25 +01:00
Luca Burelli
b0dbbb7782 device: add CONFIG_LLEXT_EXPORT_DEV_IDS_BY_HASH option 
This new option allows to export devices using identifiers generated
from the hash of the devicetree node path, instead of the device's
ordinal number. Identifiers generated this way are stable across
rebuilds.

Add new test cases to test this new option.

Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
 2025-01-22 15:49:10 +01:00
Luca Burelli
1bb939a836 llext: add custom name variant to symbol export macros 
Add a new set of macros that allow customizing the symbol name when
exporting symbols. This is useful when the symbol name that extensions
need to look up is different from the identifier used in the base image.

Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
 2025-01-22 15:49:10 +01:00
Luca Burelli
16d71d0598 edtlib: add "hash" attribute to nodes 
Add a new "hash" attribute to all Devicetree EDT nodes. The hash is
calculated on the full path of the node; this means that its value
remains stable across rebuilds.
The hash is checked for uniqueness among nodes in the same EDT.

This computed token is then added to `devicetree_generated.h` and made
accessible to Zephyr code via a new DT_NODE_HASH(node_id) macro.

Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
 2025-01-22 15:49:10 +01:00
Matt Rodgers
d1d85fa40b net: http_server: fix URL matching with '?' character in resource 
Fixes #84198.

If a '?' character is used as part of a wildcard resource, do not treat
this as the end of the string when comparing with a path from the HTTP
request. Only the path from the HTTP request may be terminated by '?'
(in the case of a request with query parameters).

Signed-off-by: Matt Rodgers <mrodgers@witekio.com>
 2025-01-22 13:44:01 +01:00
Georgios Vasilakis
8ef1b348c2 tests: arm_irq_vector_table: Disable bellboard for nRF54/nRF92 
This test uses the bellboard interrupts for the application
and the radio core builds on nRF54H20 and nRF9280.
Since it uses the bellboard interrupts it makes sense to ensure
that bellboard is disabled in device tree to avoid runtime issues.

This is preparation work, bellboard is planned to be enabled
by default later and this makes sure that the test will
continue to work.

Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
 2025-01-22 13:43:47 +01:00
Maciej Kusio
ddff91fef6 arch: Changes MPU alignment to 128 when FPU_SHARING and MPU_STACK_GUARD 
With our builds for Arm M7 we are selecting FPU_SHARING and
MPU_STACK_GUARD. For that setup, we have
ARM_MPU_REGION_MIN_ALIGN_AND_SIZE=64 and
MPU_STACK_GUARD_MIN_SIZE_FLOAT=128. So worst case scenario,
we are going to have stack that is 64-byte aligned and
128-byte guard at the bottom of the buffer.

Fixes: #83714

Signed-off-by: Maciej Kusio <rysiof@gmail.com>
 2025-01-22 10:48:02 +01:00
Jukka Rissanen
748881066f tests: net: vlan: Add VLAN tag 0 test 
Make sure we are able to receive VLAN tag 0 packet, and
verify that reply packet is sent correctly.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
 2025-01-22 10:47:52 +01:00
Jukka Rissanen
594fa24199 net: ethernet: Properly handle VLAN tag 0 
Packets are forwarded to the native interface or in other words,
the vlan header is simply stripped and ignored. This feature is called
'priority tagging'.

Signed-off-by: Cla Mattia Galliard <cla-mattia.galliard@zuehlke.com>
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
 2025-01-22 10:47:52 +01:00
Pieter De Gendt
638a696b7b tests: linker: iterable_sections: Test sorting with 5 numeric characters 
Update the iterable numeric RAM/ROM tests to include a numeric value with
5 numeric characters.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
 2025-01-22 10:40:45 +01:00
Pieter De Gendt
ab26ecce6e linker: iterable_section: Allow numeric sorting up to 5 numeric characters 
This allows using a uint16_t value to sort iterable sections.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
 2025-01-22 10:40:45 +01:00
Timothy Keys
614f55f8be ipc: ipc_service: Null terminate RPMsg endpoint names 
This fixes the compiler warning -Wstringop-truncation in
version 13 of gcc.

Signed-off-by: Timothy Keys <timothy.keys@nordicsemi.no>
 2025-01-22 10:40:27 +01:00
Alberto Escolar Piedras
0c32349722 Bluetooth: Controller: Correct nrf54l15bsim timings 
Correct the timings in the radio HAL for the simulated nRF54L15

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
 2025-01-22 10:40:17 +01:00
Jukka Rissanen
18cd2d83be net: pkt: Alloc headroom also for variable size data buffers 
The headroom was not taken into account for variable size data
buffers when CONFIG_NET_L2_ETHERNET_RESERVE_HEADER was enabled.

Add a test case for it to make sure the reserve allocation works
properly.

Fixes #84053

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
 2025-01-22 10:39:23 +01:00
Krzysztof Chruściński
62517f90dd tests: drivers: uart: uart_mix_fifo_poll: Clean up testcase.yaml 
Clean up after automatic merge. Some test configurations got removed
and multiple lines enabling test for nrf54l09pdk/nrf54l09/cpuapp
target remained at the bottom of the file.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
 2025-01-22 10:39:08 +01:00
Krzysztof Chruściński
cc12f655c9 tests: drivers: uart: uart_mix_fifo_poll: Enable device PM 
uart120 requires device runtime to be enable. Enable it for nrf54h20dk.

When device runtime PM is used for interrupt driven and polling API
then UART device is initially suspended. It means that RX is disabled.
In order to enable RX device must be explicitly resumed using PM API.

Test is enabling UART RX (uart_rx_enable) from counter callback
(interrupt handler context). For fast instance on nrf54h20dk (uart120)
it is not allowed because PM resume can only be called from the thread
context. Because of that, test is skipped for uart120 and asynchronous
API.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
 2025-01-22 10:39:08 +01:00
Krzysztof Chruściński
1ee434a6c2 tests: drivers: uart: uart_mix_fifo_poll: Move counter handling 
Move enabling of counter to the test instead of test setup. Test may be
skipped in some configurations and in that case counter shall not be
started so by moving setup to the test code allows skipping test before
counter is started.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
 2025-01-22 10:39:08 +01:00
Chris Friedt
c057f91eb5 arch: x86: add missing semicolon for z_x86_kpti_is_access_ok() 
The function prototype / extern declaration for
z_x86_kpti_is_access_ok() in x86_mmu.h was missing a semicolon.

Add it to avoid being surprised by compile errors in certain
circumstances.

Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
 2025-01-22 08:08:40 +01:00
Tomislav Milkovic
fb98387f4d drivers: can: can_tcan4x5x: fix compiler build warning/error 
Fix compiler warning when optional property reset-gpios
is not supplied in the ti,tcan4x5x-compatible device tree
node

Signed-off-by: Tomislav Milkovic <tomislav.milkovic95@gmail.com>
 2025-01-22 08:08:24 +01:00
Rick Cai
8cacbe693d samples: subsys: shell: shell_module: Incorrect help message of sub_cmd1 
Change sub_cmd1 help message from "help for cmd2" to "help for sub_cmd1".

Signed-off-by: Rick Cai <wwhheerree@hotmail.com>
 2025-01-22 08:08:12 +01:00
James Roy
7eddf8d8a3 doc: Add a new migration guide entry to DAC 
Rename the voltage_reference and power_down_mode
properties to voltage-reference and power-down-mode
in the devicetree and bindings of the DAC subsystem.

Signed-off-by: James Roy <rruuaanng@outlook.com>
 2025-01-22 08:07:55 +01:00
James Roy
e607d73a3e dts: bindings: dac: Change the property names in the overlay 
Change the property names in the bindings and overlay
to use hyphens(-) for separation instead of underscores(_).

Signed-off-by: James Roy <rruuaanng@outlook.com>
 2025-01-22 08:07:55 +01:00
Mathieu Choplain
26b00580cc tests: entropy: api: add overlay for Nucleo-WB07CC 
Add overlay to allow testing of TRNG on STM32WB07.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
 2025-01-22 08:07:40 +01:00
Mathieu Choplain
d592a8cea7 tests: entropy: api: add overlay for Nucleo-WB09KE 
Add overlay to allow testing of RNG driver on STM32WB0 hardware.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
 2025-01-22 08:07:40 +01:00
Mathieu Choplain
8397d640d2 drivers: entropy: stm32: add support for STM32WB09 TRNG 
Add support for the STM32WB09-specific TRNG IP in STM32 entropy driver.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
 2025-01-22 08:07:40 +01:00
Mathieu Choplain
97c8e5b18f tests: entropy: api: add overlay for Nucleo-WB05KZ 
Add overlay to allow testing of RNG driver on STM32WB0 hardware.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
 2025-01-22 08:07:40 +01:00
Mathieu Choplain
2347932431 drivers: entropy: stm32: add support for TRNG without interrupt line 
Add support for TRNG peripherals that lack interrupt lines in the STM32
entropy driver.

This enables usage of the TRNG of STM32WB05/06/07 SoCs with the driver.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
 2025-01-22 08:07:40 +01:00
Mathieu Choplain
77aeaa8ab7 dts: arm: st: wb0: add TRNG node 
Add Device Tree nodes corresponding to TRNG of STM32WB0 series SoCs.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
 2025-01-22 08:07:40 +01:00
Mathieu Choplain
1afc04441a dts: bindings: rng: add STM32 binding for IRQ-less RNG 
Add a new binding for STM32 RNG instances without interrupt lines,
such as the one present in the STM32WB05/06/07 SoCs.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
 2025-01-22 08:07:40 +01:00
Jacob Wienecke
7f08b54d8b samples: net: zperf: Add correct .conf file name for mimxrt1060_evk 
Change the name of the mimxrt1060_evk conf file (mimxrt1060_evk.conf) to
the correct name, "mimxrt1060_evk_mimxrt1062_qspi.conf". This change
causes net related code to be placed into ITCM on mimxrt1060_evk boards

Signed-off-by: Jacob Wienecke <jacob.wienecke@nxp.com>
 2025-01-22 05:41:33 +01:00
Ofir Shemesh
a6f2112894 dts: nxp: rt1060: correct PTP clock reference in enet2 
The enet2 node in nxp_rt1060.dtsi incorrectly references &enet_ptp_clock
for its nxp,ptp-clock property. This commit updates the reference to
&enet2_ptp_clock.

Signed-off-by: Ofir Shemesh <ofirshemesh777@gmail.com>
 2025-01-22 05:41:22 +01:00
Jordan Yates
1b0fe8f60a west.yml: update nrf_wifi to ignore binary blobs 
Update the `nrf_wifi` repository so that git ignores binary blobs
fetched by `west blobs fetch nrf_wifi`.

Signed-off-by: Jordan Yates <jordan@embeint.com>
 2025-01-22 05:41:09 +01:00
Bas van Loon
e1ba85e9a2 drivers: ethernet: Fix DSA tag size for KSZ8863. 
Allow DSA_TAG_SIZE to be set based on the size determined by Kconfig
and the enabled switch hardware.

This fixes support for the KSZ8863 which also has a tail tag of
one byte.

Signed-off-by: Bas van Loon <s.r.vanloon@ziggo.nl>
 2025-01-22 05:40:58 +01:00
Pisit Sawangvonganan
30aa72020d dts: arm: nxp: s32: add #address-cells to interrupt provider 
Add `#address-cells = <0>;` to interrupt provider nodes in
the NXP S32 device tree to resolve warnings: e.g.
Warning (interrupt_provider): /soc/interrupt-controller@47800000: Missing
Warning (interrupt_provider): /soc/siul2@40520000/eirq0@40520010: Missing

This ensures compliance with device tree specifications and
eliminates build warnings.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
 2025-01-22 05:40:48 +01:00
PENNORS Thomas
5165c911c9 Bluetooth: fix old-style warning gcc 
fix GCC warning old-style-declaration on bluetooth host/att.c

Signed-off-by: PENNORS Thomas <t.pennors@lacroix.group>
 2025-01-22 05:40:36 +01:00
Rahul Arasikere
dd0a5a76bc boards: esp32s3_touch_lcd_1_28: Fix default flash partition 
The default partition file included in the board definition is for 4MB
flash. However, this board has 16MB flash.

Signed-off-by: Rahul Arasikere <arasikere.rahul@gmail.com>
 2025-01-22 05:40:24 +01:00
Fabio Baltieri
0bc123da11 drivers: drop few redundant device_is_ready 
Drop few redundant device_is_ready for functions that are only used as
argument to shell_device_filter, as shell_device_filter checks for that
alrady.

Suggested-by: Yishai Jaffe <yishai1999@gmail.com>
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
 2025-01-22 05:40:11 +01:00
Fabio Baltieri
11b5e1f8f5 dac_shell: add device filtering 
Add shell device name filtering using DEVICE_API_IS.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
 2025-01-22 05:40:11 +01:00
Fabio Baltieri
f3dac37f8a regulator_shell: add device filtering 
Add shell device name filtering using DEVICE_API_IS.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
 2025-01-22 05:40:11 +01:00
Fabio Baltieri
0b2648ff40 i2c_shell: add device filtering 
Add shell device name filtering using DEVICE_API_IS.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
 2025-01-22 05:40:11 +01:00
Camille BAUD
14fa2873b5 drivers: timer: run clang-format on RISC-V machine timer file 
Clang-Format changes whitespacing and longer lines are now allowed

Signed-off-by: Camille BAUD <mail@massdriver.space>
 2025-01-22 05:39:59 +01:00
Camille BAUD
f11f68eade drivers: timer: Harmonize mtime-based RISC-V timers 
This commit replaces a bunch of ifdefs and bindings with a single
extensible binding, and makes all standard mtime system timers consistent.

Signed-off-by: Camille BAUD <mail@massdriver.space>
 2025-01-22 05:39:59 +01:00
Camille BAUD
bf45c496bb drivers: timer: Remove unused divider setter in RISC-V machine timer 
This removes a unused function for a unused binding,
and is prelude to a refactoring

Signed-off-by: Camille BAUD <mail@massdriver.space>
 2025-01-22 05:39:59 +01:00
Andrej Butok
970204227f boards: frdm_mcxn947: fix mcuboot partitions 
Fixes frdm_mcxn947 MCUBoot partitions
that were broken by d8ab81329e

Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
 2025-01-22 05:39:37 +01:00
Emilio Benavente
d4bfe3b507 boards: nxp: frdm_mcxw71: Enable MCXW71 I2C Loopback 
Enable and test I2C loopback with i2c_target_api

Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
 2025-01-22 05:39:22 +01:00
Marcio Ribeiro
4551f3410d drivers: display: ssd1306: add support to ssd1309 
SSD1309 support added to SSD1306 display driver

Signed-off-by: Marcio Ribeiro <wmrsouza@hotmail.com>
 2025-01-22 05:39:10 +01:00
Nicolas Pitre
f93c1ed291 kernel/pipe: squash compiler warning 
The compiler complains that:

```
zephyr/kernel/include/kernel_internal.h:121:29:
error: 'reader' may be used uninitialized [-Werror=maybe-uninitialized]
  121 |         thread->swap_retval = value;
      |         ~~~~~~~~~~~~~~~~~~~~^~~~~~~
zephyr/kernel/pipe.c: In function 'copy_to_pending_readers':
zephyr/kernel/pipe.c:92:26: note: 'reader' was declared here
   92 |         struct k_thread *reader;
      |                          ^~~~~~
```

The static analyzer fails to see through the `LOCK_SCHED_SPINLOCK`
construct that the `reader` pointer is always initialized.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
 2025-01-22 05:39:01 +01:00
Nicolas Pitre
0c0644bd68 kernel/pipe: disable direct-to-readers copy with CONFIG_KERNEL_COHERENCE 
Systems that enabled this option don't have their stacks in coherent
memory. Given our pipe_buf_spec is stored on the stack, and readers may
also have their destination buffer on their stack too, it is not worth
going to the trouble of supporting direct-to-readers copy with them.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
 2025-01-21 19:44:57 +01:00
Nicolas Pitre
3da90f9d49 kernel/pipe: add missing calls to z_reschedule() 
We are waking up threads but failed to let them run if they are
higher priority. Add missing calls to z_reschedule().

Also wake up all pending writers as we don't know how many there might
be. It is more efficient to wake them all when the ring buffer is full
before reading from it rather than waking them one by one whenever there is
more room in it.

Thanks to Peter Mitsis for noticing those issues.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
 2025-01-21 19:44:57 +01:00
Nicolas Pitre
99c2057bb6 tests: app_kernel: restore the PIPE_NOBUFF variant 
... now that the new pipe implementation supports it.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
 2025-01-21 19:44:57 +01:00
Nicolas Pitre
29ae9e3435 kernel/pipe: implement direct-to-pending-readers data copy 
If there are pending readers, it is best to perform a single data copy
directly into their final destination buffer rather than doing one copy
into the ring buffer just to immediately copy the same data out of it.

Incidentally, this allows for supporting pipes with no ring buffer at all.

The pipe implementation being deprecated has a similar capability so better
have it here too.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
 2025-01-21 19:44:57 +01:00
Nicolas Pitre
4af80d72bc kernel/pipe: remove extra hardware timer query on thread wakeup 
Dispense with the call to sys_timepoint_expired() by leveraging
swap_retval to distinguish between notifications and timeouts when
z_pend_curr() returns.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
 2025-01-21 19:44:57 +01:00
Nicolas Pitre
46617644e7 kernel/pipe: code flow cleanup 
Simplify the logic, avoid repeated conditionals, avoid superfluous
scheduler calls, make the code more efficient and easier to read.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
 2025-01-21 19:44:57 +01:00
David Brown
19a376aa88 kernel: poll: Allow 0 events for submitted work 
Change:
    commit cc6317d7ac
    Author: Jukka Rissanen <jukka.rissanen@linux.intel.com>
    Date:   Fri Nov 1 14:03:32 2019 +0200

        kernel: poll: Allow 0 event input

Allows `k_poll` to be user with 0 events, which is useful for allowing just
a sleep without having to create artificial events.

Allow the same for `k_work_submit_to_queue()` and `k_work_submit()`.

Signed-off-by: David Brown <david.brown@linaro.org>
 2025-01-21 19:44:07 +01:00
Jilay Pandya
1b392779d7 docs: migration_guide_4_1: migration guide entry for renamed properties 
add migration guide for following renamed variables
 - ``en_spreadcycle`` to ``en-spreadcycle``
- ``i_scale_analog`` to ``i-scale-analog``
- ``index_optw``to ``index-otpw```
- ``ìndex_step`` to ``index-step``
- ``internal_rsense`` to ``internal-rsense``
- ``lock_gconf`` to ``lock-gconf``
- ``mstep_reg_select`` to ``mstep-reg-select``
- ``pdn_disable`` to ``pdn-disable``
- ``poscmp_enable`` to ``poscmp-enable``
- ``test_mode`` to ``test-mode``

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
 2025-01-21 19:37:47 +01:00
Jilay Pandya
dfdbc77787 dts: bindings: stepper: use hyphens instead of underscore 
This commit replaces hyphens with underscore in order to comply with
devicetree standards

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
 2025-01-21 19:37:47 +01:00
Tomas Galbicka
49c6725750 soc: Enable reset hook for mcxn236 
This commit selects reset hook for mcxn236 in Kconfig.

This fixes the issue #84213.

Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
 2025-01-21 19:31:02 +01:00
Paul Wedeck
fda64760ba drivers: uart_wch: Fix compiler warning 
This commit removes an unused variable.

Signed-off-by: Paul Wedeck <paulwedeck@gmail.com>
 2025-01-21 19:30:53 +01:00
Vinayak Kariappa Chettimada
f3e398d64c Bluetooth: Controller: Fix uninitialized is_aborted in conn done event 
Fix uninitialized is_aborted in connection done event.

Relates to commit cadef5a64f ("Bluetooth: Controller:
Introduce BT_CTLR_PERIPHERAL_RESERVE_MAX").

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
 2025-01-21 19:30:41 +01:00
Shawn Nematbakhsh
c8e9da2615 soc: lowrisc: opentitan: Fix manifest sizing 
The actual manifest is 1024 bytes, but we previously had padding bytes
due to the implementation of SECTION_FUNC(). The manifest is not
executable code so SECTION_VAR() is appropriate and produces a section of
the appropriate size.

Fixes: #82822

Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
 2025-01-21 19:30:30 +01:00
Brandon Allen
e0173d9b8e zbus: assert when inside an ISR and time out is not zero 
Currently various zbus functions silently change the timeout
to zero  when inside an ISR. If a developer is not aware
of this it could lead to unexpected behaviour or a
publish/read failing.

Also in the zbus docs it states to only use a timeout of
zero when inside a ISR multiple times.

Signed-off-by: Brandon Allen <brandon.allen@exacttechnology.com>
 2025-01-21 19:30:20 +01:00
Robert Lubos
64e5a31b61 net: coap: Fix coap_packet_is_request() check for empty code 
Empty code was incorrectly matched as a request, fix that.

Align coap_handle_request_len() function to behave as documented in the
API documentation - in case of invalid request code (which is also the
case for empty code) -ENOTSUP Should be returned.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
 2025-01-21 19:30:06 +01:00
Robert Lubos
13cd48a431 net: coap: Fix response matching algorithm 
The algorithm for matching request with response was incorrect, which
could lead to false matches (for example if request had a token, and
piggybacked reply had no token but matching message ID only, that would
still be counted as a match).

This commit fixes it. The request/reply matching is implemented based on
RFC now, with separate conditions for piggybacked/separate responses.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
 2025-01-21 19:30:06 +01:00
Robert Lubos
3e1efedac1 tests: net: coap: Add test case for matching pending replies 
Add test case for matching pending replies with received responses.
Cover corner cases that are failing with the current implementation.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
 2025-01-21 19:30:06 +01:00
Jukka Rissanen
ab9b85b199 net: Build assert issue with llvm 
Remove the build assert from NET_L3_REGISTER() macro as that
is causing an issue with llvm. Add runtime check of the handler
pointer value.

subsys/net/l2/ethernet/arp.c:1044:1: error: static_assert expression
is not an integral constant expression

ETH_NET_L3_REGISTER(ARP, NET_ETH_PTYPE_ARP, arp_recv);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/zephyr/net/ethernet.h:1272:2: note: expanded from
macro 'ETH_NET_L3_REGISTER'
        NET_L3_REGISTER(&NET_L2_GET_NAME(ETHERNET), name, ptype, handler)
        ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/zephyr/net/net_core.h:190:2: note: expanded from
macro 'NET_L3_REGISTER'
        BUILD_ASSERT((_handler) != NULL, "Handler is not defined")
        ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/zephyr/toolchain/gcc.h:87:51: note: expanded from
macro 'BUILD_ASSERT'
define BUILD_ASSERT(EXPR, MSG...) _Static_assert((EXPR), "" MSG)
                                                  ^~~~~~
subsys/net/l2/ethernet/arp.c:1044:1: note: cast from 'void *' is not
allowed in a constant expression
include/zephyr/net/ethernet.h:1272:2: note: expanded from
macro 'ETH_NET_L3_REGISTER'
        NET_L3_REGISTER(&NET_L2_GET_NAME(ETHERNET), name, ptype, handler)
        ^
include/zephyr/net/net_core.h:190:29: note: expanded from
macro 'NET_L3_REGISTER'
        BUILD_ASSERT((_handler) != NULL, "Handler is not defined")
                                   ^
/usr/lib/llvm-14/lib/clang/14.0.0/include/stddef.h:89:16: note: expanded
from macro 'NULL'
  define NULL ((void*)0)

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
 2025-01-21 19:29:55 +01:00
Jukka Rissanen
04205ae24f net: Set the protocol type of fragmented packet 
The fragmented packet should inherit the protocol type of the
original packet.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
 2025-01-21 19:29:55 +01:00
Jukka Rissanen
3e680551b6 net: ipv6: Do not set ptype when preparing for sending 
Trust that the protocol type is set correctly by functions
called before this one. We should not set the protocol type
blindly in this generic function.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
 2025-01-21 19:29:55 +01:00
Jukka Rissanen
30ad29c2a3 net: ipv4: Do not change the protocol type when sending 
The ARP code has set the protocol type of the packet to
0x806, so do not change it when preparing to send to 0x800
which is the IP protocol type. Lets trust the previously
called functions to set the ptype correctly and do not set
it here.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
 2025-01-21 19:29:55 +01:00
Jukka Rissanen
81938f4c82 tests: net: arp: Remove the ARP cache clear from the tests 
It was incorrectly introduced earlier and not really needed
because the test will pass without it.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
 2025-01-21 19:29:55 +01:00
Jukka Rissanen
4a796913cc net: arp: Enhance debug messages 
Print more data / debug information for ARP messages.
Also remove unnecessary "&" when printing IPv4 address.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
 2025-01-21 19:29:55 +01:00
Jukka Rissanen
ed582c1374 net: ethernet: Only try ARP for IP packets 
The work in Ethernet send in commit 2f10d7d816
("net: ethernet: Set the ptype by the caller in send")
introduced a bug because we could try to do ARP resolving
for ARP packets too. This is clearly a wrong thing to do.
So before trying to do ARP resolving, make sure the the
packet type is IP packet.

Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
 2025-01-21 19:29:55 +01:00
Vinayak Kariappa Chettimada
e09d629024 Bluetooth: Controller: Fix reset of drift_skip count 
Fix reset of drift_skip count when an anchor point sync was
missed so that drift compensation is applied on the next
successful anchor point sync. This will improve connection
stability for short overlapping radio event intervals.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
 2025-01-21 19:29:45 +01:00
Carlo Kirchmeier
6d35071227 drivers: disk: sdmmc_subsys: stm32_sdmmc driver custom disk name support 
In order to allow a custom disk name same as with the standard
sdmmc driver an additional device-tree property was introduced.

Signed-off-by: Carlo Kirchmeier <carlo.kirchmeier@zuehlke.com>
 2025-01-21 19:29:36 +01:00
Martin Hoff
2f5f39fa37 dts: arm: change usart binding of silabs series 2 boards 
Make the Silabs series 2 boards use the new USART driver
"silabs,usart-uart".

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
 2025-01-21 19:29:25 +01:00
Martin Hoff
1318f1543c driver: serial: split silabs series 2 and series 0/1 boards usart driver 
Split the USART driver into separate implementations for Silabs Series 2
and Series 0/1 boards. This change improves maintainability (especially
with the support of pin-ctrl and clock-ctrl on series 2 boards).

Signed-off-by: Martin Hoff <martin.hoff@silabs.com>
 2025-01-21 19:29:25 +01:00
Sven Ginka
12c98694c0 board: ganymed_bob_sy120: add uart pinctrl 
Add pin definitions for the available uarts
for the ganymed_bob_sy120 boards.

Signed-off-by: Sven Ginka <s.ginka@sensry.de>
 2025-01-21 19:29:14 +01:00
Sven Ginka
a89b81b110 drivers: serial: sy1xx add support for pinctrl 
Add pin ctrl to the serial driver.

Signed-off-by: Sven Ginka <s.ginka@sensry.de>
 2025-01-21 19:29:14 +01:00
Fabrice DJIATSA
2931ad70de samples: boards: st: uart: circular_dma: update circular dma sample 
Add the nucleo_wba55cg board, which implements continuous transfer
with GPDMA and a linked list.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
 2025-01-21 19:29:03 +01:00
Fabrice DJIATSA
7b379f47fa drivers: dma: add linked list in dmau5 driver 
- Init linked list node and structure
- configure source and destination address
- Setting gpdma request mode
- Configure linked list node and structure for
continous transfer, enable half transfert irq.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
co-authored-by: Lubos Koudelka <lubos.koudelka@st.com>
 2025-01-21 19:29:03 +01:00
Fabrice DJIATSA
ed92eeb3c8 drivers: dma: cyclic dma handling 
keeping the stream busy when cyclic DMA is used.

Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
 2025-01-21 19:29:03 +01:00
Stephan Gatzka
bda1970b33 modbus: initialize return variable. 
Currently, when disabling CONFIG_MODBUS_FP_EXTENSIONS,return variable
'err'  is not initialized (at least not for debug builds) but later on
checked.

Signed-off-by: Stephan Gatzka <stephan.gatzka@gmail.com>
 2025-01-21 19:28:52 +01:00
Stephan Gatzka
3936470973 modbus: serial: check return value of uart_irq_callback_user_data_set 
uart_irq_callback_user_data_set return non-zero if the callback function
can't be set. This might happen if you forgot to enable
CONFIG_UART_INTERRUPT_DRIVEN.

Signed-off-by: Stephan Gatzka <stephan.gatzka@gmail.com>
 2025-01-21 19:28:52 +01:00
Flavio Felder
f953b0d3a1 docs: samples: subsys: lorawan: class_a: update README 
Updated the README for the LoRaWAN Class A example to explain limitations
when running multiple times. Provided guidance to resolve the issue.

Signed-off-by: Flavio Felder <felf@zhaw.ch>
 2025-01-21 19:28:36 +01:00
Andrej Butok
31c299e5b7 boards: mimxrt1180_evk: set LinkServer as the default runner 
Sets LinkServer as the default runner for the mimxrt1180-evk board,
as the board is configured for CMSIS-DAP by default.

Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
 2025-01-21 19:28:25 +01:00
Tomasz Moń
45ee2a0b0d drivers: udc_dwc2: Fix multipart DMA OUT transfers 
DMA transfers are supposed to write to buffer tail. Use the proper
pointer to make multipart DMA transfers actually write the data to the
intended location.

The issue was observed on control write transfers where the OUT Data
Stage was at least 128 bytes (because endpoint 0 transfer width is
limited to 7 bits).

The issue is unlikely to happen on non-control transfers because the
transfer size width is at least 11 bits (at most 19 bits) and packet
size counter is at least 4 bits (at most: 10 bits) which means that
at least 2048 byte transfer spanning at least 15 packets (or at least
524288 byte spanning 1023 packets for 19 bits transfer size counter
and 10 bits packet counter) is required to necessitate multipart DMA.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
 2025-01-21 19:28:13 +01:00
Tomasz Moń
883b77fe3b drivers: udc_dwc2: Recover after STALLed OUT Data Stage 
Prepare buffer to receive SETUP data on OUT endpoint 0 after endpoint
halt. This solves the issue where the device would no longer process any
control transfers after the first failed transfer with too large OUT
Data Stage (when processing failed due to data stage buffer allocation
failure).

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
 2025-01-21 19:28:13 +01:00
Tomasz Moń
18be1d0768 drivers: udc_dwc2: Fix large control write transfers 
The DOEPTSIZ0 XferSize field is 7 bits long, meaning that maximum single
transfer can be 127 bytes long. Configure the control write (OUT)
transfers considering the XferSize field size to support transfers with
data stage larger than 127 bytes.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
 2025-01-21 19:28:13 +01:00
Declan Snyder
d02c48ee8d uart_mcux_lpuart: LPFlexcomm inst based determine 
Since some platforms may have some lpuart that are wrapped in lpflexcomm
and some that are not, then change the init code to determine how to
connect the interrupt on an instance basis.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
 2025-01-21 19:28:01 +01:00
Declan Snyder
4f9eda6981 i2c_mcux_lpspi: LPflexcomm determine by inst 
Determine if lpflexcomm wrapped lpi2c by instance and connect
irq differently dependending on that to support platforms with
both flexcomm wrapped and unwrapped lpi2c's.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
 2025-01-21 19:28:01 +01:00
Declan Snyder
e531c709c0 spi_mcux_lpspi: Determine lpflexcomm by inst 
Determine proper irq setup depending whether the spi is wrapped in an
lpflexcomm or not on an instance basis since some platforms have some
wrapped and some not.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
 2025-01-21 19:28:01 +01:00
Lukasz Majewski
8719abaaa0 samples: settings: Enable NVS backend on mimxrt1020_evk board 
The tests for settings will not work properly with just provided config
file for mimxrt1020:
west build -p always -b mimxrt1020_evk samples/subsys/settings

as there the settings_save_one() would return -2 (-ENOENT) as by default
the CONFIG_SETTINGS_NONE is defined for mimxrt1020 configuration.

For proper operation (i.e. to have a memory medium to store settings
values) the NVS backend needs to be enabled.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
 2025-01-21 19:27:49 +01:00
David Leach
d29e2f342d boards: nxp: add RT1060 EVKC support 
MIMXRT1060 EVK rev C initial support files.

Signed-off-by: David Leach <david.leach@nxp.com>
 2025-01-21 19:27:39 +01:00
Jordan Yates
effa221bbc boards: openocd: --cmd-erase for STM32 series 
Add the appropriate mass erase command for STM32 SoC families.
Family to command mapping taken from:
  https://openocd.org/doc/html/Flash-Commands.html

Signed-off-by: Jordan Yates <jordan@embeint.com>
 2025-01-21 19:27:27 +01:00
Jordan Yates
ced3df6873 runners: openocd: support --erase 
Add support for the `--erase` option on `west flash`, for boards that
specify at least one `--cmd-erase` option.

Signed-off-by: Jordan Yates <jordan@embeint.com>
 2025-01-21 19:27:27 +01:00
Mark Wang
21ae5576a7 usb: udc: fix noncache usb transfer buffer 
CONFIG_UDC_BUF_FORCE_NOCACHE depend on NOCACHE_MEMORY && DCACHE in Kconfig,
so it can only be true when the platform supports cache.
The controller driver can imply the value of CONFIG_UDC_BUF_FORCE_NOCACHE,
like UDC_NXP_EHCI. If CONFIG_UDC_BUF_FORCE_NOCACHE is true, then all the
usb transfer buffer should be in noncache section.

Signed-off-by: Mark Wang <yichang.wang@nxp.com>
 2025-01-21 19:27:18 +01:00
Alexandre Bailon
aaa9a8777f samples: net: openthread: coap: Add shell commands 
This adds shell commands to easily get or set LED.

Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
 2025-01-21 19:27:07 +01:00
Alexandre Bailon
dc898b47c8 samples: net: openthread: Add a sample using OpenThread CoAP API 
In order to show how to use OpenThread and CoAP, add an application.
This example could be build to run a client or server.
The server could expose LEDs and buttons and client could get their
state and set the LEDs state.

The network is created automatically using the network key predefined
in the config. The goal is to make the example simple by removing
the commisionning and joinning process.

If a client application has a button, it could use it to toggle the first
LED on any boards running the server application.

Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
 2025-01-21 19:27:07 +01:00
Bernhard Krämer
0e743abb1d boards: teensy4: Update board documentation 
- insert various additional information content
- use tabs to distinguish board versions
- west flash is now usable for flashing
- show steps for using USB-console
- move images to img subfolder

Signed-off-by: Bernhard Krämer <bdkrae@gmail.com>
 2025-01-21 19:26:56 +01:00
Cong Nguyen Huu
c4d1c55319 tests: enable flash tests for s32z board 
Enable flash tests for s32z board

Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
 2025-01-21 19:26:45 +01:00
Cong Nguyen Huu
862706380e samples: enable flash samples for s32z board 
Enable flash samples for s32z board

Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
 2025-01-21 19:26:45 +01:00
Cong Nguyen Huu
40a27244f0 boards: s32z2xx: enable flash controller QSPI 
The on-board S26HS512T 512M-bit HyperFlash memory is connected to
the QSPI controller port A1.
This board configuration selects it as the default flash controller.

Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
 2025-01-21 19:26:45 +01:00
Cong Nguyen Huu
fd620c3ef9 drivers: flash: add NXP S32 QSPI HyperFlash driver 
Add support HyperFlash memory devices on a NXP S32 QSPI bus.
This driver uses a fixed LUT configuration that defined in HAL RTD
HyperFlash driver.
Driver allows to read, write and erase HyperFlash devices.

Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
 2025-01-21 19:26:45 +01:00
Cong Nguyen Huu
f0c4d1c53c drivers: flash_nxp_s32: create common source code 
Create common source code to use for supporting HyperFlash.

Rename 'FLASH_NXP_S32_QSPI_NOR_SFDP_RUNTIME' to
'FLASH_NXP_S32_QSPI_SFDP_RUNTIME' as a common kconfig.

Add the 'max-program-buffer-size' property to use for
setting memory pageSize, instead of using
'CONFIG_FLASH_NXP_S32_QSPI_LAYOUT_PAGE_SIZE' for setting.

Add the 'write-block-size' propertyto use for setting
the number of bytes used in write operations, it also
uses to instead of the 'memory-alignment' property.

Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
 2025-01-21 19:26:45 +01:00
Cong Nguyen Huu
e31d3645b4 drivers: memc_nxp_s32_qspi: add support for s32ze 
Add support QSPI secure flash protection (SFP)

Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
 2025-01-21 19:26:45 +01:00
Cong Nguyen Huu
a0d07078f0 drivers: memc_nxp_s32_qspi: change DT_REG_ADDR to DT_REG_ADDR_RAW 
Following the commit f98fde07b3, DT_REG_ADDR now expands with a 'U'
suffix as an unsigned value. However, for compatibility with IS_EQ,
a raw value without any suffix is required. Therefore, this update is
necessary.

Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
 2025-01-21 19:26:45 +01:00
Jaakko Rautiainen
516e5d61c6 drivers: sensor: ti: tmp435: added driver for TMP435 
The TMP435 is a remote temperature sensor monitor
with a built-in local temperature sensor.

Signed-off-by: Jaakko Rautiainen <jaakko.rautiainen@bittium.com>
 2025-01-21 19:26:32 +01:00
Derek Snell
1d441c239e doc: nxp: nw612: clarify documentation 
NW612 is the firmware name, IW612 is the chipset name.

Signed-off-by: Derek Snell <derek.snell@nxp.com>
 2025-01-21 15:14:05 +01:00
Armando Visconti
8bcaf732ee drivers/sensor: ism330dhcx: toggle device_conf bit 
Set ctrl9_xl.device_conf bit to 1 in ism330dhcx_init_chip()
prior to start device configuration, as stated in paragraph
9.20 of the datasheet.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
 2025-01-21 15:13:46 +01:00
Nick Brook
4c1275d63a cmake: Added "-" support to EXTRAVERSION 
cmake: Added "-" support to EXTRAVERSION.
Added to the regex and update the documentation.
Also updated the examples in the documentation.

Signed-off-by: Nick Brook <nrbrook@gmail.com>
 2025-01-21 15:13:36 +01:00
Nick Brook
0d6b3422c9 cmake: Allow semver style EXTRAVERSION 
cmake: Allow semver style EXTRAVERSION

Semver versions are commonly in the form X.X.X-a.1, X.X.X-beta.2, etc.
However, currently EXTRAVERSION cannot include ".". This change allows it.

Signed-off-by: Nick Brook <nrbrook@gmail.com>
 2025-01-21 15:13:36 +01:00
Vinayak Kariappa Chettimada
5dffad061c Bluetooth: Controller: Fix regression in connection update 
The connection event at the connection update instant was
skipped due to previous ticker node in use that is being
stopped was registering a relative occupied time that
overlapped with the new ticker node being started for
scheduling the connection with new interval.

Added mock interface for ticker_stop_abs() hence needed by
the Controller unit testing.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
 2025-01-21 15:13:16 +01:00
Jordan Yates
b6f8eff2f3 tests: fs: lib_link: added 
Add a test validating that Zephyr can compile with the 3 underlying
filesystems enabled with only `CONFIG_FILE_SYSTEM_LIB_LINK` enabled.

Signed-off-by: Jordan Yates <jordan@embeint.com>
 2025-01-21 15:13:05 +01:00
Jordan Yates
946f6b5c2e fs: allow enabling filesystems with FILE_SYSTEM_LIB_LINK 
Update the Kconfig configuration to allow enabling the underlying
filesystems (e.g. exFAT), with only `FILE_SYSTEM_LIB_LINK` enabled.

Signed-off-by: Jordan Yates <jordan@embeint.com>
 2025-01-21 15:13:05 +01:00
Jordan Yates
c26656c83f fs: ext2: fix uninitialized variable 
The compiler is unaware of the `block_size > 0` precondition, so it
outputs warnings of uninitialized `reclen`. Explicitly initialize the
variable to suppress this.

Signed-off-by: Jordan Yates <jordan@embeint.com>
 2025-01-21 15:13:05 +01:00
Jordan Yates
cd311380dd fs: ext2: update CONFIG_MAX_FILES name 
Add the `EXT2` prefix to `config MAX_FILES` to more appropriately
namespace the symbol.

Signed-off-by: Jordan Yates <jordan@embeint.com>
 2025-01-21 15:13:05 +01:00
Robert Slawinski
f2f62b0dc3 drivers: dm8806: smi bus error check 
SMI bus error check mechanism is preventing the host SMI bus to be
interferred by noise on board level. Current implementation is checking
if data which is writing to/reading from the PHY has correct CRC sum.
If not, then writing/rading process is repeated by the number of
attempts defined in the KConfig. If repeating transmission will fail
by the numbers of ettemps defined in KConfing, drivers returns an
error.

Signed-off-by: Robert Slawinski <robert.slawinski1@gmail.com>
 2025-01-21 15:12:55 +01:00
Ziad Elhanafy
9a236f82c1 drivers: gic: Add multiple GIC redistributors regions support 
For GIC multiple views feature support, all GIC Re-distributor's
GICR_TYPER.last will be set. Because configuration view-0 can
assign non-contiguous CPUs to views other than 0, in this case
the GIC Redistributors' registers won't seem contiguous.

So the GIC driver should cope with multiple sets of redistributors
like multi-chip scenarios. In this patch we add multiple GIC
redistributor regions support in GIC redistributor iteration.

For more information, refer to the Multi view subsection
in the GIC Technical Reference Manual.
For example:
https://developer.arm.com/documentation/101516/0400/Operation-of-GIC-700/Multi-view

Signed-off-by: Ziad Elhanafy <ziad.elhanafy@arm.com>
 2025-01-21 11:16:12 +01:00
Emil Gydesen
176676d81f tests: Bluetooth: Tester: Reorder btp_buf to fix variable array 
The `btp_hdr` needs to be last in the struct, as it has
a variable length array (data[]).

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
 2025-01-21 11:12:02 +01:00
Jamie McCrae
c562cbc284 mgmt: mcumgr: grp: img_mgmt: Fix unused label warning 
Fixes an issue with a warning when compiling for direct xip mode
without revert

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
 2025-01-21 11:11:51 +01:00
Kalle Kietäväinen
076e1488e1 drivers: bluetooth: silabs: Potentially discard unimportant HCI events 
Certain HCI events, like advertising reports, are of less importance than
others. This takes the discardable buffer pool into use for such events.
When the system is flooded with advertising reports, discarding some of
them ensures that the system can still handle other events.

Signed-off-by: Kalle Kietäväinen <kalle.kietavainen@silabs.com>
 2025-01-21 11:11:36 +01:00
Kalle Kietäväinen
fe5abd0344 drivers: bluetooth: silabs: Add separate thread for BT Link Layer 
The BT Link Layer needs to get runtime in a timely manner to keep
connections alive and handle other time-critical tasks. This is achieved by
adding a separate thread for it with a meta-IRQ priority, which means it
can preempt other threads. The driver also has an RX thread that passes HCI
messages from the controller to the host stack. This can be a lower
priority cooperative thread, as it doesn't have strict timing requirements.

Signed-off-by: Kalle Kietäväinen <kalle.kietavainen@silabs.com>
 2025-01-21 11:11:36 +01:00
Maochen Wang
cfe91b8df1 net: ip: net_pkt: only reserve L2 header for TX case 
Only reserve L2 header for TX case when allocating net buffer,
as for RX case, all the received headers are already in linear
buffer when the driver receives the data, and reserve extra L2
header for RX case may exceed the default buffer size.

Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
 2025-01-21 11:11:19 +01:00
Emil Gydesen
e4c5bb99b0 Bluetooth: GATT: Change get_handle function of find_by_uuid 
bt_gatt_find_by_uuid used bt_gatt_attr_value_handle but that
function only works to get the value handle of a characteristic
declaration, i.e. if the UUID is not BT_UUID_GATT_CHRC then it
would always return handle = 0. This meant that
bt_gatt_find_by_uuid would always use handle = 0 as the starting
handle for non-BT_UUID_GATT_CHRC attributes, instead of the handle
of the provided attr.

This was not an issue for any UUIDs that may only exist once on a
GATT server, which is most UUIDs, but for UUIDs like the
BT_UUID_TBS_* UUIDs that may be multiple instances of, it would
always return the first attribute rather than the one starting
from the provided start attr.

This commit also ensures that we do not overflow the `end_handle`
when adding 2 uint16_t values.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
 2025-01-21 11:11:09 +01:00
Jamie McCrae
8b7beff153 cmake: mcuboot: Use zephyr-discovered imgtool 
Uses imgtool which has already been located by zephyr

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
 2025-01-21 11:10:26 +01:00
Jamie McCrae
6db2c86d3a cmake: modules: Prefer imgtool being in MCUboot directory 
Changes the priority of imgtool so that the preferred version is
the one inside of the MCUboot directory

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
 2025-01-21 11:10:26 +01:00
559 changed files with 11398 additions and 3389 deletions
Show stats Expand all files Collapse all files

2
MAINTAINERS.yml
View file

@ -4168,6 +4168,8 @@ TI K3 Platforms:
- dnltz
files:
- boards/ti/*am62*/
- drivers/*/*davinci*
- drivers/*/*omap*
- drivers/*/*ti_k3*
- dts/bindings/*/ti,k3*
- soc/ti/k3/

1
arch/arm/core/mpu/Kconfig
View file

@ -8,6 +8,7 @@ if CPU_HAS_MPU
config ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
int
default 256 if ARM_MPU && ARMV6_M_ARMV8_M_BASELINE && !ARMV8_M_BASELINE
default 128 if ARM_MPU && FPU_SHARING && MPU_STACK_GUARD
default 64 if ARM_MPU && AARCH32_ARMV8_R
default 32 if ARM_MPU
default 4

11
arch/arm64/core/Kconfig
View file

@ -143,17 +143,6 @@ config ARM64_SAFE_EXCEPTION_STACK
used for user stack overflow checking, because kernel stack support
the checking work.
config ARM64_ENABLE_FRAME_POINTER
bool
depends on OVERRIDE_FRAME_POINTER_DEFAULT && !OMIT_FRAME_POINTER
depends on !FRAME_POINTER
select DEPRECATED
help
Deprecated. Use CONFIG_FRAME_POINTER instead.
Hidden option to simplify access to OVERRIDE_FRAME_POINTER_DEFAULT
and OMIT_FRAME_POINTER. It is automatically enabled when the frame
pointer unwinding is enabled.
config ARM64_EXCEPTION_STACK_TRACE
bool
default y

2
arch/common/CMakeLists.txt
View file

@ -27,8 +27,6 @@ zephyr_library_sources_ifdef(
multilevel_irq.c
)
zephyr_library_sources_ifdef(CONFIG_LEGACY_MULTI_LEVEL_TABLE_GENERATION multilevel_irq_legacy.c)
zephyr_library_sources_ifdef(CONFIG_SHARED_INTERRUPTS shared_irq.c)
if(NOT CONFIG_ARCH_HAS_TIMING_FUNCTIONS AND

15
arch/common/Kconfig
View file

@ -16,21 +16,6 @@ config SEMIHOST
This option is compatible with hardware and with QEMU, through the
(automatic) use of the -semihosting-config switch when invoking it.
config LEGACY_MULTI_LEVEL_TABLE_GENERATION
bool "Auto generates the multi-level interrupt LUT (deprecated)"
default y
select DEPRECATED
depends on MULTI_LEVEL_INTERRUPTS
depends on !PLIC
depends on !NXP_IRQSTEER
depends on !RV32M1_INTMUX
depends on !CAVS_ICTL
depends on !DW_ICTL_ACE
depends on !DW_ICTL
help
A make-shift Kconfig to continue generating the multi-level interrupt LUT
with the legacy way using DT macros.
config ISR_TABLE_SHELL
bool "Shell command to dump the ISR tables"
depends on GEN_SW_ISR_TABLE

72
arch/common/multilevel_irq_legacy.c
View file

@ -1,72 +0,0 @@
/*
* Copyright (c) 2018 Intel Corporation.
* Copyright (c) 2024 Meta.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/sw_isr_table.h>
#include <zephyr/sys/util.h>
/**
* @file
* @brief This file houses the deprecated legacy macros-generated multi-level interrupt lookup
* table code, compiled when `CONFIG_LEGACY_MULTI_LEVEL_TABLE_GENERATION` is enabled.
*/
/*
* Insert code if the node_id is an interrupt controller
*/
#define Z_IF_DT_IS_INTC(node_id, code) \
IF_ENABLED(DT_NODE_HAS_PROP(node_id, interrupt_controller), (code))
/*
* Expands to node_id if its IRQN is equal to `_irq`, nothing otherwise
* This only works for `_irq` between 0 & 4095, see `IS_EQ`
*/
#define Z_IF_DT_INTC_IRQN_EQ(node_id, _irq) IF_ENABLED(IS_EQ(DT_IRQ(node_id, irq), _irq), (node_id))
/*
* Expands to node_id if it's an interrupt controller & its IRQN is `irq`, or nothing otherwise
*/
#define Z_DT_INTC_GET_IRQN(node_id, _irq) \
Z_IF_DT_IS_INTC(node_id, Z_IF_DT_INTC_IRQN_EQ(node_id, _irq))
/**
* Loop through child of "/soc" and get root interrupt controllers with `_irq` as IRQN,
* this assumes only one device has the IRQN
* @param _irq irq number
* @return node_id(s) that has the `_irq` number, or empty if none of them has the `_irq`
*/
#define INTC_DT_IRQN_GET(_irq) \
DT_FOREACH_CHILD_STATUS_OKAY_VARGS(DT_PATH(soc), Z_DT_INTC_GET_IRQN, _irq)
#define INIT_IRQ_PARENT_OFFSET_2ND(n, d, i, o) \
IRQ_PARENT_ENTRY_DEFINE(intc_l2_##n, DEVICE_DT_GET_OR_NULL(d), i, o, 2)
#define IRQ_INDEX_TO_OFFSET(i, base) (base + i * CONFIG_MAX_IRQ_PER_AGGREGATOR)
#define CAT_2ND_LVL_LIST(i, base) \
INIT_IRQ_PARENT_OFFSET_2ND(i, INTC_DT_IRQN_GET(CONFIG_2ND_LVL_INTR_0##i##_OFFSET), \
CONFIG_2ND_LVL_INTR_0##i##_OFFSET, \
IRQ_INDEX_TO_OFFSET(i, base))
LISTIFY(CONFIG_NUM_2ND_LEVEL_AGGREGATORS, CAT_2ND_LVL_LIST, (;), CONFIG_2ND_LVL_ISR_TBL_OFFSET);
#ifdef CONFIG_3RD_LEVEL_INTERRUPTS
BUILD_ASSERT((CONFIG_NUM_3RD_LEVEL_AGGREGATORS * CONFIG_MAX_IRQ_PER_AGGREGATOR) <=
BIT(CONFIG_3RD_LEVEL_INTERRUPT_BITS),
"L3 bits not enough to cover the number of L3 IRQs");
#define INIT_IRQ_PARENT_OFFSET_3RD(n, d, i, o) \
IRQ_PARENT_ENTRY_DEFINE(intc_l3_##n, DEVICE_DT_GET_OR_NULL(d), i, o, 3)
#define CAT_3RD_LVL_LIST(i, base) \
INIT_IRQ_PARENT_OFFSET_3RD(i, INTC_DT_IRQN_GET(CONFIG_3RD_LVL_INTR_0##i##_OFFSET), \
CONFIG_3RD_LVL_INTR_0##i##_OFFSET, \
IRQ_INDEX_TO_OFFSET(i, base))
LISTIFY(CONFIG_NUM_3RD_LEVEL_AGGREGATORS, CAT_3RD_LVL_LIST, (;), CONFIG_3RD_LVL_ISR_TBL_OFFSET);
#endif /* CONFIG_3RD_LEVEL_INTERRUPTS */

2
arch/x86/include/x86_mmu.h
View file

@ -139,7 +139,7 @@ extern uint8_t z_shared_kernel_page_start;
/* Called from page fault handler. ptables here is the ptage tables for the
* faulting user thread and not the current set of page tables
*/
extern bool z_x86_kpti_is_access_ok(void *virt, pentry_t *ptables)
extern bool z_x86_kpti_is_access_ok(void *virt, pentry_t *ptables);
#endif /* CONFIG_DEMAND_PAGING */
#endif /* CONFIG_X86_KPTI */
#endif /* CONFIG_USERSPACE */

7
boards/adi/max78000evkit/Kconfig.max78000evkit Normal file
View file

@ -0,0 +1,7 @@
# MAX78000EVKIT boards configuration
# Copyright (c) 2025 Analog Devices, Inc.
# SPDX-License-Identifier: Apache-2.0
config BOARD_MAX78000EVKIT
select SOC_MAX78000_M4 if BOARD_MAX78000EVKIT_MAX78000_M4

9
boards/adi/max78000evkit/board.cmake Normal file
View file

@ -0,0 +1,9 @@
# Copyright (c) 2025 Analog Devices, Inc.
# SPDX-License-Identifier: Apache-2.0
board_runner_args(openocd --cmd-pre-init "source [find interface/cmsis-dap.cfg]")
board_runner_args(openocd --cmd-pre-init "source [find target/max78000.cfg]")
board_runner_args(jlink "--device=MAX78000" "--reset-after-load")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

9
boards/adi/max78000evkit/board.yml Normal file
View file

@ -0,0 +1,9 @@
# Copyright (c) 2025 Analog Devices, Inc.
# SPDX-License-Identifier: Apache-2.0
board:
name: max78000evkit
full_name: MAX78000EVKIT
vendor: adi
socs:
- name: max78000

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boards/adi/max78000evkit/doc/img/max78000evkit_img1.webp Normal file
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308
boards/adi/max78000evkit/doc/index.rst Normal file
View file

@ -0,0 +1,308 @@
.. zephyr:board:: max78000evkit
Overview
********
The MAX78000 evaluation kit (EV kit) provides a platform for leveraging the capabilities of the MAX78000 to build
new generations of artificial intelligence (AI) devices. Onboard hardware includes a digital microphone, a gyroscope/accelerometer, parallel camera module support
and a 3.5in touch-enabled color TFT display. A secondary display is driven by a power accumulator for tracking
device power consumption over time. Uncommitted GPIO as well as analog inputs are readily accessible through
0.1in pin headers. Primary system power as well as UART access is provided by a USB Micro-B connector. A USB
to SPI bridge provides rapid access to onboard memory, allowing large networks or images to load quickly
The Zephyr port is running on the MAX78000 MCU.
.. image:: img/max78000evkit_img1.webp
:align: center
:alt: MAX78000 EVKIT
Hardware
********
- MAX78000 MCU:
- Dual-Core, Low-Power Microcontroller
- Arm Cortex-M4 Processor with FPU up to 100MHz
- 512KB Flash and 128KB SRAM
- Optimized Performance with 16KB Instruction Cache
- Optional Error Correction Code (ECC-SEC-DED) for SRAM
- 32-Bit RISC-V Coprocessor up to 60MHz
- Up to 52 General-Purpose I/O Pins
- 12-Bit Parallel Camera Interface
- One I2S Master/Slave for Digital Audio Interface
- Neural Network Accelerator
- Highly Optimized for Deep Convolutional Neural Networks
- 442k 8-Bit Weight Capacity with 1,2,4,8-Bit Weights
- Programmable Input Image Size up to 1024 x 1024 pixels
- Programmable Network Depth up to 64 Layers
- Programmable per Layer Network Channel Widths up to 1024 Channels
- 1 and 2 Dimensional Convolution Processing
- Streaming Mode
- Flexibility to Support Other Network Types, Including MLP and Recurrent Neural Networks
- Power Management Maximizes Operating Time for Battery Applications
- Integrated Single-Inductor Multiple-Output (SIMO) Switch-Mode Power Supply (SMPS)
- 2.0V to 3.6V SIMO Supply Voltage Range
- Dynamic Voltage Scaling Minimizes Active Core Power Consumption
- 22.2μA/MHz While Loop Execution at 3.0V from Cache (CM4 Only)
- Selectable SRAM Retention in Low-Power Modes with Real-Time Clock (RTC) Enabled
- Security and Integrity
- Available Secure Boot
- AES 128/192/256 Hardware Acceleration Engine
- True Random Number Generator (TRNG) Seed Generator
Supported Features
==================
The ``max78000evkit/max78000/m4`` board target supports the following interfaces:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | clock and reset control |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial |
+-----------+------------+-------------------------------------+
| TRNG | on-chip | entropy |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| DMA | on-chip | dma controller |
+-----------+------------+-------------------------------------+
| Watchdog | on-chip | watchdog |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| Flash | on-chip | flash |
+-----------+------------+-------------------------------------+
| Timer | on-chip | pwm |
+-----------+------------+-------------------------------------+
| RTC | on-chip | real time clock |
+-----------+------------+-------------------------------------+
| Timer | on-chip | counter |
+-----------+------------+-------------------------------------+
| W1 | on-chip | one wire master |
+--------------------------------------------------------------+
Connections and IOs
===================
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| Name | Name | Settings | Description |
+===========+===================+===================+==============================================================================================+
| JP1 | LED1 EN | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Enables auxiliary LED1 | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | Open | | | Disables auxiliary LED1 | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP2 | LED2 EN | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Enables auxiliary LED2 | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | Open | | | Disables auxiliary LED2 | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP3 | TRIG1 | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Enables power monitor event trigger 1 | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | Open | | | Disables power monitor event trigger 1 | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP4 | TRIG2 | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Enables power monitor event trigger 2 | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | Open | | | Disables power monitor event trigger 2 | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP5 | VREGI | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Enables 3V3 VREGI power | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | Open | | | Disables 3V3 VREGI power | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP6 | VREGIA | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Enables 3V3 VREGIA power | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | Open | | | Disables 3V3 VREGIA power | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP7 | CNN BOOST | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Enables 1V1 boost LDO power | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | Open | | | Disables 1V1 boost LDO power | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP8 | VDDA | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Internal SIMO powers VDDA | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 2-3 | | | External LDO powers VDDA | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP9 | VDDIO | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Internal SIMO powers VDDIO | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 2-3 | | | External LDO powers VDDIO | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP10 | VDDIOH | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | DUT LDO powers VDDIOH | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 2-3 | | | AUX LDO powers VDDIOH | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP11 | VCOREB | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Internal SIMO powers VCOREB | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 2-3 | | | External LDO powers VCOREB | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP12 | VCOREA | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Internal SIMO powers VCOREA | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 2-3 | | | External LDO powers VCOREA | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP13 | VREGI PM BYPASS | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Bypasses power monitor shunt | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | Open | | | Enables power monitoring using power accumulator | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP14 | CNN 1V1 | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Connects 1V1 boost LDO to VCOREA | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | Open | | | Disables 1V1 boost LDO | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP15 | VCOREA PM BYPASS | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Bypasses power monitor shunt | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | Open | | | Enables power monitoring using power accumulator | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP16 | VCOREB PM BYPASS | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Bypasses power monitor shunt | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | Open | | | Enables power monitoring using power accumulator | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP17 | VREG_A PM BYPASS | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Bypasses power monitor shunt | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | Open | | | Enables power monitoring using power accumulator | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP18 | RESET EN | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Enables RV JTAG adapter to perform full system reset | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | Open | | | Disables system reset by RV JTAG adapter | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP19 | TFT BL | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Enables main TFT screen backlight | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | Open | | | Disables main TFT screen backlight | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP20 | I2S CLK SEL | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Onboard 12.288MHz oscillator drives I2S clock | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 2-3 | | | External 1V8 CMOS LEVEL source drives I2S clock | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP21 | DUT I | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | DUT 3V3 total current monitor point | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | Open | | | Open to insert current meter | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JP22 | USB-SPI/CAM | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2 | | | Enables USB-SPI bridge | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 2-3 | | | Enables camera | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JH1 | UART 0 EN | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | 1-2, 3-4 | | | Enables USB-UART0 bridge, software flow control | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | All Open | | | Disables USB-UART0 bridge, allows reuse of port pins | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
| JH2 | UART 1 EN | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | |All installed | | | Enables USB-UART1 bridge | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | All Open | | | Disables USB-UART1 bridge, allows reuse of port pins | |
| | | +---------------+ | +-----------------------------------------------------------------------------------------+ |
| | | | |
+-----------+-------------------+-------------------+----------------------------------------------------------------------------------------------+
Programming and Debugging
*************************
Flashing
========
The MAX78000 MCU can be flashed by connecting an external debug probe to the
SWD port. SWD debug can be accessed through the Cortex 10-pin connector, JH5.
Logic levels are fixed to VDDIO (1.8V).
Once the debug probe is connected to your host computer, then you can simply run the
``west flash`` command to write a firmware image into flash.
.. note::
This board uses OpenOCD as the default debug interface. You can also use
a Segger J-Link with Segger's native tooling by overriding the runner,
appending ``--runner jlink`` to your ``west`` command(s). The J-Link should
be connected to the standard 2*5 pin debug connector (JH5) using an
appropriate adapter board and cable.
Debugging
=========
Please refer to the `Flashing`_ section and run the ``west debug`` command
instead of ``west flash``.
References
**********
- `MAX78000EVKIT web page`_
.. _MAX78000EVKIT web page:
https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max78000evkit.html

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/*
* Copyright (c) 2025 Analog Devices, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <adi/max32/max78000.dtsi>
#include <adi/max32/max78000-pinctrl.dtsi>
#include <zephyr/dt-bindings/gpio/adi-max32-gpio.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Analog Devices MAX78000EVKIT";
compatible = "adi,max78000evkit";
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,sram = &sram2;
zephyr,flash = &flash0;
};
leds {
compatible = "gpio-leds";
led1: led_1 {
gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
label = "Green LED";
};
led2: led_2 {
gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
label = "Red LED";
};
};
buttons {
compatible = "gpio-keys";
pb1: pb1 {
gpios = <&gpio2 6 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "SW2";
zephyr,code = <INPUT_KEY_0>;
};
pb2: pb2 {
gpios = <&gpio2 7 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "SW3";
zephyr,code = <INPUT_KEY_1>;
};
pb_wakeup: pb_wakeup {
gpios = <&gpio3 1 (GPIO_PULL_UP | GPIO_ACTIVE_LOW
| MAX32_GPIO_VSEL_VDDIOH)>;
label = "Wakeup";
zephyr,code = <INPUT_KEY_WAKEUP>;
};
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led1;
led1 = &led2;
sw0 = &pb1;
sw1 = &pb2;
watchdog0 = &wdt0;
};
};
&uart0 {
pinctrl-0 = <&uart0a_tx_p0_1 &uart0a_rx_p0_0>;
pinctrl-names = "default";
current-speed = <115200>;
data-bits = <8>;
parity = "none";
status = "okay";
};
&clk_ipo {
status = "okay";
};
&clk_ibro {
status = "okay";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&gpio2 {
status = "okay";
};
&gpio3 {
status = "okay";
};
&trng {
status = "okay";
};
&i2c0 {
status = "okay";
pinctrl-0 = <&i2c0_scl_p0_10 &i2c0_sda_p0_11>;
pinctrl-names = "default";
};
&spi0 {
status = "okay";
pinctrl-0 = <&spi0_mosi_p0_5 &spi0_miso_p0_6 &spi0_sck_p0_7 &spi0_ss0_p0_4>;
pinctrl-names = "default";
};
&dma0 {
status = "okay";
};
&wdt0 {
status = "okay";
};
&w1 {
pinctrl-0 = <&owm_io_p0_18 &owm_pe_p0_19>;
pinctrl-names = "default";
};

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identifier: max78000evkit/max78000/m4
name: max78000evkit m4
vendor: adi
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- adc
- counter
- dma
- flash
- gpio
- i2c
- pwm
- serial
- spi
- trng
- w1
- watchdog
ram: 128
flash: 512

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# Copyright (c) 2025 Analog Devices, Inc.
# SPDX-License-Identifier: Apache-2.0
# Enable MPU
CONFIG_ARM_MPU=y
# Enable GPIO
CONFIG_GPIO=y
# Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable UART
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y

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# MAX78000FTHR boards configuration
# Copyright (c) 2025 Analog Devices, Inc.
# SPDX-License-Identifier: Apache-2.0
config BOARD_MAX78000FTHR
select SOC_MAX78000_M4 if BOARD_MAX78000FTHR_MAX78000_M4

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# Copyright (c) 2025 Analog Devices, Inc.
# SPDX-License-Identifier: Apache-2.0
board_runner_args(openocd --cmd-pre-init "source [find interface/cmsis-dap.cfg]")
board_runner_args(openocd --cmd-pre-init "source [find target/max78000.cfg]")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

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# Copyright (c) 2025 Analog Devices, Inc.
# SPDX-License-Identifier: Apache-2.0
board:
name: max78000fthr
full_name: MAX78000FTHR
vendor: adi
socs:
- name: max78000

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.. zephyr:board:: max78000fthr
Overview
********
The MAX78000FTHR is a rapid development platform to help engineers quickly implement ultra low-power, artificial
intelligence (AI) solutions using the MAX78000 Arm® Cortex®-M4F processor with an integrated Convolutional Neural Network
accelerator. The board also includes the MAX20303 PMIC for battery and power management. The form factor is 0.9in x 2.6in
dual-row header footprint that is compatible with Adafruit Feather Wing peripheral expansion boards. The board includes a
variety of peripherals, such as a CMOS VGA image sensor, digital microphone, low-power stereo audio CODEC, 1MB QSPI
SRAM, micro SD card connector, RGB indicator LED, and pushbutton. The MAX78000FTHR provides a poweroptimized flexible
platform for quick proof-of-concepts and early software development to enhance time to market.
The Zephyr port is running on the MAX78000 MCU.
.. image:: img/max78000fthr_img1.webp
:align: center
:alt: MAX78000 FTHR
Hardware
********
- MAX78000 MCU:
- Dual-Core, Low-Power Microcontroller
- Arm Cortex-M4 Processor with FPU up to 100MHz
- 512KB Flash and 128KB SRAM
- Optimized Performance with 16KB Instruction Cache
- Optional Error Correction Code (ECC-SEC-DED) for SRAM
- 32-Bit RISC-V Coprocessor up to 60MHz
- Up to 52 General-Purpose I/O Pins
- 12-Bit Parallel Camera Interface
- One I2S Master/Slave for Digital Audio Interface
- Neural Network Accelerator
- Highly Optimized for Deep Convolutional Neural Networks
- 442k 8-Bit Weight Capacity with 1,2,4,8-Bit Weights
- Programmable Input Image Size up to 1024 x 1024 pixels
- Programmable Network Depth up to 64 Layers
- Programmable per Layer Network Channel Widths up to 1024 Channels
- 1 and 2 Dimensional Convolution Processing
- Streaming Mode
- Flexibility to Support Other Network Types, Including MLP and Recurrent Neural Networks
- Power Management Maximizes Operating Time for Battery Applications
- Integrated Single-Inductor Multiple-Output (SIMO) Switch-Mode Power Supply (SMPS)
- 2.0V to 3.6V SIMO Supply Voltage Range
- Dynamic Voltage Scaling Minimizes Active Core Power Consumption
- 22.2μA/MHz While Loop Execution at 3.0V from Cache (CM4 Only)
- Selectable SRAM Retention in Low-Power Modes with Real-Time Clock (RTC) Enabled
- Security and Integrity
- Available Secure Boot
- AES 128/192/256 Hardware Acceleration Engine
- True Random Number Generator (TRNG) Seed Generator
Supported Features
==================
The ``max78000fthr/max78000/m4`` board target supports the following interfaces:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| CLOCK | on-chip | clock and reset control |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial |
+-----------+------------+-------------------------------------+
| TRNG | on-chip | entropy |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| DMA | on-chip | dma controller |
+-----------+------------+-------------------------------------+
| Watchdog | on-chip | watchdog |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
| Flash | on-chip | flash |
+-----------+------------+-------------------------------------+
| Timer | on-chip | pwm |
+-----------+------------+-------------------------------------+
| RTC | on-chip | real time clock |
+-----------+------------+-------------------------------------+
| Timer | on-chip | counter |
+-----------+------------+-------------------------------------+
| W1 | on-chip | one wire master |
+--------------------------------------------------------------+
Connections and IOs
===================
J8 Pinout
**********
+---------+----------+-------------------------------------------------------------------------------------------------+
| Pin | Name | Description |
+=========+==========+=================================================================================================+
| 1 | RST | Master Reset Signal |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 2 | 3V3 | 3.3V Output. Typically used to provide 3.3V to peripherals connected to the expansion headers. |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 3 | 1V8 | 1.8V Output. Typically used to provide 1.8V to peripherals connected to the expansion headers. |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 4 | GND | Ground |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 5 | P2_3 | GPIO or Analog Input (AIN3 channel). |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 6 | P2_4 | GPIO or Analog Input (AIN4 channel). |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 7 | P1_1 | GPIO or UART2 Tx signal |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 8 | P1_0 | GPIO or UART2 Rx signal |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 9 | MPC1 | GPIO controlled by PMIC through I2C interface. Open drain or push-pull programmable |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 10 | MPC2 | GPIO controlled by PMIC through I2C interface. Open drain or push-pull programmable |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 11 | P0_7 | GPIO or QSPI0 clock signal. Shared with SD card and on-board QSPI SRAM |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 12 | P0_5 | GPIO or QSPI0 MOSI signal. Shared with SD card and on-board QSPI SRAM |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 13 | P0_6 | GPIO or QSPI0 MISO signal. Shared with SD card and on-board QSPI SRAM |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 14 | P2_6 | GPIO or LPUART Rx signal |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 15 | P2_7 | GPIO or LPUART Tx signal |
+---------+----------+-------------------------------------------------------------------------------------------------+
| 16 | GND | Ground |
+---------+----------+-------------------------------------------------------------------------------------------------+
J4 Pinout
**********
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| Pin | Name | Description |
+=========+==========+===========================================================================================================+
| 1 | SYS | SYS Switched Connection to the Battery. This is the primary system power supply and automatically |
| | | switches between the battery voltage and the USB supply when available. |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 2 | PWR | Turns off the PMIC if shorted to Ground for 13 seconds. Hard power-down button. |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 3 | VBUS | USB VBUS Signal. This can be used as a 5V supply when connected to USB. This pin can also be |
| | | used as an input to power the board. |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 4 | P1_6 | GPIO |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 5 | MPC3 | GPIO controlled by PMIC through the I2C interface. Open drain or push-pull programmable. |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 6 | P0_9 | GPIO or QSPI0 SDIO3 signal. Shared with SD card and on-board QSPI SRAM. |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 7 | P0_8 | GPIO or QSPI0 SDIO2 signal. Shared with SD Card and on-board QSPI SRAM. |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 8 | P0_11 | GPIO or QSPI0 slave select signal |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 9 | P0_19 | GPIO |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 10 | P3_1 | GPIO or Wake-up signal. This pin is 3.3V only. |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 11 | P0_16 | GPIO or I2C1 SCL signal. An on-board level shifter allows selecting 1.8V or 3.3V operation through |
| | | R15 or R20 resistors. Do not populate both. |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
| 12 | P0_17 | GPIO or I2C1 SDA signal. An on-board level shifter allows selecting 1.8V or 3.3V operation through |
| | | R15 or R20 resistors. Do not populate both. |
+---------+----------+-----------------------------------------------------------------------------------------------------------+
Programming and Debugging
*************************
Flashing
========
The MAX32625 microcontroller on the board is preprogrammed with DAPLink firmware.
It allows debugging and programming of the MAX78000 Arm core over USB.
Once the debug probe is connected to your host computer, then you can simply run the
``west flash`` command to write a firmware image into flash.
.. note::
This board uses OpenOCD as the default debug interface. You can also use
a Segger J-Link with Segger's native tooling by overriding the runner,
appending ``--runner jlink`` to your ``west`` command(s). The J-Link should
be connected to the standard 2*5 pin debug connector (JH5) using an
appropriate adapter board and cable.
Debugging
=========
Please refer to the `Flashing`_ section and run the ``west debug`` command
instead of ``west flash``.
References
**********
- `MAX78000FTHR web page`_
.. _MAX78000FTHR web page:
https://www.analog.com/en/resources/evaluation-hardware-and-software/evaluation-boards-kits/max78000fthr.html

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/*
* Copyright (c) 2025 Analog Devices, Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <adi/max32/max78000.dtsi>
#include <adi/max32/max78000-pinctrl.dtsi>
#include <zephyr/dt-bindings/gpio/adi-max32-gpio.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Analog Devices MAX78000FTHR";
compatible = "adi,max78000fthr";
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,sram = &sram2;
zephyr,flash = &flash0;
};
leds {
compatible = "gpio-leds";
led1: led_1 {
gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
label = "Red LED";
};
led2: led_2 {
gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
label = "Green LED";
};
led3: led_3 {
gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
label = "Blue LED";
};
};
buttons {
compatible = "gpio-keys";
pb1: pb1 {
gpios = <&gpio0 2 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "SW1";
zephyr,code = <INPUT_KEY_0>;
};
pb2: pb2 {
gpios = <&gpio1 7 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "SW2";
zephyr,code = <INPUT_KEY_1>;
};
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led1;
led1 = &led2;
sw0 = &pb1;
sw1 = &pb2;
watchdog0 = &wdt0;
};
};
&uart0 {
pinctrl-0 = <&uart0a_tx_p0_1 &uart0a_rx_p0_0>;
pinctrl-names = "default";
current-speed = <115200>;
data-bits = <8>;
parity = "none";
status = "okay";
};
&clk_ipo {
status = "okay";
};
&clk_ibro {
status = "okay";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&gpio2 {
status = "okay";
};
&gpio3 {
status = "okay";
};
&trng {
status = "okay";
};
&i2c0 {
status = "okay";
pinctrl-0 = <&i2c0_scl_p0_10 &i2c0_sda_p0_11>;
pinctrl-names = "default";
};
&spi0 {
status = "okay";
pinctrl-0 = <&spi0_mosi_p0_5 &spi0_miso_p0_6 &spi0_sck_p0_7 &spi0_ss0_p0_4>;
pinctrl-names = "default";
};
&dma0 {
status = "okay";
};
&wdt0 {
status = "okay";
};
&w1 {
pinctrl-0 = <&owm_io_p0_6 &owm_pe_p0_7>;
pinctrl-names = "default";
};

24
boards/adi/max78000fthr/max78000fthr_max78000_m4.yaml Normal file
View file

@ -0,0 +1,24 @@
identifier: max78000fthr/max78000/m4
name: max78000fthr m4
vendor: adi
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- adc
- counter
- dma
- flash
- gpio
- i2c
- pwm
- serial
- spi
- trng
- w1
- watchdog
ram: 128
flash: 512

16
boards/adi/max78000fthr/max78000fthr_max78000_m4_defconfig Normal file
View file

@ -0,0 +1,16 @@
# Copyright (c) 2025 Analog Devices, Inc.
# SPDX-License-Identifier: Apache-2.0
# Enable MPU
CONFIG_ARM_MPU=y
# Enable GPIO
CONFIG_GPIO=y
# Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable UART
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y

3
boards/ambiq/apollo3_evb/apollo3_evb.dts
View file

@ -140,7 +140,6 @@
};
&spi0 {
compatible = "ambiq,spi";
pinctrl-0 = <&spi0_default>;
pinctrl-names = "default";
cs-gpios = <&gpio0_31 11 GPIO_ACTIVE_LOW>;
@ -149,7 +148,6 @@
};
&i2c3 {
compatible = "ambiq,i2c";
pinctrl-0 = <&i2c3_default>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_STANDARD>;
@ -196,7 +194,6 @@
};
&adc0 {
compatible = "ambiq,adc";
pinctrl-0 = <&adc0_default>;
pinctrl-names = "default";
status = "disabled";

3
boards/ambiq/apollo3p_evb/apollo3p_evb.dts
View file

@ -118,7 +118,6 @@
};
&spi0 {
compatible = "ambiq,spi";
pinctrl-0 = <&spi0_default>;
pinctrl-names = "default";
cs-gpios = <&gpio0_31 11 GPIO_ACTIVE_LOW>;
@ -127,7 +126,6 @@
};
&i2c3 {
compatible = "ambiq,i2c";
pinctrl-0 = <&i2c3_default>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_STANDARD>;
@ -174,7 +172,6 @@
};
&adc0 {
compatible = "ambiq,adc";
pinctrl-0 = <&adc0_default>;
pinctrl-names = "default";
status = "disabled";

2
boards/ambiq/apollo4p_blue_kxr_evb/apollo4p_blue_kxr_evb.dts
View file

@ -90,7 +90,6 @@
};
&i2c0 {
compatible = "ambiq,i2c";
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_STANDARD>;
@ -100,7 +99,6 @@
};
&spi1 {
compatible = "ambiq,spi";
pinctrl-0 = <&spi1_default>;
pinctrl-names = "default";
cs-gpios = <&gpio0_31 11 GPIO_ACTIVE_LOW>;

3
boards/ambiq/apollo4p_evb/apollo4p_evb.dts
View file

@ -76,7 +76,6 @@
};
&adc0 {
compatible = "ambiq,adc";
pinctrl-0 = <&adc0_default>;
pinctrl-names = "default";
status = "okay";
@ -96,7 +95,6 @@
};
&iom0_i2c {
compatible = "ambiq,i2c";
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_STANDARD>;
@ -106,7 +104,6 @@
};
&iom1_spi {
compatible = "ambiq,spi";
pinctrl-0 = <&spi1_default>;
pinctrl-names = "default";
cs-gpios = <&gpio0_31 11 GPIO_ACTIVE_LOW>;

20
boards/common/openocd-stm32.board.cmake Normal file
View file

@ -0,0 +1,20 @@
# SPDX-License-Identifier: Apache-2.0
if(CONFIG_SOC_SERIES_STM32L0X OR CONFIG_SOC_SERIES_STM32L1X)
board_runner_args(openocd "--cmd-erase=stm32l1x mass_erase 0")
elseif(CONFIG_SOC_SERIES_STM32L4X OR
CONFIG_SOC_SERIES_STM32L5X OR
CONFIG_SOC_SERIES_STM32U5X OR
CONFIG_SOC_SERIES_STM32WBX OR
CONFIG_SOC_SERIES_STM32G0X OR
CONFIG_SOC_SERIES_STM32G4X)
board_runner_args(openocd "--cmd-erase=stm32l4x mass_erase 0")
elseif(CONFIG_SOC_SERIES_STM32F0X OR
CONFIG_SOC_SERIES_STM32F1X OR
CONFIG_SOC_SERIES_STM32F3X)
board_runner_args(openocd "--cmd-erase=stm32f1x mass_erase 0")
elseif(CONFIG_SOC_SERIES_STM32F2X OR
CONFIG_SOC_SERIES_STM32F4X OR
CONFIG_SOC_SERIES_STM32F7X)
board_runner_args(openocd "--cmd-erase=stm32f2x mass_erase 0")
endif()

3
boards/common/openocd.board.cmake
View file

@ -20,3 +20,6 @@ board_finalize_runner_args(openocd
--cmd-load "${OPENOCD_CMD_LOAD_DEFAULT}"
--cmd-verify "${OPENOCD_CMD_VERIFY_DEFAULT}"
)
# Manufacturer common options
include(${CMAKE_CURRENT_LIST_DIR}/openocd-stm32.board.cmake)

2
boards/espressif/esp32s2_devkitc/esp32s2_devkitc.dts
View file

@ -23,7 +23,7 @@
};
chosen {
zephyr,sram = &sram0;
zephyr,sram = &sram1;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,flash = &flash0;

2
boards/espressif/esp32s2_saola/esp32s2_saola.dts
View file

@ -23,7 +23,7 @@
};
chosen {
zephyr,sram = &sram0;
zephyr,sram = &sram1;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,flash = &flash0;

2
boards/franzininho/esp32s2_franzininho/esp32s2_franzininho.dts
View file

@ -22,7 +22,7 @@
};
chosen {
zephyr,sram = &sram0;
zephyr,sram = &sram1;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,flash = &flash0;

2
boards/intel/niosv_g/niosv_g.dts
View file

@ -27,7 +27,7 @@
};
&mtimer {
reg = <0x90000 0x10>;
reg = <0x90000 0x8 0x90008 0x8>;
};
&uart0 {

2
boards/intel/niosv_m/niosv_m.dts
View file

@ -27,7 +27,7 @@
};
&mtimer {
reg = <0x90000 0x10>;
reg = <0x90000 0x8 0x90008 0x8>;
};
&uart0 {

2
boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_appcpu.dts
View file

@ -13,7 +13,7 @@
compatible = "espressif,esp32";
chosen {
zephyr,sram = &sram0;
zephyr,sram = &sram1;
zephyr,ipc_shm = &shm0;
zephyr,ipc = &ipm0;
zephyr,flash = &flash0;

2
boards/lilygo/ttgo_t7v1_5/ttgo_t7v1_5_esp32_procpu.dts
View file

@ -22,7 +22,7 @@
};
chosen {
zephyr,sram = &sram0;
zephyr,sram = &sram1;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,flash = &flash0;

2
boards/native/nrf_bsim/doc/nrf54l15bsim.rst
View file

@ -40,6 +40,7 @@ This boards include models of some of the nRF54L15 SOC peripherals:
* AAR (Accelerated Address Resolver)
* CCM (AES CCM mode encryption)
* CLOCK (Clock control)
* CRACEN (Crypto Accelerator Engine)
* DPPI (Distributed Programmable Peripheral Interconnect)
* ECB (AES electronic codebook mode encryption)
* EGU (Event Generator Unit)
@ -49,7 +50,6 @@ This boards include models of some of the nRF54L15 SOC peripherals:
* PPIB (PPI Bridge)
* RADIO
* RRAMC (Resistive RAM Controller)
* RTC (Real Time Counter)
* TEMP (Temperature sensor)
* TIMER
* UARTE (UART with Easy DMA)

2
boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.dts
View file

@ -55,7 +55,7 @@
rng: rng {
status = "okay";
compatible = "zephyr,native-posix-rng";
compatible = "nordic,nrf-cracen-ctrdrbg";
};
psa_rng: psa-rng {

12
boards/nxp/frdm_mcxn947/doc/index.rst
View file

@ -108,13 +108,13 @@ The FRDM-MCXN947 board configuration supports the following hardware features:
Dual Core samples
*****************
+-----------+------------------+----------------------+
+-----------+-------------------+----------------------+
| Core | Boot Address | Comment |
+===========+==================+======================+
| CPU0 | 0x10000000[992K] | primary core flash |
+-----------+------------------+----------------------+
| CPU1 | 0x101ce000[200K] | secondary core flash |
+-----------+------------------+----------------------+
+===========+===================+======================+
| CPU0 | 0x10000000[1856K] | primary core flash |
+-----------+-------------------+----------------------+
| CPU1 | 0x101d0000[192K] | secondary core flash |
+-----------+-------------------+----------------------+
+----------+------------------+-----------------------+
| Memory | Address[Size] | Comment |

14
boards/nxp/frdm_mcxn947/frdm_mcxn947.dtsi
View file

@ -149,6 +149,10 @@ nxp_8080_touch_panel_i2c: &flexcomm2_lpi2c2 {
#address-cells = <1>;
#size-cells = <1>;
/*
* Partition sizes must be aligned
* to the flash memory sector size of 8KB.
*/
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 DT_SIZE_K(80)>;
@ -158,15 +162,15 @@ nxp_8080_touch_panel_i2c: &flexcomm2_lpi2c2 {
*/
slot0_partition: partition@14000 {
label = "image-0";
reg = <0x00014000 DT_SIZE_K(884)>;
reg = <0x00014000 DT_SIZE_K(888)>;
};
slot1_partition: partition@F1000 {
slot1_partition: partition@F2000 {
label = "image-1";
reg = <0x000F1000 DT_SIZE_K(884)>;
reg = <0x000F2000 DT_SIZE_K(888)>;
};
cpu1_partition: partition@1CE000 {
cpu1_partition: partition@1D0000 {
label = "cpu1-image";
reg = <0x001CE000 DT_SIZE_K(200)>;
reg = <0x001D0000 DT_SIZE_K(192)>;
};
/* storage_partition is placed in WINBOND flash memory*/
};

10
boards/nxp/frdm_mcxw71/frdm_mcxw71-pinctrl.dtsi
View file

@ -32,6 +32,16 @@
};
};
pinmux_lpi2c0: pinmux_lpi2c0 {
group0 {
pinmux = <LPI2C0_SCL_PTA19>,
<LPI2C0_SDA_PTA18>;
drive-strength = "low";
slew-rate = "fast";
drive-open-drain;
};
};
pinmux_lpi2c1: pinmux_lpi2c1 {
group0 {
pinmux = <LPI2C1_SCL_PTB5>,

4
boards/nxp/frdm_rw612/frdm_rw612_common.dtsi
View file

@ -1,5 +1,5 @@
/*
* Copyright 2024 NXP
* Copyright 2024-2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -22,6 +22,8 @@
zephyr,flash = &w25q512jvfiq;
zephyr,console = &flexcomm3;
zephyr,shell-uart = &flexcomm3;
zephyr,flash-controller = &w25q512jvfiq;
zephyr,code-partition = &slot0_partition;
};
leds {

31
boards/nxp/mimxrt1040_evk/doc/index.rst
View file

@ -89,36 +89,37 @@ NXP prioritizes enabling the superset board with NXP's Full Platform Support for
Zephyr. Therefore, the mimxrt1064_evk board may have additional features
already supported, which can also be re-used on this mimxrt1040_evk board:
+-----------+------------+-------------------------------------+
+-----------+------------+-------------------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
+===========+============+=================================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
+-----------+------------+-------------------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
+-----------+------------+-------------------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
+-----------+------------+-------------------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
+-----------+------------+-------------------------------------------------+
| PWM | on-chip | pwm |
+-----------+------------+-------------------------------------+
+-----------+------------+-------------------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
+-----------+------------+-------------------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
+-----------+------------+-------------------------------------------------+
| DMA | on-chip | dma |
+-----------+------------+-------------------------------------+
+-----------+------------+-------------------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
+-----------+------------+-------------------------------------------------+
| GPT | on-chip | gpt |
+-----------+------------+-------------------------------------+
+-----------+------------+-------------------------------------------------+
| DISPLAY | on-chip | eLCDIF. Tested with |
| | | :ref:`rk043fn02h_ct`, and |
| | | :ref:`rk043fn66hs_ctg` shields |
+-----------+------------+-------------------------------------+
| UART | NXP NW61x | M.2 WIFI/BT module |
+-----------+------------+-------------------------------------+
+-----------+------------+-------------------------------------------------+
| UART | NXP IW61x | M.2 WIFI/BT module |
| | | (select :kconfig:option:`CONFIG_BT_NXP_NW612`) |
+-----------+------------+-------------------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/nxp/mimxrt1040_evk/mimxrt1040_evk_defconfig`

4
boards/nxp/mimxrt1060_evk/CMakeLists.txt
View file

@ -1,5 +1,5 @@
#
# Copyright 2018-2022 NXP
# Copyright 2018-2022, 2025 NXP
#
# SPDX-License-Identifier: Apache-2.0
#
@ -12,7 +12,7 @@ endif()
if(CONFIG_NXP_IMXRT_BOOT_HEADER)
zephyr_library()
if(${BOARD_REVISION} STREQUAL "B")
if((${BOARD_REVISION} STREQUAL "B") OR (${BOARD_REVISION} STREQUAL "C"))
set(FLASH_CONF evkbmimxrt1060_flexspi_nor_config.c)
set(BOARD_NAME evkbmimxrt1060)
elseif(CONFIG_DT_HAS_NXP_IMX_FLEXSPI_NOR_ENABLED)

2
boards/nxp/mimxrt1060_evk/board.cmake
View file

@ -14,7 +14,7 @@ board_runner_args(pyocd "--target=mimxrt1060")
board_runner_args(jlink "--device=MIMXRT1062xxx6A")
board_runner_args(linkserver "--device=MIMXRT1062xxxxA:EVK-MIMXRT1060")
if(("${BOARD_QUALIFIERS}" MATCHES "qspi") OR ("${BOARD_REVISION}" STREQUAL "B"))
if(("${BOARD_QUALIFIERS}" MATCHES "qspi") OR ("${BOARD_REVISION}" STREQUAL "B") OR ("${BOARD_REVISION}" STREQUAL "C"))
board_runner_args(jlink "--loader=BankAddr=0x60000000&Loader=QSPI")
elseif ("${BOARD_QUALIFIERS}" MATCHES "hyperflash")
board_runner_args(jlink "--loader=BankAddr=0x60000000&Loader=HyperFlash")

3
boards/nxp/mimxrt1060_evk/board.yml
View file

@ -9,7 +9,8 @@ boards:
- name: "hyperflash"
revision:
format: "letter"
default: "A"
default: "C"
revisions:
- name: "A"
- name: "B"
- name: "C"

65
boards/nxp/mimxrt1060_evk/doc/index.rst
View file

@ -316,8 +316,28 @@ The MIMXRT1060 SoC has eight UARTs. ``LPUART1`` is configured for the console,
``LPUART3`` for the Bluetooth Host Controller Interface (BT HCI), and the
remaining are not used.
Board Targets
*************
Board Revisions and Targets
***************************
There are three revisions of this board.
Rev A:
* Initial version
Rev B:
* adds the M.2 connector for Wi-Fi/BLE
* adds audio expansion connector J23
* USER LED1 changed to GPIO1 pin 8
Rev C:
* Replaces audio codec WM8960(EOL) to WM8962
* Replaces 32.768 KHz oscillator from ASH7K-32.768KHz-T(EOL)to ASH7KW-32.768KHZ-L-T
* Replaces motion sensor from FXOS8700CQ(EOL) to FXLS8974CFR3
* Re-assigns Bluetooth Audio PCM with dedicated I2S2
* Re-assigns Bluetooth interface UART_CTS, UART_RTS to hardware PIN
This board has two variants that can be targeted,
depending on which flash to set as ``zephyr,flash``:
@ -387,9 +407,27 @@ Flashing
Here is an example for the :zephyr:code-sample:`hello_world` application.
.. tabs::
.. group-tab:: i.MX RT1060 Rev A
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: mimxrt1060_evk//qspi
:board: mimxrt1060_evk@A//qspi
:goals: flash
.. group-tab:: i.MX RT1060 Rev B
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: mimxrt1060_evk@B//qspi
:goals: flash
.. group-tab:: i.MX RT1060 Rev C (default)
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: mimxrt1060_evk@C//qspi
:goals: flash
Open a serial terminal, reset the board (press the SW9 button), and you should
@ -405,11 +443,30 @@ Debugging
Here is an example for the :zephyr:code-sample:`hello_world` application.
.. tabs::
.. group-tab:: i.MX RT1060 Rev A
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: mimxrt1060_evk//qspi
:board: mimxrt1060_evk@A//qspi
:goals: debug
.. group-tab:: i.MX RT1060 Rev B
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: mimxrt1060_evk@B//qspi
:goals: debug
.. group-tab:: i.MX RT1060 Rev C (default)
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: mimxrt1060_evk@C//qspi
:goals: debug
Open a serial terminal, step through the application in your debugger, and you
should see the following message in the terminal:

2
boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi.yaml
View file

@ -4,7 +4,7 @@
# SPDX-License-Identifier: Apache-2.0
#
identifier: mimxrt1060_evk/mimxrt1062/qspi
identifier: mimxrt1060_evk@A/mimxrt1062/qspi
name: NXP MIMXRT1060-EVK
type: mcu
arch: arm

8
boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi_B.yaml
View file

@ -14,20 +14,20 @@ toolchain:
ram: 32768
flash: 8192
supported:
- adc
- arduino_gpio
- arduino_i2c
- arduino_serial
- arduino_spi
- can
- counter
- display
- dma
- gpio
- i2c
- netif:eth
- sdhc
- spi
- usb_device
- dma
- can
- usbd
- watchdog
- adc
vendor: nxp

15
boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi_C.overlay Normal file
View file

@ -0,0 +1,15 @@
/*
* Copyright (c) 2022, Whisper.ai
*
* SPDX-License-Identifier: Apache-2.0
*/
/* FLEXPWM not routed to LED on this EVK */
&flexpwm2_pwm3 {
status = "disabled";
};
&green_led {
gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
label = "User LED1";
};

34
boards/nxp/mimxrt1060_evk/mimxrt1060_evk_mimxrt1062_qspi_C.yaml Normal file
View file

@ -0,0 +1,34 @@
#
# Copyright (c) 2022, Whisper.ai
#
# SPDX-License-Identifier: Apache-2.0
#
identifier: mimxrt1060_evk@C/mimxrt1062/qspi
name: NXP MIMXRT1060-EVKC
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 32768
flash: 8192
supported:
- adc
- arduino_gpio
- arduino_i2c
- arduino_serial
- arduino_spi
- can
- counter
- display
- dma
- gpio
- i2c
- netif:eth
- sdhc
- spi
- usbd
- watchdog
vendor: nxp

59
boards/nxp/mimxrt1170_evk/doc/index.rst
View file

@ -107,67 +107,68 @@ this board with new support for Zephyr features. Note that this table
covers two boards: the RT1170 EVK (``mimxrt1170_evk//cm7/cm4``), and
RT1170 EVKB (``mimxrt1170_evk@B//cm7/cm4``)
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| Interface | Controller | Driver/Component | RT1170 EVK | RT1170 EVKB |
+===========+============+=====================================+=================+=================+
+===========+============+================================================+=================+=================+
| NVIC | on-chip | nested vector interrupt controller | Supported | Supported |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| SYSTICK | on-chip | systick | Supported | Supported |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| GPIO | on-chip | gpio | Supported | Supported |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| COUNTER | on-chip | gpt | Supported | Supported |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| TIMER | on-chip | gpt | Supported | Supported |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| CAN | on-chip | flexcan | Supported (M7) | Supported (M7) |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| SPI | on-chip | spi | Supported (M7) | Supported |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| I2C | on-chip | i2c | Supported | Supported |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| PWM | on-chip | pwm | Supported | Supported |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| ADC | on-chip | adc | Supported (M7) | Supported (M7) |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| UART | on-chip | serial port-polling; | Supported | Supported |
| | | serial port-interrupt; | | |
| | | serial port-async | | |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| DMA | on-chip | dma | Supported | Supported |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| WATCHDOG | on-chip | watchdog | Supported (M7) | Supported (M7) |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| ENET | on-chip | ethernet - 10/100M | Supported (M7) | Supported (M7) |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| ENET1G | on-chip | ethernet - 10/100/1000M | Supported (M7) | Supported (M7) |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| SAI | on-chip | i2s | Supported | No support |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| USB | on-chip | USB Device | Supported (M7) | Supported (M7) |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| HWINFO | on-chip | Unique device serial number | Supported (M7) | Supported (M7) |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| DISPLAY | on-chip | eLCDIF; MIPI-DSI. Tested with | Supported (M7) | Supported (M7) |
| | | :ref:`rk055hdmipi4m`, | | |
| | | :ref:`rk055hdmipi4ma0`, | | |
| | | and :ref:`g1120b0mipi` shields | | |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| ACMP | on-chip | sensor | Supported | No support |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| CAAM RNG | on-chip | entropy | Supported (M7) | No support |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| FLEXSPI | on-chip | flash programming | Supported (M7) | Supported (M7) |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| SDHC | on-chip | SD host controller | Supported (M7) | Supported (M7) |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| PIT | on-chip | pit | Supported (M7) | Supported (M7) |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| VIDEO | on-chip | CSI; MIPI CSI-2 Rx. Tested with | Supported (M7) | Supported (M7) |
| | | :ref:`nxp_btb44_ov5640` shield | | |
+-----------+------------+-------------------------------------+-----------------+-----------------+
| UART | NXP NW61x | M.2 WIFI/BT module | Unsupported | Supported (M7) |
+-----------+------------+-------------------------------------+-----------------+-----------------+
+-----------+------------+------------------------------------------------+-----------------+-----------------+
| UART | NXP IW61x | M.2 WIFI/BT module | Unsupported | Supported (M7) |
| | | (select :kconfig:option:`CONFIG_BT_NXP_NW612`) | | |
+-----------+------------+------------------------------------------------+-----------------+-----------------+
The default configuration can be found in the defconfig files:
:zephyr_file:`boards/nxp/mimxrt1170_evk/mimxrt1170_evk_mimxrt1176_cm7_defconfig`

2
boards/nxp/mimxrt1180_evk/board.cmake
View file

@ -19,5 +19,5 @@ board_runner_args(linkserver "--core=cm7")
board_runner_args(jlink "--device=MIMXRT1189xxx8_M7" "--speed=4000" "--no-reset" "--tool-opt=-jlinkscriptfile ${RT1180_BOARD_DIR}/jlinkscript/evkmimxrt1180_cm7.jlinkscript" "--tool-opt=-ir")
endif()
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/linkserver.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

13
boards/nxp/mimxrt1180_evk/doc/index.rst
View file

@ -183,18 +183,19 @@ Build and flash applications as usual (see :ref:`build_an_application` and
Configuring a Debug Probe
=========================
LinkServer is the default runner for this board.
A debug probe is used for both flashing and debugging the board. This board is
configured by default to use the :ref:`mcu-link-cmsis-onboard-debug-probe`,
however the :ref:`pyocd-debug-host-tools` do not yet support programming the
external flashes on this board so you must reconfigure the board for one of the
following debug probes instead.
configured by default to use the :ref:`mcu-link-cmsis-onboard-debug-probe`.
The :ref:`pyocd-debug-host-tools` do not yet support programming the
external flashes on this board. Use one of the other supported debug probes
below.
.. _Using J-Link RT1180:
Using J-Link
------------
Please ensure used JLINK above V7.94g and jumper JP5 installed if using
Please ensure to use a version of JLINK above V7.94g and jumper JP5 is installed if using
external jlink plus on J37 as debugger.
When debugging cm33 core, need to ensure the SW5 on "0100" mode.
@ -212,7 +213,7 @@ EVK.
Using Linkserver
----------------
Please ensure used linkserver above V1.5.30 and jumper JP5 uninstalled.
Please ensure to use a version of Linkserver above V1.5.30 and jumper JP5 is uninstalled (default setting).
When debugging cm33 core, need to ensure the SW5 on "0100" mode.
When debugging cm7 core, need to ensure the SW5 on "0001" mode.

4
boards/nxp/mr_canhubk3/mr_canhubk3.dts
View file

@ -1,5 +1,5 @@
/*
* Copyright 2023 NXP
* Copyright 2023-2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -344,6 +344,8 @@
readoc = "1-4-4";
writeoc = "1-4-4";
has-32k-erase;
max-program-buffer-size = <256>;
write-block-size = <1>;
status = "okay";
partitions {

8
boards/nxp/s32z2xxdc2/doc/index.rst
View file

@ -62,6 +62,8 @@ The boards support the following hardware features:
+-----------+------------+-------------------------------------+
| eMIOS | on-chip | pwm |
+-----------+------------+-------------------------------------+
| QSPI | on-chip | flash |
+-----------+------------+-------------------------------------+
Other hardware features are not currently supported by the port.
@ -172,6 +174,12 @@ EDMA
The EDMA modules feature four EDMA3 instances: Instance 0 with 32 channels,
and instances 1, 4, and 5, each with 16 channels.
External Flash
==============
The on-board S26HS512T 512M-bit HyperFlash memory is connected to the QSPI controller
port A1. This board configuration selects it as the default flash controller.
Programming and Debugging
*************************

67
boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270.dtsi
View file

@ -5,6 +5,7 @@
*/
#include "s32z2xxdc2_s32z270_pinctrl.dtsi"
#include <zephyr/dt-bindings/qspi/nxp-s32-qspi.h>
&swt0 {
status = "okay";
@ -58,3 +59,69 @@
&sar_adc1 {
vref-mv = <1800>;
};
&qspi0 {
pinctrl-0 = <&qspi0_default>;
pinctrl-names = "default";
data-rate = "DDR";
column-space = <3>;
word-addressable;
hold-time-2x;
a-dll-freq-enable;
a-dll-ref-counter = <2>;
a-dll-resolution = <2>;
a-dll-coarse-delay = <2>;
a-dll-fine-delay = <2>;
a-dll-mode = "AUTO UPDATE";
a-rx-clock-source = "EXTERNAL DQS";
ahb-buffers-masters = <0 1 2 3>;
ahb-buffers-sizes = <256 256 256 256>;
ahb-buffers-all-masters;
status = "okay";
sfp_mdad {
compatible = "nxp,s32-qspi-sfp-mdad";
mdad_0: mdad_0 {
domain-id = <0>;
secure-attribute = <NXP_S32_QSPI_SECURE>;
};
};
sfp_frad {
compatible = "nxp,s32-qspi-sfp-frad";
#address-cells = <1>;
#size-cells = <1>;
frad_0: frad@0 {
reg = <0x0 DT_SIZE_M(512)>;
master-domain-acp-policy = <NXP_S32_QSPI_SECURE>;
};
};
s26hs512t: s26hs512t@0 {
compatible = "nxp,s32-qspi-hyperflash";
reg = <0>;
jedec-id = [00 34 00 7b 00 1a 00 0f 00 90];
device-id-word-addr = <0x800>;
size = <DT_SIZE_M(512)>;
write-block-size = <2>;
read-latency-cycles = <16>;
max-program-buffer-size = <256>;
vcc-mv = <1800>;
drive-strength-ohm = <27>;
ppw-sectors-addr-mapping = "LOW";
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
storage_partition: partition@0 {
label = "storage";
reg = <0x0 0x10000>;
};
};
};
};

21
boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_pinctrl.dtsi
View file

@ -127,4 +127,25 @@
drive-open-drain;
};
};
qspi0_default: qspi0_default {
group1 {
pinmux = <PI4_QSPI_0_DATA_A_O0>, <PH14_QSPI_0_DATA_A_O1>,
<PI8_QSPI_0_DATA_A_O2>, <PI1_QSPI_0_DATA_A_O3>,
<PI5_QSPI_0_DATA_A_O4>, <PH15_QSPI_0_DATA_A_O5>,
<PI7_QSPI_0_DATA_A_O6>, <PI0_QSPI_0_DATA_A_O7>,
<PI6_QSPI_0_DQS_A_O>;
output-enable;
input-enable;
};
group2 {
pinmux = <PH13_QSPI_0_CS_A0>, <PI9_QSPI_0_CS_A1>,
<PI2_QSPI_0_CK_A_B>, <PI3_QSPI_0_CK_A>;
output-enable;
};
group3 {
pinmux = <PH12_QSPI_0_INTA_B>;
input-enable;
};
};
};

1
boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0.dts
View file

@ -16,6 +16,7 @@
zephyr,sram = &dram0;
zephyr,flash = &cram0;
zephyr,canbus = &canxl0;
zephyr,flash-controller = &s26hs512t;
};
aliases {

1
boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1.dts
View file

@ -16,6 +16,7 @@
zephyr,sram = &dram1;
zephyr,flash = &cram1;
zephyr,canbus = &flexcan0;
zephyr,flash-controller = &s26hs512t;
};
aliases {

2
boards/phytec/phyboard_lyra/doc/phyboard_lyra_am62xx_a53.rst
View file

@ -45,6 +45,8 @@ features:
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port |
+-----------+------------+-------------------------------------+
| Mailbox | on-chip | IPC Mailbox |
+-----------+------------+-------------------------------------+
Devices
========

2
boards/phytec/phyboard_lyra/doc/phyboard_lyra_am62xx_m4.rst
View file

@ -56,6 +56,8 @@ The phyboard_lyra/am6234/m4 configuration supports the following hardware featur
+-----------+------------+-------------------------------------+
| UART | on-chip | serial |
+-----------+------------+-------------------------------------+
| Mailbox | on-chip | IPC Mailbox |
+-----------+------------+-------------------------------------+
Other hardware features are not currently supported by the port.

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188
boards/pjrc/teensy4/doc/index.rst
View file

@ -5,72 +5,100 @@ PJRC TEENSY 4
Overview
********
The Teensy is a complete USB-based microcontroller development system, in a
very small footprint, capable of implementing many types of projects. All
programming is done via the USB port.
.. tabs::
.. figure:: teensy40.jpg
.. group-tab:: Teensy 4.0
.. figure:: img/teensy40.jpg
:align: center
:alt: TEENSY40
TEENSY40 (Credit: https://www.pjrc.com)
(Credit: https://www.pjrc.com)
.. figure:: teensy41.jpg
.. group-tab:: Teensy 4.1
.. figure:: img/teensy41.jpg
:align: center
:alt: TEENSY41
TEENSY41 (Credit: https://www.pjrc.com)
(Credit: https://www.pjrc.com)
Hardware
********
Teensy 4.0:
.. tabs::
.. group-tab:: Teensy 4.0
- MIMXRT1062DVL6A MCU (600 MHz, 1024 KB on-chip memory)
- 16 Mbit QSPI Flash
- LED
- User LED
- USB 2.0 host connector
Teensy 4.1:
See the `Teensy 4.0 Website`_ for a complete hardware description.
.. group-tab:: Teensy 4.1
- MIMXRT1062DVJ6A MCU (600 MHz, 1024 KB on-chip memory)
- 64 Mbit QSPI Flash
- LED
- User LED
- USB 2.0 host connector
- USB 2.0 OTG connector
- 10/100 Mbit/s Ethernet PHY
- 10/100 Mbit/s Ethernet transceiver
- TF socket for SD card
See the `Teensy 4.0 Website`_ for a complete hardware description.
To connect an Ethernet cable, additional `Teensy 4.1 Ethernet Kit`_ is required.
See the `Teensy 4.1 Website`_ for a complete hardware description.
For more information, check the `i.MX RT1060 Datasheet`_.
Supported Features
==================
The teensy40 board configuration supports the following hardware
The Teensy 4.0 board configuration supports the following hardware
features:
+-----------+------------+-------------------------------------+
+-----------+------------+----------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
+===========+============+======================+
| ADC | on-chip | adc |
+-----------+------------+----------------------+
| CLOCK | on-chip | clock_control |
+-----------+------------+----------------------+
| FLASH | on-chip | flash |
+-----------+------------+----------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
+-----------+------------+----------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| USB | on-chip | USB device |
+-----------+------------+-------------------------------------+
+-----------+------------+----------------------+
| I2S | on-chip | i2s |
+-----------+------------+----------------------+
| NVIC | on-chip | arch/arm |
+-----------+------------+----------------------+
| PWM | on-chip | pwm |
+-----------+------------+----------------------+
| RTC | on-chip | system clock |
+-----------+------------+----------------------+
| SPI | on-chip | spi |
+-----------+------------+----------------------+
| CAN | on-chip | can |
+-----------+------------+----------------------+
| UART | on-chip | serial |
+-----------+------------+----------------------+
| USB | on-chip | usb |
+-----------+------------+----------------------+
| TRNG | on-chip | entropy |
+-----------+------------+----------------------+
| WDT | on-chip | watchdog |
+-----------+------------+----------------------+
The default configuration can be found in
:zephyr_file:`boards/pjrc/teensy4/teensy40_defconfig`
The teensy41 board configuration supports additional hardware
The Teensy 4.1 board configuration supports additional hardware
features:
+-----------+------------+-------------------------------------+
@ -81,10 +109,7 @@ features:
| ENET | on-chip | ethernet |
+-----------+------------+-------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/pjrc/teensy4/teensy41_defconfig`
Other hardware features are not currently supported by the port.
Other hardware features have not been enabled yet for this board.
Connections and IOs
===================
@ -204,16 +229,66 @@ Programming and Debugging
Flashing
========
Build applications as usual (see :ref:`build_an_application` for more details).
Flash hex-file with the documented tools:
Both the Teensy 4.0 and Teensy 4.1 ship with a dedicated bootloader chip,
which supports flashing using USB. This allows easy flashing of new images,
but does not support debugging the device.
.. _Teensy flash tools:
https://www.pjrc.com/teensy/loader.html
#. Build the Zephyr kernel and the :zephyr:code-sample:`blinky` sample application.
Debugging
=========
Console output is mapped to teensy pins 0 (RX1) and 1 (TX1). Connect a usb-to-serial adapter
.. tabs::
.. group-tab:: Teensy 4.0
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: teensy40
:goals: build
:compact:
.. group-tab:: Teensy 4.1
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: teensy41
:goals: build
:compact:
#. Connect the board to your host computer using USB.
#. Tap the reset button to enter bootloader mode.
Red LED blinks.
#. Flash the image.
.. tabs::
.. group-tab:: Teensy 4.0
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: teensy40
:goals: flash
:compact:
.. group-tab:: Teensy 4.1
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: teensy41
:goals: flash
:compact:
#. You should see the orange LED blink.
Configuring a Console
=====================
.. tabs::
.. group-tab:: UART-Console
By default console output is mapped to teensy pins 0 (RX1) and 1 (TX1). Connect a usb-to-serial adapter
to use this serial console. Use the following settings with your serial terminal of choice (minicom, putty,
etc.):
@ -222,6 +297,30 @@ etc.):
- Parity: None
- Stop bits: 1
.. group-tab:: USB-Console
By mapping the console output to USB, a usb-to-serial adapter is no longer required.
Utilizing the :ref:`snippet-cdc-acm-console` and a config option will enable this feature.
#. If application code doesn´t enable USB device support, this must be done via Kconfig option.
.. code-block:: kconfig
CONFIG_USB_DEVICE_INITIALIZE_AT_BOOT=y
#. Build application including the snippet.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:snippets: cdc-acm-console
:board: teensy41
:goals: flash
:compact:
#. After application startup a serial device named like
``tty.usbmodem14203`` should appear on your host computer.
You can use e.g. ``Serial Monitor`` plugin for VScode to monitor.
References
**********
@ -230,14 +329,11 @@ References
.. _Teensy 4.0 Website:
https://www.pjrc.com/store/teensy40.html
.. _Teensy Schematics:
https://www.pjrc.com/teensy/schematic.html
.. _Teensy 4.1 Website:
https://www.pjrc.com/store/teensy41.html
.. _i.MX RT1060 Website:
https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-applications-processors/i.mx-rt-series/i.mx-rt1060-crossover-processor-with-arm-cortex-m7-core:i.MX-RT1060
.. _Teensy 4.1 Ethernet Kit:
https://www.pjrc.com/store/ethernet_kit.html
.. _i.MX RT1060 Datasheet:
https://www.nxp.com/docs/en/nxp/data-sheets/IMXRT1060CEC.pdf
.. _i.MX RT1060 Reference Manual:
https://www.nxp.com/webapp/Download?colCode=IMXRT1060RM

74
boards/sensry/ganymed_bob/ganymed_bob_sy120-pinctrl.dtsi Normal file
View file

@ -0,0 +1,74 @@
/* Copyright (c) 2024 sensry.io */
/* SPDX-License-Identifier: Apache-2.0 */
#include <zephyr/dt-bindings/pinctrl/sy1xx-pinctrl.h>
&pinctrl {
/* UART0 */
/omit-if-no-ref/ uart0_tx: uart0_tx {
pinmux = <SY1XX_UART0_PAD_CFG0 SY1XX_PAD(0)>;
};
/omit-if-no-ref/ uart0_rx: uart0_rx {
pinmux = <SY1XX_UART0_PAD_CFG0 SY1XX_PAD(1)>;
input-enable;
};
/* UART1 */
/omit-if-no-ref/ uart1_tx: uart1_tx {
pinmux = <SY1XX_UART1_PAD_CFG0 SY1XX_PAD(0)>;
};
/omit-if-no-ref/ uart1_rx: uart1_rx {
pinmux = <SY1XX_UART1_PAD_CFG0 SY1XX_PAD(1)>;
input-enable;
};
/omit-if-no-ref/ uart1_cts: uart1_cts {
pinmux = <SY1XX_UART1_PAD_CFG0 SY1XX_PAD(2)>;
};
/omit-if-no-ref/ uart1_rts: uart1_rts {
pinmux = <SY1XX_UART1_PAD_CFG0 SY1XX_PAD(3)>;
input-enable;
bias-pull-up;
};
/* UART2 */
/omit-if-no-ref/ uart2_tx: uart2_tx {
pinmux = <SY1XX_UART2_PAD_CFG0 SY1XX_PAD(0)>;
};
/omit-if-no-ref/ uart2_rx: uart2_rx {
pinmux = <SY1XX_UART2_PAD_CFG0 SY1XX_PAD(1)>;
input-enable;
};
/omit-if-no-ref/ uart2_cts: uart2_cts {
pinmux = <SY1XX_UART2_PAD_CFG0 SY1XX_PAD(2)>;
};
/omit-if-no-ref/ uart2_rts: uart2_rts {
pinmux = <SY1XX_UART2_PAD_CFG0 SY1XX_PAD(3)>;
input-enable;
bias-pull-up;
};
};
&uart0 {
pinctrl-0 = <&uart0_tx &uart0_rx>;
pinctrl-names = "default";
};
&uart1 {
pinctrl-0 = <&uart1_tx &uart1_rx &uart1_cts &uart1_rts>;
pinctrl-names = "default";
};
&uart2 {
pinctrl-0 = <&uart2_tx &uart2_rx &uart2_cts &uart2_rts>;
pinctrl-names = "default";
};

1
boards/sensry/ganymed_bob/ganymed_bob_sy120_gbm.dts
View file

@ -4,6 +4,7 @@
/dts-v1/;
#include <sensry/ganymed-sy1xx.dtsi>
#include "ganymed_bob_sy120-pinctrl.dtsi"
/ {

1
boards/sensry/ganymed_bob/ganymed_bob_sy120_gen1.dts
View file

@ -4,6 +4,7 @@
/dts-v1/;
#include <sensry/ganymed-sy1xx.dtsi>
#include "ganymed_bob_sy120-pinctrl.dtsi"
/ {

83
boards/silabs/dev_kits/xg24_dk2601b/doc/index.rst
View file

@ -17,7 +17,7 @@ Hardware
- Transmit power: up to +20 dBm
- Operation frequency: 2.4 GHz
- Crystals for LFXO (32.768 kHz) and HFXO (38.4 MHz).
- On board sensors:
- On board devices:
- Silicon Labs Si7021 relative humidity & temperature sensor
- Silicon Labs Si7210 hall effect sensor
@ -25,6 +25,7 @@ Hardware
- TDK InvenSense ICM-20689 6-axis inertial measurement sensor
- Vishay VEML6035 ambient light sensor
- Bosch BMP384 pressure sensor with internal temperature sensor
- MX25R3235F 32 Mbit SPI data flash
For more information about the EFR32MG24 SoC and BRD2601B board, refer to these
documents:
@ -39,33 +40,35 @@ Supported Features
The board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
+-----------+------------+------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
+===========+============+====================================+
| MPU | on-chip | memory protection unit |
+-----------+------------+-------------------------------------+
+-----------+------------+------------------------------------+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
+-----------+------------+------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | stimer |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash memory |
+-----------+------------+-------------------------------------+
+-----------+------------+------------------------------------+
| SYSRTC | on-chip | counter, timer |
+-----------+------------+------------------------------------+
| MSC | on-chip | flash memory |
+-----------+------------+------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial |
+-----------+------------+-------------------------------------+
| DMA | on-chip | ldma |
+-----------+------------+-------------------------------------+
| TRNG | on-chip | semailbox |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | watchdog |
+-----------+------------+-------------------------------------+
| I2C(M/S) | on-chip | i2c |
+-----------+------------+-------------------------------------+
+-----------+------------+------------------------------------+
| EUSART | on-chip | serial, spi |
+-----------+------------+------------------------------------+
| USART | on-chip | serial, spi |
+-----------+------------+------------------------------------+
| LDMA | on-chip | dma |
+-----------+------------+------------------------------------+
| SE | on-chip | entropy |
+-----------+------------+------------------------------------+
| WDOG | on-chip | watchdog |
+-----------+------------+------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+------------------------------------+
| RADIO | on-chip | bluetooth |
+-----------+------------+-------------------------------------+
+-----------+------------+------------------------------------+
Other hardware features are currently not supported by the port.
@ -73,23 +76,37 @@ Connections and IOs
===================
In the following table, the column **Name** contains Pin names. For example, PA2
means Pin number 2 on PORTA, as used in the board's datasheets and manuals.
means Pin number 2 on Port A, as used in the board's datasheets and manuals.
+-------+-------------+-------------------------------------+
+------+--------------+---------------------+
| Name | Function | Usage |
+=======+=============+=====================================+
+======+==============+=====================+
| PA4 | GPIO | LED0 |
+-------+-------------+-------------------------------------+
+------+--------------+---------------------+
| PB0 | GPIO | LED1 |
+-------+-------------+-------------------------------------+
+------+--------------+---------------------+
| PD2 | GPIO | LED2 |
+------+--------------+---------------------+
| PB2 | GPIO | Push Button 0 |
+-------+-------------+-------------------------------------+
+------+--------------+---------------------+
| PB3 | GPIO | Push Button 1 |
+-------+-------------+-------------------------------------+
| PA5 | USART0_TX | UART Console VCOM_TX US0_TX |
+-------+-------------+-------------------------------------+
| PA6 | USART0_RX | UART Console VCOM_RX US0_RX |
+-------+-------------+-------------------------------------+
+------+--------------+---------------------+
| PA5 | USART0_TX | UART Console |
+------+--------------+---------------------+
| PA6 | USART0_RX | UART Console |
+------+--------------+---------------------+
| PC3 | EUSART1_TX | SPI bus: flash, IMU |
+------+--------------+---------------------+
| PC2 | EUSART1_RX | SPI bus: flash, IMU |
+------+--------------+---------------------+
| PC1 | EUSART1_SCLK | SPI bus: flash, IMU |
+------+--------------+---------------------+
| PC0 | EUSART1_CS | SPI bus: flash |
+------+--------------+---------------------+
| PC4 | I2C0_SCL | I2C bus |
+------+--------------+---------------------+
| PC5 | I2C0_SDA | I2C bus |
+------+--------------+---------------------+
The default configuration can be found in
:zephyr_file:`boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b_defconfig`

13
boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b-pinctrl.dtsi
View file

@ -20,6 +20,19 @@
};
};
eusart1_default: eusart1_default {
group0 {
pins = <EUSART1_TX_PC3>, <EUSART1_SCLK_PC1>;
drive-push-pull;
output-high;
};
group1 {
pins = <EUSART1_RX_PC2>;
input-enable;
silabs,input-filter;
};
};
i2c0_default: i2c0_default {
group0 {
pins = <I2C0_SCL_PC4>, <I2C0_SDA_PC5>;

23
boards/silabs/dev_kits/xg24_dk2601b/xg24_dk2601b.dts
View file

@ -124,6 +124,29 @@
status = "okay";
};
&eusart1 {
compatible = "silabs,eusart-spi";
pinctrl-0 = <&eusart1_default>;
pinctrl-names = "default";
cs-gpios = <&gpioc 0 GPIO_ACTIVE_LOW>;
clock-frequency = <4000000>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
mx25r32: mx25r3235f@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <80000000>;
size = <0x2000000>;
jedec-id = [c2 28 16];
has-dpd;
dpd-wakeup-sequence = <30000 20 35000>;
mxicy,mx25r-power-mode = "low-power";
zephyr,pm-device-runtime-auto;
};
};
&i2c0 {
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";

7
boards/snps/nsim/arc_v/rmx1xx.dtsi
View file

@ -37,6 +37,13 @@
interrupt-names = "soft0", "timer0";
};
mtimer: timer@200bff8 {
compatible = "riscv,machine-timer";
interrupts-extended = <&cpu0_intc 7>;
reg = <0x200bff8 0x8 0x2004000 0x8>;
reg-names = "mtime", "mtimecmp";
};
uart0: serial@10000000{
compatible = "ns16550", "snps,dw-apb-uart";
reg = <0x10000000 0x400>;

6
boards/st/nucleo_f030r8/doc/index.rst
View file

@ -29,7 +29,6 @@ Nucleo F030R8 provides the following hardware components:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@ -50,11 +49,6 @@ Nucleo F030R8 provides the following hardware components:
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32F030R8 can be found here:

6
boards/st/nucleo_f070rb/doc/index.rst
View file

@ -29,7 +29,6 @@ Nucleo F070RB provides the following hardware components:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@ -50,11 +49,6 @@ Nucleo F070RB provides the following hardware components:
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32F070RB can be found in
the `STM32F070 reference manual`_ .

6
boards/st/nucleo_f091rc/doc/index.rst
View file

@ -29,7 +29,6 @@ Nucleo F091RC provides the following hardware components:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@ -50,11 +49,6 @@ Nucleo F091RC provides the following hardware components:
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32F091RC can be found in the
`STM32F091 reference manual`_

6
boards/st/nucleo_f103rb/doc/index.rst
View file

@ -29,7 +29,6 @@ Nucleo F103RB provides the following hardware components:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@ -50,11 +49,6 @@ Nucleo F103RB provides the following hardware components:
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32F103RB can be found here:

6
boards/st/nucleo_f334r8/doc/index.rst
View file

@ -30,7 +30,6 @@ Nucleo F334R8 provides the following hardware components:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@ -51,11 +50,6 @@ Nucleo F334R8 provides the following hardware components:
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32F334R8 can be found in the
`STM32F334 reference manual`_

6
boards/st/nucleo_g070rb/doc/index.rst
View file

@ -33,7 +33,6 @@ Nucleo G070RB provides the following hardware components:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@ -54,11 +53,6 @@ Nucleo G070RB provides the following hardware components:
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32G070RB can be found here:

6
boards/st/nucleo_g071rb/doc/index.rst
View file

@ -33,7 +33,6 @@ Nucleo G071RB provides the following hardware components:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@ -54,11 +53,6 @@ Nucleo G071RB provides the following hardware components:
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32G071RB can be found here:

6
boards/st/nucleo_l011k4/doc/index.rst
View file

@ -28,7 +28,6 @@ Nucleo L011K4 provides the following hardware components:
- Arduino* Nano V3 connectivity
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@ -49,11 +48,6 @@ Nucleo L011K4 provides the following hardware components:
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32L011K4 can be found in the
`STM32L0x1 reference manual`_

6
boards/st/nucleo_l053r8/doc/index.rst
View file

@ -29,7 +29,6 @@ Nucleo L053R8 provides the following hardware components:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@ -50,11 +49,6 @@ Nucleo L053R8 provides the following hardware components:
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32L053R8 can be found in the
`STM32L0x3 reference manual`_

6
boards/st/nucleo_l073rz/doc/index.rst
View file

@ -29,7 +29,6 @@ Nucleo L073RZ provides the following hardware components:
- Arduino* Uno V3 connectivity
- ST morpho extension pin headers for full access to all STM32 I/Os
- ARM* mbed*
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector:
- Selection-mode switch to use the kit as a standalone ST-LINK/V2-1
@ -50,11 +49,6 @@ Nucleo L073RZ provides the following hardware components:
- Mass storage
- Debug port
- Support of wide choice of Integrated Development Environments (IDEs) including:
- IAR
- ARM Keil
- GCC-based IDEs
More information about STM32L073RZ can be found in the
`STM32L0x3 reference manual`_

2
boards/st/nucleo_wl55jc/doc/nucleo_wl55jc.rst
View file

@ -33,8 +33,6 @@ power consumption, and features.
mass storage, Virtual COM port, and debug port
- Comprehensive free software libraries and examples available with the
STM32CubeWL MCU Package
- Support of a wide choice of Integrated Development Environments (IDEs)
including IAR Embedded Workbench®, MDK-ARM, and STM32CubeIDE
- Suitable for rapid prototyping of end nodes based on LoRaWAN, Sigfox, wM-Bus,
and many other proprietary protocols
- Fully open hardware platform

1
boards/ti/cc1352p7_launchpad/cc1352p7_lp.yaml
View file

@ -13,4 +13,5 @@ supported:
- spi
- watchdog
- hwinfo
- netif:openthread
vendor: ti

2
boards/ti/sk_am62/doc/index.rst
View file

@ -46,6 +46,8 @@ The sk_am62 configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| UART | on-chip | serial |
+-----------+------------+-------------------------------------+
| Mailbox | on-chip | IPC Mailbox |
+-----------+------------+-------------------------------------+
Other hardware features are not currently supported by the port.

2
boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_appcpu.dts
View file

@ -5,7 +5,7 @@
/dts-v1/;
#include <espressif/esp32s3/esp32s3_r2.dtsi>
#include <espressif/partitions_0x0_amp.dtsi>
#include <espressif/partitions_0x0_amp_16M.dtsi>
/ {
model = "ESP32-S3-Touch-LCD-1.28 APPCPU";

2
boards/waveshare/esp32s3_touch_lcd_1_28/esp32s3_touch_lcd_1_28_esp32s3_procpu.dts
View file

@ -9,7 +9,7 @@
#include <zephyr/dt-bindings/display/panel.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include <zephyr/dt-bindings/pwm/pwm.h>
#include <espressif/partitions_0x0_amp.dtsi>
#include <espressif/partitions_0x0_amp_16M.dtsi>
/ {
model = "ESP32-S3-Touch-LCD-1.28 PROCPU";

2
boards/wemos/esp32s2_lolin_mini/esp32s2_lolin_mini.dts
View file

@ -22,7 +22,7 @@
};
chosen {
zephyr,sram = &sram0;
zephyr,sram = &sram1;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,flash = &flash0;

21
cmake/mcuboot.cmake
View file

@ -1,4 +1,4 @@
# Copyright (c) 2020-2023 Nordic Semiconductor ASA
# Copyright (c) 2020-2025 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
# This file includes extra build system logic that is enabled when
@ -52,23 +52,8 @@ function(zephyr_mcuboot_tasks)
endif()
endforeach()
# Find imgtool. Even though west is installed, imgtool might not be.
# The user may also have a custom manifest which doesn't include
# MCUboot.
#
# Therefore, go with an explicitly installed imgtool first, falling
# back on mcuboot/scripts/imgtool.py.
if(IMGTOOL)
set(imgtool_path "${IMGTOOL}")
elseif(DEFINED ZEPHYR_MCUBOOT_MODULE_DIR)
set(IMGTOOL_PY "${ZEPHYR_MCUBOOT_MODULE_DIR}/scripts/imgtool.py")
if(EXISTS "${IMGTOOL_PY}")
set(imgtool_path "${IMGTOOL_PY}")
endif()
endif()
# No imgtool, no signed binaries.
if(NOT DEFINED imgtool_path)
if(NOT DEFINED IMGTOOL)
message(FATAL_ERROR "Can't sign images for MCUboot: can't find imgtool. To fix, install imgtool with pip3, or add the mcuboot repository to the west manifest and ensure it has a scripts/imgtool.py file.")
return()
endif()
@ -94,7 +79,7 @@ function(zephyr_mcuboot_tasks)
endif()
# Basic 'imgtool sign' command with known image information.
set(imgtool_sign ${PYTHON_EXECUTABLE} ${imgtool_path} sign
set(imgtool_sign ${PYTHON_EXECUTABLE} ${IMGTOOL} sign
--version ${CONFIG_MCUBOOT_IMGTOOL_SIGN_VERSION} --header-size ${CONFIG_ROM_START_OFFSET}
--slot-size ${slot_size})

7
cmake/modules/FindHostTools.cmake
View file

@ -61,9 +61,10 @@ find_program(OPENOCD openocd)
# bossac is an optional dependency
find_program(BOSSAC bossac)
# imgtool is an optional dependency (the build may also fall back to scripts/imgtool.py
# in the mcuboot repository if that's present in some cases)
find_program(IMGTOOL imgtool)
# imgtool is an optional dependency (prefer the version that is in the mcuboot repository, if
# present and a user has not specified a different version)
zephyr_get(IMGTOOL SYSBUILD LOCAL)
find_program(IMGTOOL imgtool.py HINTS ${ZEPHYR_MCUBOOT_MODULE_DIR}/scripts/ NAMES imgtool NAMES_PER_DIR)
# winpty is an optional dependency
find_program(PTY_INTERFACE winpty)

6
cmake/modules/extensions.cmake
View file

@ -5202,7 +5202,11 @@ function(zephyr_iterable_section)
endif()
if(SECTION_NUMERIC)
set(INPUT "._${SECTION_NAME}.static.*_?_*;._${SECTION_NAME}.static.*_??_*")
set(INPUT "._${SECTION_NAME}.static.*_?_*;"
"._${SECTION_NAME}.static.*_??_*;"
"._${SECTION_NAME}.static.*_???_*;"
"._${SECTION_NAME}.static.*_????_*;"
"._${SECTION_NAME}.static.*_?????_*")
else()
set(INPUT "._${SECTION_NAME}.static.*")
endif()

2
cmake/modules/version.cmake
View file

@ -63,7 +63,7 @@ foreach(type file IN ZIP_LISTS VERSION_TYPE VERSION_FILE)
string(REGEX MATCH "VERSION_TWEAK = ([0-9]*)" _ ${ver})
set(${type}_VERSION_TWEAK ${CMAKE_MATCH_1})
string(REGEX MATCH "EXTRAVERSION = ([a-z0-9]*)" _ ${ver})
string(REGEX MATCH "EXTRAVERSION = ([a-z0-9\.\-]*)" _ ${ver})
set(${type}_VERSION_EXTRA ${CMAKE_MATCH_1})
# Validate all version fields fit in a single byte

94
doc/build/version/index.rst vendored
View file

@ -39,19 +39,19 @@ field to a single byte (note that there may be further restrictions depending up
is used for, e.g. bootloaders might only support some of these fields or might place limits on the
maximum values of fields):
+---------------+----------------------------------------+
+---------------+-------------------------------------------------------+
| Field | Data type |
+---------------+----------------------------------------+
+---------------+-------------------------------------------------------+
| VERSION_MAJOR | Numerical (0-255) |
+---------------+----------------------------------------+
+---------------+-------------------------------------------------------+
| VERSION_MINOR | Numerical (0-255) |
+---------------+----------------------------------------+
+---------------+-------------------------------------------------------+
| PATCHLEVEL | Numerical (0-255) |
+---------------+----------------------------------------+
+---------------+-------------------------------------------------------+
| VERSION_TWEAK | Numerical (0-255) |
+---------------+----------------------------------------+
| EXTRAVERSION | Alphanumerical (Lowercase a-z and 0-9) |
+---------------+----------------------------------------+
+---------------+-------------------------------------------------------+
| EXTRAVERSION | Alphanumerical (Lowercase a-z and 0-9) and "." or "-" |
+---------------+-------------------------------------------------------+
When an application is configured using CMake, the version file will be automatically processed,
and will be checked automatically each time the version is changed, so CMake does not need to be
@ -65,7 +65,7 @@ For the sections below, examples are provided for the following :file:`VERSION`
VERSION_MINOR = 2
PATCHLEVEL = 3
VERSION_TWEAK = 4
EXTRAVERSION = unstable
EXTRAVERSION = unstable.5
Use in code
===========
@ -74,120 +74,120 @@ To use the version information in application code, the version file must be inc
fields can be freely used. The include file name is :file:`app_version.h` (no path is needed), the
following defines are available:
+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
+-----------------------------+-------------------+------------------------------------------------------+---------------------------+
| Define | Type | Field(s) | Example |
+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
+-----------------------------+-------------------+------------------------------------------------------+---------------------------+
| APPVERSION | Numerical | ``VERSION_MAJOR`` (left shifted by 24 bits), |br| | 0x1020304 |
| | | ``VERSION_MINOR`` (left shifted by 16 bits), |br| | |
| | | ``PATCHLEVEL`` (left shifted by 8 bits), |br| | |
| | | ``VERSION_TWEAK`` | |
+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
+-----------------------------+-------------------+------------------------------------------------------+---------------------------+
| APP_VERSION_NUMBER | Numerical | ``VERSION_MAJOR`` (left shifted by 16 bits), |br| | 0x10203 |
| | | ``VERSION_MINOR`` (left shifted by 8 bits), |br| | |
| | | ``PATCHLEVEL`` | |
+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
+-----------------------------+-------------------+------------------------------------------------------+---------------------------+
| APP_VERSION_MAJOR | Numerical | ``VERSION_MAJOR`` | 1 |
+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
+-----------------------------+-------------------+------------------------------------------------------+---------------------------+
| APP_VERSION_MINOR | Numerical | ``VERSION_MINOR`` | 2 |
+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
+-----------------------------+-------------------+------------------------------------------------------+---------------------------+
| APP_PATCHLEVEL | Numerical | ``PATCHLEVEL`` | 3 |
+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
+-----------------------------+-------------------+------------------------------------------------------+---------------------------+
| APP_TWEAK | Numerical | ``VERSION_TWEAK`` | 4 |
+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
| APP_VERSION_STRING | String (quoted) | ``VERSION_MAJOR``, |br| | "1.2.3-unstable" |
+-----------------------------+-------------------+------------------------------------------------------+---------------------------+
| APP_VERSION_STRING | String (quoted) | ``VERSION_MAJOR``, |br| | "1.2.3-unstable.5" |
| | | ``VERSION_MINOR``, |br| | |
| | | ``PATCHLEVEL``, |br| | |
| | | ``EXTRAVERSION`` |br| | |
+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
| APP_VERSION_EXTENDED_STRING | String (quoted) | ``VERSION_MAJOR``, |br| | "1.2.3-unstable+4" |
+-----------------------------+-------------------+------------------------------------------------------+---------------------------+
| APP_VERSION_EXTENDED_STRING | String (quoted) | ``VERSION_MAJOR``, |br| | "1.2.3-unstable.5+4" |
| | | ``VERSION_MINOR``, |br| | |
| | | ``PATCHLEVEL``, |br| | |
| | | ``EXTRAVERSION`` |br| | |
| | | ``VERSION_TWEAK`` |br| | |
+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
+-----------------------------+-------------------+------------------------------------------------------+---------------------------+
| APP_VERSION_TWEAK_STRING | String (quoted) | ``VERSION_MAJOR``, |br| | "1.2.3+4" |
| | | ``VERSION_MINOR``, |br| | |
| | | ``PATCHLEVEL``, |br| | |
| | | ``VERSION_TWEAK`` |br| | |
+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
+-----------------------------+-------------------+------------------------------------------------------+---------------------------+
| APP_BUILD_VERSION | String (unquoted) | None (value of ``git describe --abbrev=12 --always`` | v3.3.0-18-g2c85d9224fca |
| | | from application repository) | |
+-----------------------------+-------------------+------------------------------------------------------+-------------------------+
+-----------------------------+-------------------+------------------------------------------------------+---------------------------+
Use in Kconfig
==============
The following variables are available for usage in Kconfig files:
+--------------------------------+-----------+--------------------------+------------------+
+--------------------------------+-----------+--------------------------+--------------------+
| Variable | Type | Field(s) | Example |
+--------------------------------+-----------+--------------------------+------------------+
+--------------------------------+-----------+--------------------------+--------------------+
| $(VERSION_MAJOR) | Numerical | ``VERSION_MAJOR`` | 1 |
+--------------------------------+-----------+--------------------------+------------------+
+--------------------------------+-----------+--------------------------+--------------------+
| $(VERSION_MINOR) | Numerical | ``VERSION_MINOR`` | 2 |
+--------------------------------+-----------+--------------------------+------------------+
+--------------------------------+-----------+--------------------------+--------------------+
| $(PATCHLEVEL) | Numerical | ``PATCHLEVEL`` | 3 |
+--------------------------------+-----------+--------------------------+------------------+
+--------------------------------+-----------+--------------------------+--------------------+
| $(VERSION_TWEAK) | Numerical | ``VERSION_TWEAK`` | 4 |
+--------------------------------+-----------+--------------------------+------------------+
| $(APPVERSION) | String | ``VERSION_MAJOR``, |br| | 1.2.3-unstable |
+--------------------------------+-----------+--------------------------+--------------------+
| $(APPVERSION) | String | ``VERSION_MAJOR``, |br| | 1.2.3-unstable.5 |
| | | ``VERSION_MINOR``, |br| | |
| | | ``PATCHLEVEL``, |br| | |
| | | ``EXTRAVERSION`` | |
+--------------------------------+-----------+--------------------------+------------------+
| $(APP_VERSION_EXTENDED_STRING) | String | ``VERSION_MAJOR``, |br| | 1.2.3-unstable+4 |
+--------------------------------+-----------+--------------------------+--------------------+
| $(APP_VERSION_EXTENDED_STRING) | String | ``VERSION_MAJOR``, |br| | 1.2.3-unstable.5+4 |
| | | ``VERSION_MINOR``, |br| | |
| | | ``PATCHLEVEL``, |br| | |
| | | ``EXTRAVERSION``, |br| | |
| | | ``VERSION_TWEAK`` | |
+--------------------------------+-----------+--------------------------+------------------+
+--------------------------------+-----------+--------------------------+--------------------+
| $(APP_VERSION_TWEAK_STRING) | String | ``VERSION_MAJOR``, |br| | 1.2.3+4 |
| | | ``VERSION_MINOR``, |br| | |
| | | ``PATCHLEVEL``, |br| | |
| | | ``VERSION_TWEAK`` | |
+--------------------------------+-----------+--------------------------+------------------+
+--------------------------------+-----------+--------------------------+--------------------+
Use in CMake
============
The following variable are available for usage in CMake files:
+-----------------------------+-----------------+---------------------------------------------------+------------------+
+-----------------------------+-----------------+---------------------------------------------------+--------------------+
| Variable | Type | Field(s) | Example |
+-----------------------------+-----------------+---------------------------------------------------+------------------+
+-----------------------------+-----------------+---------------------------------------------------+--------------------+
| APPVERSION | Numerical (hex) | ``VERSION_MAJOR`` (left shifted by 24 bits), |br| | 0x1020304 |
| | | ``VERSION_MINOR`` (left shifted by 16 bits), |br| | |
| | | ``PATCHLEVEL`` (left shifted by 8 bits), |br| | |
| | | ``VERSION_TWEAK`` | |
+-----------------------------+-----------------+---------------------------------------------------+------------------+
+-----------------------------+-----------------+---------------------------------------------------+--------------------+
| APP_VERSION_NUMBER | Numerical (hex) | ``VERSION_MAJOR`` (left shifted by 16 bits), |br| | 0x10203 |
| | | ``VERSION_MINOR`` (left shifted by 8 bits), |br| | |
| | | ``PATCHLEVEL`` | |
+-----------------------------+-----------------+---------------------------------------------------+------------------+
+-----------------------------+-----------------+---------------------------------------------------+--------------------+
| APP_VERSION_MAJOR | Numerical | ``VERSION_MAJOR`` | 1 |
+-----------------------------+-----------------+---------------------------------------------------+------------------+
+-----------------------------+-----------------+---------------------------------------------------+--------------------+
| APP_VERSION_MINOR | Numerical | ``VERSION_MINOR`` | 2 |
+-----------------------------+-----------------+---------------------------------------------------+------------------+
+-----------------------------+-----------------+---------------------------------------------------+--------------------+
| APP_PATCHLEVEL | Numerical | ``PATCHLEVEL`` | 3 |
+-----------------------------+-----------------+---------------------------------------------------+------------------+
+-----------------------------+-----------------+---------------------------------------------------+--------------------+
| APP_VERSION_TWEAK | Numerical | ``VERSION_TWEAK`` | 4 |
+-----------------------------+-----------------+---------------------------------------------------+------------------+
| APP_VERSION_STRING | String | ``VERSION_MAJOR``, |br| | 1.2.3-unstable |
+-----------------------------+-----------------+---------------------------------------------------+--------------------+
| APP_VERSION_STRING | String | ``VERSION_MAJOR``, |br| | 1.2.3-unstable.5 |
| | | ``VERSION_MINOR``, |br| | |
| | | ``PATCHLEVEL``, |br| | |
| | | ``EXTRAVERSION`` | |
+-----------------------------+-----------------+---------------------------------------------------+------------------+
| APP_VERSION_EXTENDED_STRING | String | ``VERSION_MAJOR``, |br| | 1.2.3-unstable+4 |
+-----------------------------+-----------------+---------------------------------------------------+--------------------+
| APP_VERSION_EXTENDED_STRING | String | ``VERSION_MAJOR``, |br| | 1.2.3-unstable.5+4 |
| | | ``VERSION_MINOR``, |br| | |
| | | ``PATCHLEVEL``, |br| | |
| | | ``EXTRAVERSION``, |br| | |
| | | ``VERSION_TWEAK`` | |
+-----------------------------+-----------------+---------------------------------------------------+------------------+
+-----------------------------+-----------------+---------------------------------------------------+--------------------+
| APP_VERSION_TWEAK_STRING | String | ``VERSION_MAJOR``, |br| | 1.2.3+4 |
| | | ``VERSION_MINOR``, |br| | |
| | | ``PATCHLEVEL``, |br| | |
| | | ``VERSION_TWEAK`` | |
+-----------------------------+-----------------+---------------------------------------------------+------------------+
+-----------------------------+-----------------+---------------------------------------------------+--------------------+
Use in MCUboot-supported applications
=====================================

76
doc/contribute/contributor_expectations.rst
View file

@ -322,79 +322,3 @@ the steps below:
.. _Architecture Project: https://github.com/zephyrproject-rtos/zephyr/projects/18
.. _Architecture Working Group: https://github.com/zephyrproject-rtos/zephyr/wiki/Architecture-Working-Group
.. _reviewer-expectations:
Reviewer Expectations
*********************
- Be respectful when commenting on PRs. Refer to the Zephyr `Code of Conduct`_
for more details.
- The Zephyr Project recognizes that reviewers and maintainers have limited
bandwidth. As a reviewer, prioritize review requests in the following order:
#. PRs related to items in the `Zephyr Release Plan`_ or those targeting
the next release during the stabilization period (after RC1).
#. PRs where the reviewer has requested blocking changes.
#. PRs assigned to the reviewer as the area maintainer.
#. All other PRs.
- Reviewers shall strive to advance the PR to a mergeable state with their
feedback and engagement with the PR author.
- Try to provide feedback on the entire PR in one shot. This provides the
contributor an opportunity to address all comments in the next PR update.
- Partial reviews are permitted, but the reviewer must add a comment indicating
what portion of the PR they reviewed. Examples of useful partial reviews
include:
- Domain specific reviews (e.g. Devicetree).
- Code style changes that impact the readability of the PR.
- Reviewing commits separately when the requested changes cascade into the
later commits.
- Avoid increasing scope of the PR by requesting new features, especially when
there is a corresponding :ref:`RFC <rfcs>` associated with the PR. Instead,
reviewers should add suggestions as a comment to the :ref:`RFC <rfcs>`. This
also encourages more collaboration as it is easier for multiple contributors
to work on a feature once the minimum implementation has merged.
- When using the "Request Changes" option, mark trivial, non-functional,
requests as "Non-blocking" in the comment. Reviewers should approve PRs once
only non-blocking changes remain. The PR author has discretion as to whether
they address all non-blocking comments. PR authors should acknowledge every
review comment in some way, even if it's just with an emoticon.
- Style changes that the reviewer disagrees with but that are not documented as
part of the project can be pointed out as non-blocking, but cannot constitute
a reason for a request for changes. The reviewer can optionally correct any
potential inconsistencies in the tree, document the new guidelines or rules,
and then enforce them as part of the review.
- Whenever requesting style related changes, reviewers should be able to point
out the corresponding guideline, rule or rationale in the project's
documentation. This does not apply to certain types of requests for changes,
notably those specific to the changes being submitted (e.g. the use of a
particular data structure or the choice of locking primitives).
- Reviewers shall be *clear* about what changes they are requesting when the
"Request Changes" option is used. Requested changes shall be in the scope of
the PR in question and following the contribution and style guidelines of the
project. Furthermore, reviewers must be able to point back to the exact issues
in the PR that triggered a request for changes.
- Reviewers should not request changes for issues which are automatically
caught by CI, as this causes the pull request to remain blocked even after CI
failures have been addressed and may unnecessarily delay it from being merged.
- Reviewers shall not close a PR due to technical or structural disagreement.
If requested changes cannot be resolved within the review process, the
:ref:`pr_technical_escalation` path shall be used for any potential resolution
path, which may include closing the PR.
.. _Code of Conduct: https://github.com/zephyrproject-rtos/zephyr/blob/main/CODE_OF_CONDUCT.md
.. _Zephyr Release Plan: https://github.com/orgs/zephyrproject-rtos/projects/13

221
doc/contribute/guidelines.rst
View file

@ -12,6 +12,34 @@ This document explains how to participate in project conversations, log bugs
and enhancement requests, and submit patches to the project so your patch will
be accepted quickly in the codebase.
Prerequisites
*************
.. _Zephyr Project website: https://zephyrproject.org
As a contributor, you'll want to be familiar with the Zephyr project, how to
configure, install, and use it as explained in the `Zephyr Project website`_
and how to set up your development environment as introduced in the Zephyr
:ref:`getting_started`.
You should be familiar with common developer tools such as Git and CMake, and
platforms such as GitHub.
If you haven't already done so, you'll need to create a (free) GitHub account
on https://github.com and have Git tools available on your development system.
.. note::
The Zephyr development workflow supports all 3 major operating systems
(Linux, macOS, and Windows) but some of the tools used in the sections below
are only available on Linux and macOS. On Windows, instead of running these
tools yourself, you will need to rely on the Continuous Integration (CI)
service using Github Actions, which runs automatically on GitHub when you submit
your Pull Request (PR). You can see any failure results in the workflow
details link near the end of the PR conversation list. See
`Continuous Integration`_ for more information
.. _licensing_requirements:
Licensing
@ -156,54 +184,6 @@ Additional requirements:
- If you are altering an existing commit created by someone else, you must add
your Signed-off-by: line without removing the existing one.
- If you forget to add the Signed-off-by: line, you can add it to your previous
commit by running ``git commit --amend -s``.
- If you've pushed your changes to GitHub already you'll need to force push
your branch after this with ``git push -f``.
Notes
=====
Any contributions made as part of submitted pull requests are considered free
for the Project to use. Developers are permitted to cherry-pick patches that
are included in pull requests submitted by other contributors. It is expected
that
* the content of the patches will not be substantially modified,
* the cherry-picked commits or portions of a commit shall preserve the original
sign-off messages and the author identity.
:ref:`modifying_contributions` describes additional recommended policies
around working with contributions submitted by other developers.
Prerequisites
*************
.. _Zephyr Project website: https://zephyrproject.org
As a contributor, you'll want to be familiar with the Zephyr project, how to
configure, install, and use it as explained in the `Zephyr Project website`_
and how to set up your development environment as introduced in the Zephyr
:ref:`getting_started`.
You should be familiar with common developer tools such as Git and CMake, and
platforms such as GitHub.
If you haven't already done so, you'll need to create a (free) GitHub account
on https://github.com and have Git tools available on your development system.
.. note::
The Zephyr development workflow supports all 3 major operating systems
(Linux, macOS, and Windows) but some of the tools used in the sections below
are only available on Linux and macOS. On Windows, instead of running these
tools yourself, you will need to rely on the Continuous Integration (CI)
service using Github Actions, which runs automatically on GitHub when you submit
your Pull Request (PR). You can see any failure results in the workflow
details link near the end of the PR conversation list. See
`Continuous Integration`_ for more information
.. _source_tree_v2:
Source Tree Structure
@ -390,11 +370,6 @@ this:
You need to change text in square brackets (``[like this]``) above to
fit your commit.
Examples and more details follow.
Example
-------
Here is an example of a good commit message.
.. code-block:: none
@ -531,146 +506,6 @@ reference manuals, etc.
Link: https://github.com/zephyrproject-rtos/zephyr/issues/<issue number>
.. _coding_style:
Coding Style
============
.. note::
Coding style is enforced on any new or modified code, but contributors are
not expected to correct the style on existing code that they are not
modifying.
.. note::
For style aspects where the guidelines don't offer explicit guidance or
permit multiple valid ways to express something, contributors should follow
the style of existing code in the tree, with higher importance given to
"nearby" code (first look at the function, then the same file, then
subsystem, etc).
.. _Linux kernel coding style:
https://kernel.org/doc/html/latest/process/coding-style.html
.. _snake case:
https://en.wikipedia.org/wiki/Snake_case
In general, follow the `Linux kernel coding style`_, with the following
exceptions and clarifications:
* Use `snake case`_ for code and variables.
* The line length is 100 columns or fewer. In the documentation, longer lines
for URL references are an allowed exception.
* Add braces to every ``if``, ``else``, ``do``, ``while``, ``for`` and
``switch`` body, even for single-line code blocks.
* Use spaces instead of tabs to align comments after declarations, as needed.
* Use C89-style single line comments, ``/* */``. The C99-style single line
comment, ``//``, is not allowed.
* Use ``/** */`` for doxygen comments that need to appear in the documentation.
* Avoid using binary literals (constants starting with ``0b``).
* Avoid using non-ASCII symbols in code, unless it significantly improves
clarity, avoid emojis in any case.
* Use proper capitalization of nouns in code comments (e.g. ``UART`` and not
``uart``, ``CMake`` and not ``cmake``).
Beyond C code, the following coding style rules apply to other types of files:
* CMake
* Indent with spaces, indentation is two spaces.
* Don't use space between commands (e.g. ``if``) and the corresponding opening
bracket (e.g. ``(``).
* Devicetree
* Indent with tabs.
* Follow the Devicetree specification conventions and rules.
* Use dashes (``-``) as word separators for node and property names.
* Use underscores (``_``) as word separators in node labels.
* Leave a single space on each side of the equal sign (``=``) in property
definitions.
* Don't insert empty lines before a dedenting ``};``.
* Insert a single empty line to separate nodes at the same hierarchy level.
* Kconfig
* Line length of 100 columns or fewer.
* Indent with tabs, except for ``help`` entry text which should be placed at
one tab plus two extra spaces.
* Leave a single empty line between option declarations.
* Use Statements like ``select`` carefully, see
:ref:`kconfig_tips_and_tricks` for more information.
* Format comments as ``# Comment`` rather than ``#Comment``
* Insert an empty line before/after each top-level ``if`` and ``endif``
Use these coding guidelines to ensure that your development complies with the
project's style and naming conventions.
The Linux kernel GPL-licensed tool ``checkpatch`` is used to check
coding style conformity.
.. note::
checkpatch does not currently run on Windows.
Checkpatch is available in the scripts directory. To invoke it when committing
code, make the file *$ZEPHYR_BASE/.git/hooks/pre-commit* executable and edit
it to contain:
.. code-block:: bash
#!/bin/sh
set -e exec
exec git diff --cached | ${ZEPHYR_BASE}/scripts/checkpatch.pl -
Instead of running checkpatch at each commit, you may prefer to run it only
before pushing on zephyr repo. To do this, make the file
*$ZEPHYR_BASE/.git/hooks/pre-push* executable and edit it to contain:
.. code-block:: bash
#!/bin/sh
remote="$1"
url="$2"
z40=0000000000000000000000000000000000000000
echo "Run push hook"
while read local_ref local_sha remote_ref remote_sha
do
args="$remote $url $local_ref $local_sha $remote_ref $remote_sha"
exec ${ZEPHYR_BASE}/scripts/series-push-hook.sh $args
done
exit 0
If you want to override checkpatch verdict and push you branch despite reported
issues, you can add option --no-verify to the git push command.
A more complete alternative to this is using :ref:`check_compliance_py` script.
clang-format
------------
The `clang-format tool <https://clang.llvm.org/docs/ClangFormat.html>`_ can
be helpful to quickly reformat large amounts of new source code to our
`Coding Style`_ standards together with the ``.clang-format`` configuration file
provided in the repository. ``clang-format`` is well integrated into most
editors, but you can also run it manually like this:
.. code-block:: bash
clang-format -i my_source_file.c
``clang-format`` is part of LLVM, which can be downloaded from the project
`releases page <https://github.com/llvm/llvm-project/releases>`_. Note that if
you are a Linux user, ``clang-format`` will likely be available as a package in
your distribution repositories.
When there are differences between the `Coding Style`_ guidelines and the
formatting generated by code formatting tools, the `Coding Style`_ guidelines
take precedence. If there is ambiguity between formatting tools and the
guidelines, maintainers may decide which style should be adopted.
.. _Continuous Integration:
Continuous Integration (CI)

32
doc/contribute/index.rst
View file

@ -15,9 +15,13 @@ General Guidelines
:hidden:
guidelines.rst
coding_guidelines/index.rst
proposals_and_rfcs.rst
contributor_expectations.rst
reviewer_expectations.rst
coding_guidelines/index.rst
style_guidelines.rst
proposals_and_rfcs.rst
modifying_contributions.rst
:ref:`contribute_guidelines`
Learn about the overall process and guidelines for contributing to the Zephyr project.
@ -30,17 +34,26 @@ General Guidelines
This document is another mandatory read that describes the expected behavior of *all*
contributors to the project.
:ref:`reviewer-expectations`
This document is another mandatory read that describes the expected behavior when revieweing
contributions to the project.
:ref:`coding_guidelines`
Code contributions are expected to follow a set of coding guidelines to ensure consistency and
readability across the code base.
This page describes these guidelines and introduces important considerations regarding the use of
:ref:`inclusive language <coding_guideline_inclusive_language>`.
:ref:`coding_style`
Code contributions are expected to follow a set of style guidelines to ensure consistency and
readability across the code base.
:ref:`rfcs`
Learn when and how to submit RFCs (Request for Comments) for new features and changes to the
project.
:ref:`modifying_contributions`
Guidelines for modifying contributions made by other developers and how to deal with stale pull
requests.
Documentation
=============
@ -88,16 +101,6 @@ Dealing with external components
in binary form, this page describes the process and guidelines for :ref:`contributing binary
blobs <blobs-process>` to the project.
Zephyr Contributor Badge
========================
When your first contribution to the Zephyr project gets merged, you'll become eligible to claim your
Zephyr Contributor Badge. This digital badge can be displayed on your website, blog, social media
profile, etc. It will allow you to showcase your involvement in the Zephyr project and help raise
its awareness.
You may apply for your Contributor Badge by filling out the `Zephyr Contributor Badge form`_.
Need help along the way?
========================
@ -107,4 +110,3 @@ You may join our Discord_ channel or use the `Developer Mailing List`_.
.. _Discord: https://chat.zephyrproject.org
.. _Developer Mailing List: https://lists.zephyrproject.org/g/devel
.. _Zephyr Contributor Badge form: https://forms.gle/oCw9iAPLhUsHTapc8

0
doc/project/modifying_contributions.rst → doc/contribute/modifying_contributions.rst
View file

74
doc/contribute/reviewer_expectations.rst Normal file
View file

@ -0,0 +1,74 @@
.. _reviewer-expectations:
Reviewer Expectations
#####################
- Be respectful when commenting on PRs. Refer to the Zephyr `Code of Conduct`_
for more details.
- The Zephyr Project recognizes that reviewers and maintainers have limited
bandwidth. As a reviewer, prioritize review requests in the following order:
#. PRs related to items in the `Zephyr Release Plan`_ or those targeting
the next release during the stabilization period (after RC1).
#. PRs where the reviewer has requested blocking changes.
#. PRs assigned to the reviewer as the area maintainer.
#. All other PRs.
- Reviewers shall strive to advance the PR to a mergeable state with their
feedback and engagement with the PR author.
- Try to provide feedback on the entire PR in one shot. This provides the
contributor an opportunity to address all comments in the next PR update.
- Partial reviews are permitted, but the reviewer must add a comment indicating
what portion of the PR they reviewed. Examples of useful partial reviews
include:
- Domain specific reviews (e.g. Devicetree).
- Code style changes that impact the readability of the PR.
- Reviewing commits separately when the requested changes cascade into the
later commits.
- Avoid increasing scope of the PR by requesting new features, especially when
there is a corresponding :ref:`RFC <rfcs>` associated with the PR. Instead,
reviewers should add suggestions as a comment to the :ref:`RFC <rfcs>`. This
also encourages more collaboration as it is easier for multiple contributors
to work on a feature once the minimum implementation has merged.
- When using the "Request Changes" option, mark trivial, non-functional,
requests as "Non-blocking" in the comment. Reviewers should approve PRs once
only non-blocking changes remain. The PR author has discretion as to whether
they address all non-blocking comments. PR authors should acknowledge every
review comment in some way, even if it's just with an emoticon.
- Style changes that the reviewer disagrees with but that are not documented as
part of the project can be pointed out as non-blocking, but cannot constitute
a reason for a request for changes. The reviewer can optionally correct any
potential inconsistencies in the tree, document the new guidelines or rules,
and then enforce them as part of the review.
- Whenever requesting style related changes, reviewers should be able to point
out the corresponding guideline, rule or rationale in the project's
documentation. This does not apply to certain types of requests for changes,
notably those specific to the changes being submitted (e.g. the use of a
particular data structure or the choice of locking primitives).
- Reviewers shall be *clear* about what changes they are requesting when the
"Request Changes" option is used. Requested changes shall be in the scope of
the PR in question and following the contribution and style guidelines of the
project. Furthermore, reviewers must be able to point back to the exact issues
in the PR that triggered a request for changes.
- Reviewers should not request changes for issues which are automatically
caught by CI, as this causes the pull request to remain blocked even after CI
failures have been addressed and may unnecessarily delay it from being merged.
- Reviewers shall not close a PR due to technical or structural disagreement.
If requested changes cannot be resolved within the review process, the
:ref:`pr_technical_escalation` path shall be used for any potential resolution
path, which may include closing the PR.
.. _Code of Conduct: https://github.com/zephyrproject-rtos/zephyr/blob/main/CODE_OF_CONDUCT.md
.. _Zephyr Release Plan: https://github.com/orgs/zephyrproject-rtos/projects/13

150
doc/contribute/style_guidelines.rst Normal file
View file

@ -0,0 +1,150 @@
.. _coding_style:
Coding Style Guidelines
#######################
C Code and General Style
************************
Coding style is enforced on any new or modified code, but contributors are
not expected to correct the style on existing code that they are not
modifying.
For style aspects where the guidelines don't offer explicit guidance or
permit multiple valid ways to express something, contributors should follow
the style of existing code in the tree, with higher importance given to
"nearby" code (first look at the function, then the same file, then
subsystem, etc).
In general, follow the `Linux kernel coding style`_, with the following
exceptions and clarifications:
* Use `snake case`_ for code and variables.
* The line length is 100 columns or fewer. In the documentation, longer lines
for URL references are an allowed exception.
* Add braces to every ``if``, ``else``, ``do``, ``while``, ``for`` and
``switch`` body, even for single-line code blocks.
* Use spaces instead of tabs to align comments after declarations, as needed.
* Use C89-style single line comments, ``/* */``. The C99-style single line
comment, ``//``, is not allowed.
* Use ``/** */`` for doxygen comments that need to appear in the documentation.
* Avoid using binary literals (constants starting with ``0b``).
* Avoid using non-ASCII symbols in code, unless it significantly improves
clarity, avoid emojis in any case.
* Use proper capitalization of nouns in code comments (e.g. ``UART`` and not
``uart``, ``CMake`` and not ``cmake``).
Beyond C code, the following coding style rules apply to other types of files:
CMake
*****
* Indent with spaces, indentation is two spaces.
* Don't use space between commands (e.g. ``if``) and the corresponding opening
bracket (e.g. ``(``).
Devicetree
**********
* Indent with tabs.
* Follow the Devicetree specification conventions and rules.
* Use dashes (``-``) as word separators for node and property names.
* Use underscores (``_``) as word separators in node labels.
* Leave a single space on each side of the equal sign (``=``) in property
definitions.
* Don't insert empty lines before a dedenting ``};``.
* Insert a single empty line to separate nodes at the same hierarchy level.
Kconfig
*******
* Line length of 100 columns or fewer.
* Indent with tabs, except for ``help`` entry text which should be placed at
one tab plus two extra spaces.
* Leave a single empty line between option declarations.
* Use Statements like ``select`` carefully, see
:ref:`kconfig_tips_and_tricks` for more information.
* Format comments as ``# Comment`` rather than ``#Comment``
* Insert an empty line before/after each top-level ``if`` and ``endif``
statement.
Style Tools
***********
Checkpatch
==========
The Linux kernel GPL-licensed tool ``checkpatch`` is used to check
coding style conformity.
.. note::
checkpatch does not currently run on Windows.
Checkpatch is available in the scripts directory. To invoke it when committing
code, make the file *$ZEPHYR_BASE/.git/hooks/pre-commit* executable and edit
it to contain:
.. code-block:: bash
#!/bin/sh
set -e exec
exec git diff --cached | ${ZEPHYR_BASE}/scripts/checkpatch.pl -
Instead of running checkpatch at each commit, you may prefer to run it only
before pushing on zephyr repo. To do this, make the file
*$ZEPHYR_BASE/.git/hooks/pre-push* executable and edit it to contain:
.. code-block:: bash
#!/bin/sh
remote="$1"
url="$2"
z40=0000000000000000000000000000000000000000
echo "Run push hook"
while read local_ref local_sha remote_ref remote_sha
do
args="$remote $url $local_ref $local_sha $remote_ref $remote_sha"
exec ${ZEPHYR_BASE}/scripts/series-push-hook.sh $args
done
exit 0
If you want to override checkpatch verdict and push you branch despite reported
issues, you can add option --no-verify to the git push command.
A different way for running ``checkpatch`` is by using :ref:`check_compliance_py`
script, which does additional style and compliance related checks.
clang-format
============
The `clang-format tool <https://clang.llvm.org/docs/ClangFormat.html>`_ can
be helpful to quickly reformat large amounts of new source code to our
`Coding Style Guidelines`_ standards together with the ``.clang-format`` configuration file
provided in the repository. ``clang-format`` is well integrated into most
editors, but you can also run it manually like this:
.. code-block:: bash
clang-format -i my_source_file.c
``clang-format`` is part of LLVM, which can be downloaded from the project
`releases page <https://github.com/llvm/llvm-project/releases>`_. Note that if
you are a Linux user, ``clang-format`` will likely be available as a package in
your distribution repositories.
When there are differences between the `Coding Style Guidelines`_ guidelines and the
formatting generated by code formatting tools, the `Coding Style Guidelines`_ guidelines
take precedence. If there is ambiguity between formatting tools and the
guidelines, maintainers may decide which style should be adopted.
.. _Linux kernel coding style:
https://kernel.org/doc/html/latest/process/coding-style.html
.. _snake case:
https://en.wikipedia.org/wiki/Snake_case

22
doc/develop/west/workspaces.rst
View file

@ -321,3 +321,25 @@ v2.5.0 and its modules, then add the ``app1`` and ``app2`` projects:
You can also do this "by hand" by copy/pasting :file:`zephyr/west.yml`
as shown :ref:`above <west-t2>` for the T2 topology, with the same caveats.
.. _workspace-as-git-repo:
Not supported: workspace topdir as .git repository
**************************************************
Some users have asked for support making the workspace :ref:`topdir
<west-workspace>` a git repository, like this example:
.. code-block:: none
my-workspace/ # workspace topdir
├── .git/ # puts the entire workspace in a git repository
├── .west/ # marks the location of the topdir
└── [ ... other projects ...]
This is **not** an officially supported topology. As a design decision, west
assumes that the workspace topdir itself is not a git repository.
You may be able to make something like this "work" for yourself and your own
goals. However, future versions of west might contain changes which can "break"
your setup.

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